Merge master.kernel.org:/home/rmk/linux-2.6-arm
* master.kernel.org:/home/rmk/linux-2.6-arm: (22 commits) ARM: 5865/1: nuc900 ethernet driver needs mii ARM: 5864/1: Implement arch_reset() in NUC900 ARM: 5863/1: fix bugs of clock source of NUC900 ARM: 5858/1: Remove unused vma_vm_flags macro from v7wbi_flush_user_tlb_range imx/mx3: depend on USB_ULPI for otg_ulpi_create ARM: MX3: make CPU revision number detection work on all boards mx25: pdk: add platform code for FEC support mx25: add support for FEC on i.MX25 mx25: s/NO_PAD_CTL/NO_PAD_CTRL/ mx31moboard: fix usbh device names mx3: add support for the mt9v022 camera sensor to pcm037 platform mx27: mxt_td60: Remove not used UART pins [ARM] pxa/poodle: fix incorrect 'gpio_card_detect' of MMC [ARM] pxa/zylonite: simplify reduntant gpio settings on mmc slot [ARM] pxa/ttc_dkb: remove duplicate macro definition [ARM] pxa/zeus: provide power-source information when APM is enabled [ARM] pxa/zeus: relax memory timings on Zeus ethernet ports [ARM] pxa/zeus: make internal zeus_get_pcb_info static [ARM] pxa/littleton: select CPU_PXA300 and CPU_PXA310 [ARM] pxa/littleton: add UART3 GPIO config ...
This commit is contained in:
Коммит
34e2fde8a4
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@ -24,8 +24,6 @@
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#include "common.h"
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#define ARRAY_AND_SIZE(x) (x), ARRAY_SIZE(x)
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static unsigned long ttc_dkb_pin_config[] __initdata = {
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/* UART2 */
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GPIO47_UART2_RXD,
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@ -58,21 +58,6 @@ static unsigned int mxt_td60_pins[] __initdata = {
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PE9_PF_UART3_RXD,
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PE10_PF_UART3_CTS,
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PE11_PF_UART3_RTS,
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/* UART3 */
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PB26_AF_UART4_RTS,
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PB28_AF_UART4_TXD,
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PB29_AF_UART4_CTS,
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PB31_AF_UART4_RXD,
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/* UART4 */
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PB18_AF_UART5_TXD,
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PB19_AF_UART5_RXD,
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PB20_AF_UART5_CTS,
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PB21_AF_UART5_RTS,
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/* UART5 */
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PB10_AF_UART6_TXD,
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PB12_AF_UART6_CTS,
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PB11_AF_UART6_RXD,
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PB13_AF_UART6_RTS,
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/* FEC */
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PD0_AIN_FEC_TXD0,
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PD1_AIN_FEC_TXD1,
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@ -261,12 +246,6 @@ static struct imxuart_platform_data uart_pdata[] = {
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.flags = IMXUART_HAVE_RTSCTS,
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}, {
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.flags = IMXUART_HAVE_RTSCTS,
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}, {
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.flags = IMXUART_HAVE_RTSCTS,
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}, {
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.flags = IMXUART_HAVE_RTSCTS,
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}, {
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.flags = IMXUART_HAVE_RTSCTS,
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},
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};
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@ -278,9 +257,6 @@ static void __init mxt_td60_board_init(void)
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mxc_register_device(&mxc_uart_device0, &uart_pdata[0]);
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mxc_register_device(&mxc_uart_device1, &uart_pdata[1]);
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mxc_register_device(&mxc_uart_device2, &uart_pdata[2]);
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mxc_register_device(&mxc_uart_device3, &uart_pdata[3]);
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mxc_register_device(&mxc_uart_device4, &uart_pdata[4]);
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mxc_register_device(&mxc_uart_device5, &uart_pdata[5]);
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mxc_register_device(&mxc_nand_device, &mxt_td60_nand_board_info);
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i2c_register_board_info(0, mxt_td60_i2c_devices,
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@ -173,6 +173,7 @@ DEFINE_CLOCK(pwm4_clk, 0, CCM_CGCR2, 2, get_rate_ipg, NULL);
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DEFINE_CLOCK(kpp_clk, 0, CCM_CGCR1, 28, get_rate_ipg, NULL);
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DEFINE_CLOCK(tsc_clk, 0, CCM_CGCR2, 13, get_rate_ipg, NULL);
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DEFINE_CLOCK(i2c_clk, 0, CCM_CGCR0, 6, get_rate_i2c, NULL);
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DEFINE_CLOCK(fec_clk, 0, CCM_CGCR0, 23, get_rate_ipg, NULL);
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#define _REGISTER_CLOCK(d, n, c) \
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{ \
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@ -204,6 +205,7 @@ static struct clk_lookup lookups[] = {
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_REGISTER_CLOCK("imx-i2c.0", NULL, i2c_clk)
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_REGISTER_CLOCK("imx-i2c.1", NULL, i2c_clk)
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_REGISTER_CLOCK("imx-i2c.2", NULL, i2c_clk)
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_REGISTER_CLOCK("fec.0", NULL, fec_clk)
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};
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int __init mx25_clocks_init(unsigned long fref)
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@ -419,3 +419,22 @@ int __init mxc_register_gpios(void)
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return mxc_gpio_init(imx_gpio_ports, ARRAY_SIZE(imx_gpio_ports));
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}
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static struct resource mx25_fec_resources[] = {
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{
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.start = MX25_FEC_BASE_ADDR,
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.end = MX25_FEC_BASE_ADDR + 0xfff,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = MX25_INT_FEC,
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.end = MX25_INT_FEC,
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.flags = IORESOURCE_IRQ,
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},
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};
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struct platform_device mx25_fec_device = {
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.name = "fec",
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.id = 0,
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.num_resources = ARRAY_SIZE(mx25_fec_resources),
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.resource = mx25_fec_resources,
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};
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@ -17,3 +17,4 @@ extern struct platform_device mxc_keypad_device;
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extern struct platform_device mxc_i2c_device0;
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extern struct platform_device mxc_i2c_device1;
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extern struct platform_device mxc_i2c_device2;
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extern struct platform_device mx25_fec_device;
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@ -18,10 +18,11 @@
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#include <linux/types.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <linux/clk.h>
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#include <linux/irq.h>
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#include <linux/gpio.h>
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#include <linux/smsc911x.h>
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#include <linux/fec.h>
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#include <linux/platform_device.h>
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#include <mach/hardware.h>
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@ -35,16 +36,57 @@
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#include <mach/mx25.h>
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#include <mach/mxc_nand.h>
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#include "devices.h"
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#include <mach/iomux-v3.h>
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#include <mach/iomux.h>
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static struct imxuart_platform_data uart_pdata = {
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.flags = IMXUART_HAVE_RTSCTS,
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};
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static struct pad_desc mx25pdk_pads[] = {
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MX25_PAD_FEC_MDC__FEC_MDC,
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MX25_PAD_FEC_MDIO__FEC_MDIO,
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MX25_PAD_FEC_TDATA0__FEC_TDATA0,
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MX25_PAD_FEC_TDATA1__FEC_TDATA1,
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MX25_PAD_FEC_TX_EN__FEC_TX_EN,
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MX25_PAD_FEC_RDATA0__FEC_RDATA0,
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MX25_PAD_FEC_RDATA1__FEC_RDATA1,
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MX25_PAD_FEC_RX_DV__FEC_RX_DV,
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MX25_PAD_FEC_TX_CLK__FEC_TX_CLK,
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MX25_PAD_A17__GPIO_2_3, /* FEC_EN, GPIO 35 */
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MX25_PAD_D12__GPIO_4_8, /* FEC_RESET_B, GPIO 104 */
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};
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static struct fec_platform_data mx25_fec_pdata = {
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.phy = PHY_INTERFACE_MODE_RMII,
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};
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#define FEC_ENABLE_GPIO 35
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#define FEC_RESET_B_GPIO 104
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static void __init mx25pdk_fec_reset(void)
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{
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gpio_request(FEC_ENABLE_GPIO, "FEC PHY enable");
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gpio_request(FEC_RESET_B_GPIO, "FEC PHY reset");
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gpio_direction_output(FEC_ENABLE_GPIO, 0); /* drop PHY power */
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gpio_direction_output(FEC_RESET_B_GPIO, 0); /* assert reset */
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udelay(2);
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/* turn on PHY power and lift reset */
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gpio_set_value(FEC_ENABLE_GPIO, 1);
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gpio_set_value(FEC_RESET_B_GPIO, 1);
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}
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static void __init mx25pdk_init(void)
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{
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mxc_iomux_v3_setup_multiple_pads(mx25pdk_pads,
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ARRAY_SIZE(mx25pdk_pads));
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mxc_register_device(&mxc_uart_device0, &uart_pdata);
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mxc_register_device(&mxc_usbh2, NULL);
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mx25pdk_fec_reset();
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mxc_register_device(&mx25_fec_device, &mx25_fec_pdata);
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}
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static void __init mx25pdk_timer_init(void)
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@ -49,6 +49,7 @@ config MACH_PCM037_EET
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config MACH_MX31LITE
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bool "Support MX31 LITEKIT (LogicPD)"
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select ARCH_MX31
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select MXC_ULPI if USB_ULPI
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help
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Include support for MX31 LITEKIT platform. This includes specific
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configurations for the board and its peripherals.
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@ -63,7 +64,7 @@ config MACH_MX31_3DS
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config MACH_MX31MOBOARD
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bool "Support mx31moboard platforms (EPFL Mobots group)"
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select ARCH_MX31
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select MXC_ULPI
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select MXC_ULPI if USB_ULPI
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help
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Include support for mx31moboard platform. This includes specific
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configurations for the board and its peripherals.
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@ -65,6 +65,11 @@ static struct map_desc mxc_io_desc[] __initdata = {
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.pfn = __phys_to_pfn(AIPS2_BASE_ADDR),
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.length = AIPS2_SIZE,
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.type = MT_DEVICE_NONSHARED
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}, {
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.virtual = SPBA0_BASE_ADDR_VIRT,
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.pfn = __phys_to_pfn(SPBA0_BASE_ADDR),
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.length = SPBA0_SIZE,
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.type = MT_DEVICE_NONSHARED
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},
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};
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@ -494,11 +494,6 @@ static void mxc_init_i2c(void)
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*/
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static struct map_desc mx31ads_io_desc[] __initdata = {
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{
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.virtual = SPBA0_BASE_ADDR_VIRT,
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.pfn = __phys_to_pfn(SPBA0_BASE_ADDR),
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.length = SPBA0_SIZE,
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.type = MT_DEVICE_NONSHARED
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}, {
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.virtual = CS4_BASE_ADDR_VIRT,
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.pfn = __phys_to_pfn(CS4_BASE_ADDR),
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.length = CS4_SIZE / 2,
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@ -135,6 +135,7 @@ static struct spi_board_info mc13783_spi_dev __initdata = {
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* USB
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*/
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#if defined(CONFIG_USB_ULPI)
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#define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
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PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
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@ -180,6 +181,7 @@ static struct mxc_usbh_platform_data usbh2_pdata = {
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.portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT,
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.flags = MXC_EHCI_POWER_PINS_ENABLED,
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};
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#endif
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/*
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* NOR flash
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@ -212,11 +214,6 @@ static struct platform_device physmap_flash_device = {
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*/
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static struct map_desc mx31lite_io_desc[] __initdata = {
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{
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.virtual = SPBA0_BASE_ADDR_VIRT,
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.pfn = __phys_to_pfn(SPBA0_BASE_ADDR),
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.length = SPBA0_SIZE,
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.type = MT_DEVICE_NONSHARED
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}, {
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.virtual = CS4_BASE_ADDR_VIRT,
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.pfn = __phys_to_pfn(CS4_BASE_ADDR),
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.length = CS4_SIZE,
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@ -261,11 +258,13 @@ static void __init mxc_board_init(void)
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mxc_register_device(&mxc_spi_device1, &spi1_pdata);
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spi_register_board_info(&mc13783_spi_dev, 1);
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#if defined(CONFIG_USB_ULPI)
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/* USB */
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usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
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USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT);
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mxc_register_device(&mxc_usbh2, &usbh2_pdata);
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#endif
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/* SMSC9117 IRQ pin */
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ret = gpio_request(IOMUX_TO_GPIO(MX31_PIN_SFS6), "sms9117-irq");
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@ -179,7 +179,7 @@ static int __init devboard_usbh1_init(void)
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usbh1_pdata.otg = otg;
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return mxc_register_device(&mx31_usbh1, &usbh1_pdata);
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return mxc_register_device(&mxc_usbh1, &usbh1_pdata);
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}
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/*
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|
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@ -294,7 +294,7 @@ static int __init marxbot_usbh1_init(void)
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usbh1_pdata.otg = otg;
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return mxc_register_device(&mx31_usbh1, &usbh1_pdata);
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return mxc_register_device(&mxc_usbh1, &usbh1_pdata);
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}
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/*
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|
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@ -346,6 +346,8 @@ static struct fsl_usb2_platform_data usb_pdata = {
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.phy_mode = FSL_USB2_PHY_ULPI,
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};
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#if defined(CONFIG_USB_ULPI)
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#define USBH2_EN_B IOMUX_TO_GPIO(MX31_PIN_SCK6)
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static int moboard_usbh2_hw_init(struct platform_device *pdev)
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@ -392,8 +394,11 @@ static int __init moboard_usbh2_init(void)
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usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
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USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT);
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return mxc_register_device(&mx31_usbh2, &usbh2_pdata);
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return mxc_register_device(&mxc_usbh2, &usbh2_pdata);
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}
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#else
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static inline int moboard_usbh2_init(void) { return 0; }
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#endif
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static struct gpio_led mx31moboard_leds[] = {
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|
|
|
@ -211,11 +211,6 @@ static int __init mx31pdk_init_expio(void)
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*/
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static struct map_desc mx31pdk_io_desc[] __initdata = {
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{
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.virtual = SPBA0_BASE_ADDR_VIRT,
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.pfn = __phys_to_pfn(SPBA0_BASE_ADDR),
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.length = SPBA0_SIZE,
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.type = MT_DEVICE_NONSHARED,
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}, {
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.virtual = CS5_BASE_ADDR_VIRT,
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.pfn = __phys_to_pfn(CS5_BASE_ADDR),
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.length = CS5_SIZE,
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|
|
|
@ -322,16 +322,25 @@ static int pcm037_camera_power(struct device *dev, int on)
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return 0;
|
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}
|
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|
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static struct i2c_board_info pcm037_i2c_2_devices[] = {
|
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static struct i2c_board_info pcm037_i2c_camera[] = {
|
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{
|
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I2C_BOARD_INFO("mt9t031", 0x5d),
|
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}, {
|
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I2C_BOARD_INFO("mt9v022", 0x48),
|
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},
|
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};
|
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|
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static struct soc_camera_link iclink = {
|
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static struct soc_camera_link iclink_mt9v022 = {
|
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.bus_id = 0, /* Must match with the camera ID */
|
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.board_info = &pcm037_i2c_camera[1],
|
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.i2c_adapter_id = 2,
|
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.module_name = "mt9v022",
|
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};
|
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|
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static struct soc_camera_link iclink_mt9t031 = {
|
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.bus_id = 0, /* Must match with the camera ID */
|
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.power = pcm037_camera_power,
|
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.board_info = &pcm037_i2c_2_devices[0],
|
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.board_info = &pcm037_i2c_camera[0],
|
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.i2c_adapter_id = 2,
|
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.module_name = "mt9t031",
|
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};
|
||||
|
@ -345,11 +354,19 @@ static struct i2c_board_info pcm037_i2c_devices[] = {
|
|||
}
|
||||
};
|
||||
|
||||
static struct platform_device pcm037_camera = {
|
||||
static struct platform_device pcm037_mt9t031 = {
|
||||
.name = "soc-camera-pdrv",
|
||||
.id = 0,
|
||||
.dev = {
|
||||
.platform_data = &iclink,
|
||||
.platform_data = &iclink_mt9t031,
|
||||
},
|
||||
};
|
||||
|
||||
static struct platform_device pcm037_mt9v022 = {
|
||||
.name = "soc-camera-pdrv",
|
||||
.id = 1,
|
||||
.dev = {
|
||||
.platform_data = &iclink_mt9v022,
|
||||
},
|
||||
};
|
||||
|
||||
|
@ -449,7 +466,8 @@ static int __init pcm037_camera_alloc_dma(const size_t buf_size)
|
|||
static struct platform_device *devices[] __initdata = {
|
||||
&pcm037_flash,
|
||||
&pcm037_sram_device,
|
||||
&pcm037_camera,
|
||||
&pcm037_mt9t031,
|
||||
&pcm037_mt9v022,
|
||||
};
|
||||
|
||||
static struct ipu_platform_data mx3_ipu_data = {
|
||||
|
@ -599,7 +617,7 @@ static void __init mxc_board_init(void)
|
|||
if (!ret)
|
||||
gpio_direction_output(IOMUX_TO_GPIO(MX31_PIN_CSI_D5), 1);
|
||||
else
|
||||
iclink.power = NULL;
|
||||
iclink_mt9t031.power = NULL;
|
||||
|
||||
if (!pcm037_camera_alloc_dma(4 * 1024 * 1024))
|
||||
mxc_register_device(&mx3_camera, &camera_pdata);
|
||||
|
|
|
@ -37,6 +37,8 @@ config MACH_ZYLONITE320
|
|||
config MACH_LITTLETON
|
||||
bool "PXA3xx Form Factor Platform (aka Littleton)"
|
||||
select PXA3xx
|
||||
select CPU_PXA300
|
||||
select CPU_PXA310
|
||||
select PXA_SSP
|
||||
|
||||
config MACH_TAVOREVB
|
||||
|
|
|
@ -8,13 +8,6 @@
|
|||
/* the following variables are processor specific and initialized
|
||||
* by the corresponding zylonite_pxa3xx_init()
|
||||
*/
|
||||
struct platform_mmc_slot {
|
||||
int gpio_cd;
|
||||
int gpio_wp;
|
||||
};
|
||||
|
||||
extern struct platform_mmc_slot zylonite_mmc_slot[];
|
||||
|
||||
extern int gpio_eth_irq;
|
||||
extern int gpio_debug_led1;
|
||||
extern int gpio_debug_led2;
|
||||
|
|
|
@ -110,6 +110,12 @@ static mfp_cfg_t littleton_mfp_cfg[] __initdata = {
|
|||
GPIO7_MMC1_CLK,
|
||||
GPIO8_MMC1_CMD,
|
||||
GPIO15_GPIO, /* card detect */
|
||||
|
||||
/* UART3 */
|
||||
GPIO107_UART3_CTS,
|
||||
GPIO108_UART3_RTS,
|
||||
GPIO109_UART3_TXD,
|
||||
GPIO110_UART3_RXD,
|
||||
};
|
||||
|
||||
static struct resource smc91x_resources[] = {
|
||||
|
|
|
@ -293,7 +293,7 @@ static struct pxamci_platform_data poodle_mci_platform_data = {
|
|||
.init = poodle_mci_init,
|
||||
.setpower = poodle_mci_setpower,
|
||||
.exit = poodle_mci_exit,
|
||||
.gpio_card_detect = POODLE_IRQ_GPIO_nSD_DETECT,
|
||||
.gpio_card_detect = POODLE_GPIO_nSD_DETECT,
|
||||
.gpio_card_ro = POODLE_GPIO_nSD_WP,
|
||||
.gpio_power = -1,
|
||||
};
|
||||
|
|
|
@ -25,6 +25,7 @@
|
|||
#include <linux/mtd/physmap.h>
|
||||
#include <linux/i2c.h>
|
||||
#include <linux/i2c/pca953x.h>
|
||||
#include <linux/apm-emulation.h>
|
||||
|
||||
#include <asm/mach-types.h>
|
||||
#include <asm/mach/arch.h>
|
||||
|
@ -626,8 +627,27 @@ static void zeus_power_off(void)
|
|||
pxa27x_cpu_suspend(PWRMODE_DEEPSLEEP);
|
||||
}
|
||||
|
||||
int zeus_get_pcb_info(struct i2c_client *client, unsigned gpio,
|
||||
unsigned ngpio, void *context)
|
||||
#ifdef CONFIG_APM_EMULATION
|
||||
static void zeus_get_power_status(struct apm_power_info *info)
|
||||
{
|
||||
/* Power supply is always present */
|
||||
info->ac_line_status = APM_AC_ONLINE;
|
||||
info->battery_status = APM_BATTERY_STATUS_NOT_PRESENT;
|
||||
info->battery_flag = APM_BATTERY_FLAG_NOT_PRESENT;
|
||||
}
|
||||
|
||||
static inline void zeus_setup_apm(void)
|
||||
{
|
||||
apm_get_power_status = zeus_get_power_status;
|
||||
}
|
||||
#else
|
||||
static inline void zeus_setup_apm(void)
|
||||
{
|
||||
}
|
||||
#endif
|
||||
|
||||
static int zeus_get_pcb_info(struct i2c_client *client, unsigned gpio,
|
||||
unsigned ngpio, void *context)
|
||||
{
|
||||
int i;
|
||||
u8 pcb_info = 0;
|
||||
|
@ -726,9 +746,18 @@ static mfp_cfg_t zeus_pin_config[] __initdata = {
|
|||
GPIO99_GPIO, /* CF RDY */
|
||||
};
|
||||
|
||||
/*
|
||||
* DM9k MSCx settings: SRAM, 16 bits
|
||||
* 17 cycles delay first access
|
||||
* 5 cycles delay next access
|
||||
* 13 cycles recovery time
|
||||
* faster device
|
||||
*/
|
||||
#define DM9K_MSC_VALUE 0xe4c9
|
||||
|
||||
static void __init zeus_init(void)
|
||||
{
|
||||
u16 dm9000_msc = 0xe279;
|
||||
u16 dm9000_msc = DM9K_MSC_VALUE;
|
||||
|
||||
system_rev = __raw_readw(ZEUS_CPLD_VERSION);
|
||||
pr_info("Zeus CPLD V%dI%d\n", (system_rev & 0xf0) >> 4, (system_rev & 0x0f));
|
||||
|
@ -738,6 +767,7 @@ static void __init zeus_init(void)
|
|||
MSC1 = (MSC1 & 0xffff0000) | dm9000_msc;
|
||||
|
||||
pm_power_off = zeus_power_off;
|
||||
zeus_setup_apm();
|
||||
|
||||
pxa2xx_mfp_config(ARRAY_AND_SIZE(zeus_pin_config));
|
||||
|
||||
|
|
|
@ -36,9 +36,6 @@
|
|||
#include "devices.h"
|
||||
#include "generic.h"
|
||||
|
||||
#define MAX_SLOTS 3
|
||||
struct platform_mmc_slot zylonite_mmc_slot[MAX_SLOTS];
|
||||
|
||||
int gpio_eth_irq;
|
||||
int gpio_debug_led1;
|
||||
int gpio_debug_led2;
|
||||
|
@ -220,84 +217,28 @@ static inline void zylonite_init_lcd(void) {}
|
|||
#endif
|
||||
|
||||
#if defined(CONFIG_MMC)
|
||||
static int zylonite_mci_ro(struct device *dev)
|
||||
{
|
||||
struct platform_device *pdev = to_platform_device(dev);
|
||||
|
||||
return gpio_get_value(zylonite_mmc_slot[pdev->id].gpio_wp);
|
||||
}
|
||||
|
||||
static int zylonite_mci_init(struct device *dev,
|
||||
irq_handler_t zylonite_detect_int,
|
||||
void *data)
|
||||
{
|
||||
struct platform_device *pdev = to_platform_device(dev);
|
||||
int err, cd_irq, gpio_cd, gpio_wp;
|
||||
|
||||
cd_irq = gpio_to_irq(zylonite_mmc_slot[pdev->id].gpio_cd);
|
||||
gpio_cd = zylonite_mmc_slot[pdev->id].gpio_cd;
|
||||
gpio_wp = zylonite_mmc_slot[pdev->id].gpio_wp;
|
||||
|
||||
/*
|
||||
* setup GPIO for Zylonite MMC controller
|
||||
*/
|
||||
err = gpio_request(gpio_cd, "mmc card detect");
|
||||
if (err)
|
||||
goto err_request_cd;
|
||||
gpio_direction_input(gpio_cd);
|
||||
|
||||
err = gpio_request(gpio_wp, "mmc write protect");
|
||||
if (err)
|
||||
goto err_request_wp;
|
||||
gpio_direction_input(gpio_wp);
|
||||
|
||||
err = request_irq(cd_irq, zylonite_detect_int,
|
||||
IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
|
||||
"MMC card detect", data);
|
||||
if (err) {
|
||||
printk(KERN_ERR "%s: MMC/SD/SDIO: "
|
||||
"can't request card detect IRQ\n", __func__);
|
||||
goto err_request_irq;
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
||||
err_request_irq:
|
||||
gpio_free(gpio_wp);
|
||||
err_request_wp:
|
||||
gpio_free(gpio_cd);
|
||||
err_request_cd:
|
||||
return err;
|
||||
}
|
||||
|
||||
static void zylonite_mci_exit(struct device *dev, void *data)
|
||||
{
|
||||
struct platform_device *pdev = to_platform_device(dev);
|
||||
int cd_irq, gpio_cd, gpio_wp;
|
||||
|
||||
cd_irq = gpio_to_irq(zylonite_mmc_slot[pdev->id].gpio_cd);
|
||||
gpio_cd = zylonite_mmc_slot[pdev->id].gpio_cd;
|
||||
gpio_wp = zylonite_mmc_slot[pdev->id].gpio_wp;
|
||||
|
||||
free_irq(cd_irq, data);
|
||||
gpio_free(gpio_cd);
|
||||
gpio_free(gpio_wp);
|
||||
}
|
||||
|
||||
static struct pxamci_platform_data zylonite_mci_platform_data = {
|
||||
.detect_delay = 20,
|
||||
.ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
|
||||
.init = zylonite_mci_init,
|
||||
.exit = zylonite_mci_exit,
|
||||
.get_ro = zylonite_mci_ro,
|
||||
.gpio_card_detect = -1,
|
||||
.gpio_card_ro = -1,
|
||||
.gpio_card_detect = EXT_GPIO(0),
|
||||
.gpio_card_ro = EXT_GPIO(2),
|
||||
.gpio_power = -1,
|
||||
};
|
||||
|
||||
static struct pxamci_platform_data zylonite_mci2_platform_data = {
|
||||
.detect_delay = 20,
|
||||
.ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
|
||||
.gpio_card_detect = EXT_GPIO(1),
|
||||
.gpio_card_ro = EXT_GPIO(3),
|
||||
.gpio_power = -1,
|
||||
};
|
||||
|
||||
static struct pxamci_platform_data zylonite_mci3_platform_data = {
|
||||
.detect_delay = 20,
|
||||
.ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
|
||||
.gpio_card_detect = EXT_GPIO(30),
|
||||
.gpio_card_ro = EXT_GPIO(31),
|
||||
.gpio_power = -1,
|
||||
};
|
||||
|
||||
static void __init zylonite_init_mmc(void)
|
||||
|
@ -305,7 +246,7 @@ static void __init zylonite_init_mmc(void)
|
|||
pxa_set_mci_info(&zylonite_mci_platform_data);
|
||||
pxa3xx_set_mci2_info(&zylonite_mci2_platform_data);
|
||||
if (cpu_is_pxa310())
|
||||
pxa3xx_set_mci3_info(&zylonite_mci_platform_data);
|
||||
pxa3xx_set_mci3_info(&zylonite_mci3_platform_data);
|
||||
}
|
||||
#else
|
||||
static inline void zylonite_init_mmc(void) {}
|
||||
|
|
|
@ -129,8 +129,8 @@ static mfp_cfg_t common_mfp_cfg[] __initdata = {
|
|||
GPIO22_I2C_SDA,
|
||||
|
||||
/* GPIO */
|
||||
GPIO18_GPIO, /* GPIO Expander #0 INT_N */
|
||||
GPIO19_GPIO, /* GPIO Expander #1 INT_N */
|
||||
GPIO18_GPIO | MFP_PULL_HIGH, /* GPIO Expander #0 INT_N */
|
||||
GPIO19_GPIO | MFP_PULL_HIGH, /* GPIO Expander #1 INT_N */
|
||||
};
|
||||
|
||||
static mfp_cfg_t pxa300_mfp_cfg[] __initdata = {
|
||||
|
@ -258,10 +258,6 @@ void __init zylonite_pxa300_init(void)
|
|||
/* detect LCD panel */
|
||||
zylonite_detect_lcd_panel();
|
||||
|
||||
/* MMC card detect & write protect for controller 0 */
|
||||
zylonite_mmc_slot[0].gpio_cd = EXT_GPIO(0);
|
||||
zylonite_mmc_slot[0].gpio_wp = EXT_GPIO(2);
|
||||
|
||||
/* WM9713 IRQ */
|
||||
wm9713_irq = mfp_to_gpio(MFP_PIN_GPIO26);
|
||||
|
||||
|
@ -276,10 +272,6 @@ void __init zylonite_pxa300_init(void)
|
|||
if (cpu_is_pxa310()) {
|
||||
pxa3xx_mfp_config(ARRAY_AND_SIZE(pxa310_mfp_cfg));
|
||||
gpio_eth_irq = mfp_to_gpio(MFP_PIN_GPIO102);
|
||||
|
||||
/* MMC card detect & write protect for controller 2 */
|
||||
zylonite_mmc_slot[2].gpio_cd = EXT_GPIO(30);
|
||||
zylonite_mmc_slot[2].gpio_wp = EXT_GPIO(31);
|
||||
}
|
||||
|
||||
/* GPIOs for Debug LEDs */
|
||||
|
|
|
@ -209,10 +209,6 @@ void __init zylonite_pxa320_init(void)
|
|||
gpio_debug_led1 = mfp_to_gpio(MFP_PIN_GPIO1_2);
|
||||
gpio_debug_led2 = mfp_to_gpio(MFP_PIN_GPIO4_2);
|
||||
|
||||
/* MMC card detect & write protect for controller 0 */
|
||||
zylonite_mmc_slot[0].gpio_cd = mfp_to_gpio(MFP_PIN_GPIO1);
|
||||
zylonite_mmc_slot[0].gpio_wp = mfp_to_gpio(MFP_PIN_GPIO5);
|
||||
|
||||
/* WM9713 IRQ */
|
||||
wm9713_irq = mfp_to_gpio(MFP_PIN_GPIO15);
|
||||
}
|
||||
|
|
|
@ -15,7 +15,15 @@
|
|||
*
|
||||
*/
|
||||
|
||||
#include <linux/io.h>
|
||||
#include <asm/proc-fns.h>
|
||||
#include <mach/map.h>
|
||||
#include <mach/regs-timer.h>
|
||||
|
||||
#define WTCR (TMR_BA + 0x1C)
|
||||
#define WTCLK (1 << 10)
|
||||
#define WTE (1 << 7)
|
||||
#define WTRE (1 << 1)
|
||||
|
||||
static void arch_idle(void)
|
||||
{
|
||||
|
@ -23,6 +31,11 @@ static void arch_idle(void)
|
|||
|
||||
static void arch_reset(char mode, const char *cmd)
|
||||
{
|
||||
cpu_reset(0);
|
||||
if (mode == 's') {
|
||||
/* Jump into ROM at address 0 */
|
||||
cpu_reset(0);
|
||||
} else {
|
||||
__raw_writel(WTE | WTRE | WTCLK, WTCR);
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
@ -42,7 +42,10 @@
|
|||
#define TICKS_PER_SEC 100
|
||||
#define PRESCALE 0x63 /* Divider = prescale + 1 */
|
||||
|
||||
unsigned int timer0_load;
|
||||
#define TDR_SHIFT 24
|
||||
#define TDR_MASK ((1 << TDR_SHIFT) - 1)
|
||||
|
||||
static unsigned int timer0_load;
|
||||
|
||||
static void nuc900_clockevent_setmode(enum clock_event_mode mode,
|
||||
struct clock_event_device *clk)
|
||||
|
@ -88,7 +91,7 @@ static int nuc900_clockevent_setnextevent(unsigned long evt,
|
|||
static struct clock_event_device nuc900_clockevent_device = {
|
||||
.name = "nuc900-timer0",
|
||||
.shift = 32,
|
||||
.features = CLOCK_EVT_MODE_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
|
||||
.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
|
||||
.set_mode = nuc900_clockevent_setmode,
|
||||
.set_next_event = nuc900_clockevent_setnextevent,
|
||||
.rating = 300,
|
||||
|
@ -112,8 +115,23 @@ static struct irqaction nuc900_timer0_irq = {
|
|||
.handler = nuc900_timer0_interrupt,
|
||||
};
|
||||
|
||||
static void __init nuc900_clockevents_init(unsigned int rate)
|
||||
static void __init nuc900_clockevents_init(void)
|
||||
{
|
||||
unsigned int rate;
|
||||
struct clk *clk = clk_get(NULL, "timer0");
|
||||
|
||||
BUG_ON(IS_ERR(clk));
|
||||
|
||||
__raw_writel(0x00, REG_TCSR0);
|
||||
|
||||
clk_enable(clk);
|
||||
rate = clk_get_rate(clk) / (PRESCALE + 1);
|
||||
|
||||
timer0_load = (rate / TICKS_PER_SEC);
|
||||
|
||||
__raw_writel(RESETINT, REG_TISR);
|
||||
setup_irq(IRQ_TIMER0, &nuc900_timer0_irq);
|
||||
|
||||
nuc900_clockevent_device.mult = div_sc(rate, NSEC_PER_SEC,
|
||||
nuc900_clockevent_device.shift);
|
||||
nuc900_clockevent_device.max_delta_ns = clockevent_delta2ns(0xffffffff,
|
||||
|
@ -127,26 +145,35 @@ static void __init nuc900_clockevents_init(unsigned int rate)
|
|||
|
||||
static cycle_t nuc900_get_cycles(struct clocksource *cs)
|
||||
{
|
||||
return ~__raw_readl(REG_TDR1);
|
||||
return (~__raw_readl(REG_TDR1)) & TDR_MASK;
|
||||
}
|
||||
|
||||
static struct clocksource clocksource_nuc900 = {
|
||||
.name = "nuc900-timer1",
|
||||
.rating = 200,
|
||||
.read = nuc900_get_cycles,
|
||||
.mask = CLOCKSOURCE_MASK(32),
|
||||
.shift = 20,
|
||||
.mask = CLOCKSOURCE_MASK(TDR_SHIFT),
|
||||
.shift = 10,
|
||||
.flags = CLOCK_SOURCE_IS_CONTINUOUS,
|
||||
};
|
||||
|
||||
static void __init nuc900_clocksource_init(unsigned int rate)
|
||||
static void __init nuc900_clocksource_init(void)
|
||||
{
|
||||
unsigned int val;
|
||||
unsigned int rate;
|
||||
struct clk *clk = clk_get(NULL, "timer1");
|
||||
|
||||
BUG_ON(IS_ERR(clk));
|
||||
|
||||
__raw_writel(0x00, REG_TCSR1);
|
||||
|
||||
clk_enable(clk);
|
||||
rate = clk_get_rate(clk) / (PRESCALE + 1);
|
||||
|
||||
__raw_writel(0xffffffff, REG_TICR1);
|
||||
|
||||
val = __raw_readl(REG_TCSR1);
|
||||
val |= (COUNTEN | PERIOD);
|
||||
val |= (COUNTEN | PERIOD | PRESCALE);
|
||||
__raw_writel(val, REG_TCSR1);
|
||||
|
||||
clocksource_nuc900.mult =
|
||||
|
@ -156,25 +183,8 @@ static void __init nuc900_clocksource_init(unsigned int rate)
|
|||
|
||||
static void __init nuc900_timer_init(void)
|
||||
{
|
||||
struct clk *ck_ext = clk_get(NULL, "ext");
|
||||
unsigned int rate;
|
||||
|
||||
BUG_ON(IS_ERR(ck_ext));
|
||||
|
||||
rate = clk_get_rate(ck_ext);
|
||||
clk_put(ck_ext);
|
||||
rate = rate / (PRESCALE + 0x01);
|
||||
|
||||
/* set a known state */
|
||||
__raw_writel(0x00, REG_TCSR0);
|
||||
__raw_writel(0x00, REG_TCSR1);
|
||||
__raw_writel(RESETINT, REG_TISR);
|
||||
timer0_load = (rate / TICKS_PER_SEC);
|
||||
|
||||
setup_irq(IRQ_TIMER0, &nuc900_timer0_irq);
|
||||
|
||||
nuc900_clocksource_init(rate);
|
||||
nuc900_clockevents_init(rate);
|
||||
nuc900_clocksource_init();
|
||||
nuc900_clockevents_init();
|
||||
}
|
||||
|
||||
struct sys_timer nuc900_timer = {
|
||||
|
|
|
@ -40,7 +40,6 @@ ENTRY(v7wbi_flush_user_tlb_range)
|
|||
asid r3, r3 @ mask ASID
|
||||
orr r0, r3, r0, lsl #PAGE_SHIFT @ Create initial MVA
|
||||
mov r1, r1, lsl #PAGE_SHIFT
|
||||
vma_vm_flags r2, r2 @ get vma->vm_flags
|
||||
1:
|
||||
#ifdef CONFIG_SMP
|
||||
mcr p15, 0, r0, c8, c3, 1 @ TLB invalidate U MVA (shareable)
|
||||
|
|
|
@ -58,19 +58,19 @@
|
|||
|
||||
#define MX25_PAD_A18__A18 IOMUX_PAD(0x23c, 0x020, 0x10, 0, 0, NO_PAD_CTRL)
|
||||
#define MX25_PAD_A18__GPIO_2_4 IOMUX_PAD(0x23c, 0x020, 0x15, 0, 0, NO_PAD_CTRL)
|
||||
#define MX25_PAD_A18__FEC_COL IOMUX_PAD(0x23c, 0x020, 0x17, 0x504, 0, NO_PAD_CTL)
|
||||
#define MX25_PAD_A18__FEC_COL IOMUX_PAD(0x23c, 0x020, 0x17, 0x504, 0, NO_PAD_CTRL)
|
||||
|
||||
#define MX25_PAD_A19__A19 IOMUX_PAD(0x240, 0x024, 0x10, 0, 0, NO_PAD_CTRL)
|
||||
#define MX25_PAD_A19__FEC_RX_ER IOMUX_PAD(0x240, 0x024, 0x17, 0x518, 0, NO_PAD_CTL)
|
||||
#define MX25_PAD_A19__FEC_RX_ER IOMUX_PAD(0x240, 0x024, 0x17, 0x518, 0, NO_PAD_CTRL)
|
||||
#define MX25_PAD_A19__GPIO_2_5 IOMUX_PAD(0x240, 0x024, 0x15, 0, 0, NO_PAD_CTRL)
|
||||
|
||||
#define MX25_PAD_A20__A20 IOMUX_PAD(0x244, 0x028, 0x10, 0, 0, NO_PAD_CTRL)
|
||||
#define MX25_PAD_A20__GPIO_2_6 IOMUX_PAD(0x244, 0x028, 0x15, 0, 0, NO_PAD_CTRL)
|
||||
#define MX25_PAD_A20__FEC_RDATA2 IOMUX_PAD(0x244, 0x028, 0x17, 0x50c, 0, NO_PAD_CTL)
|
||||
#define MX25_PAD_A20__FEC_RDATA2 IOMUX_PAD(0x244, 0x028, 0x17, 0x50c, 0, NO_PAD_CTRL)
|
||||
|
||||
#define MX25_PAD_A21__A21 IOMUX_PAD(0x248, 0x02c, 0x10, 0, 0, NO_PAD_CTRL)
|
||||
#define MX25_PAD_A21__GPIO_2_7 IOMUX_PAD(0x248, 0x02c, 0x15, 0, 0, NO_PAD_CTRL)
|
||||
#define MX25_PAD_A21__FEC_RDATA3 IOMUX_PAD(0x248, 0x02c, 0x17, 0x510, 0, NO_PAD_CTL)
|
||||
#define MX25_PAD_A21__FEC_RDATA3 IOMUX_PAD(0x248, 0x02c, 0x17, 0x510, 0, NO_PAD_CTRL)
|
||||
|
||||
#define MX25_PAD_A22__A22 IOMUX_PAD(0x000, 0x030, 0x10, 0, 0, NO_PAD_CTRL)
|
||||
#define MX25_PAD_A22__GPIO_2_8 IOMUX_PAD(0x000, 0x030, 0x15, 0, 0, NO_PAD_CTRL)
|
||||
|
@ -80,11 +80,11 @@
|
|||
|
||||
#define MX25_PAD_A24__A24 IOMUX_PAD(0x250, 0x038, 0x10, 0, 0, NO_PAD_CTRL)
|
||||
#define MX25_PAD_A24__GPIO_2_10 IOMUX_PAD(0x250, 0x038, 0x15, 0, 0, NO_PAD_CTRL)
|
||||
#define MX25_PAD_A24__FEC_RX_CLK IOMUX_PAD(0x250, 0x038, 0x17, 0x514, 0, NO_PAD_CTL)
|
||||
#define MX25_PAD_A24__FEC_RX_CLK IOMUX_PAD(0x250, 0x038, 0x17, 0x514, 0, NO_PAD_CTRL)
|
||||
|
||||
#define MX25_PAD_A25__A25 IOMUX_PAD(0x254, 0x03c, 0x10, 0, 0, NO_PAD_CTRL)
|
||||
#define MX25_PAD_A25__GPIO_2_11 IOMUX_PAD(0x254, 0x03c, 0x15, 0, 0, NO_PAD_CTRL)
|
||||
#define MX25_PAD_A25__FEC_CRS IOMUX_PAD(0x254, 0x03c, 0x17, 0x508, 0, NO_PAD_CTL)
|
||||
#define MX25_PAD_A25__FEC_CRS IOMUX_PAD(0x254, 0x03c, 0x17, 0x508, 0, NO_PAD_CTRL)
|
||||
|
||||
#define MX25_PAD_EB0__EB0 IOMUX_PAD(0x258, 0x040, 0x10, 0, 0, NO_PAD_CTRL)
|
||||
#define MX25_PAD_EB0__AUD4_TXD IOMUX_PAD(0x258, 0x040, 0x14, 0x464, 0, NO_PAD_CTRL)
|
||||
|
@ -112,7 +112,7 @@
|
|||
#define MX25_PAD_CS5__UART5_RTS IOMUX_PAD(0x268, 0x058, 0x13, 0x574, 0, NO_PAD_CTRL)
|
||||
#define MX25_PAD_CS5__GPIO_3_21 IOMUX_PAD(0x268, 0x058, 0x15, 0, 0, NO_PAD_CTRL)
|
||||
|
||||
#define MX25_PAD_NF_CE0__NF_CE0 IOMUX_PAD(0x26c, 0x05c, 0x10, 0, 0, NO_PAD_CTL)
|
||||
#define MX25_PAD_NF_CE0__NF_CE0 IOMUX_PAD(0x26c, 0x05c, 0x10, 0, 0, NO_PAD_CTRL)
|
||||
#define MX25_PAD_NF_CE0__GPIO_3_22 IOMUX_PAD(0x26c, 0x05c, 0x15, 0, 0, NO_PAD_CTRL)
|
||||
|
||||
#define MX25_PAD_ECB__ECB IOMUX_PAD(0x270, 0x060, 0x10, 0, 0, NO_PAD_CTRL)
|
||||
|
@ -229,28 +229,28 @@
|
|||
#define MX25_PAD_LD7__GPIO_1_21 IOMUX_PAD(0x2dc, 0x0e4, 0x15, 0, 0, NO_PAD_CTRL)
|
||||
|
||||
#define MX25_PAD_LD8__LD8 IOMUX_PAD(0x2e0, 0x0e8, 0x10, 0, 0, NO_PAD_CTRL)
|
||||
#define MX25_PAD_LD8__FEC_TX_ERR IOMUX_PAD(0x2e0, 0x0e8, 0x15, 0, 0, NO_PAD_CTL)
|
||||
#define MX25_PAD_LD8__FEC_TX_ERR IOMUX_PAD(0x2e0, 0x0e8, 0x15, 0, 0, NO_PAD_CTRL)
|
||||
|
||||
#define MX25_PAD_LD9__LD9 IOMUX_PAD(0x2e4, 0x0ec, 0x10, 0, 0, NO_PAD_CTRL)
|
||||
#define MX25_PAD_LD9__FEC_COL IOMUX_PAD(0x2e4, 0x0ec, 0x15, 0x504, 1, NO_PAD_CTL)
|
||||
#define MX25_PAD_LD9__FEC_COL IOMUX_PAD(0x2e4, 0x0ec, 0x15, 0x504, 1, NO_PAD_CTRL)
|
||||
|
||||
#define MX25_PAD_LD10__LD10 IOMUX_PAD(0x2e8, 0x0f0, 0x10, 0, 0, NO_PAD_CTRL)
|
||||
#define MX25_PAD_LD10__FEC_RX_ER IOMUX_PAD(0x2e8, 0x0f0, 0x15, 0x518, 1, NO_PAD_CTL)
|
||||
#define MX25_PAD_LD10__FEC_RX_ER IOMUX_PAD(0x2e8, 0x0f0, 0x15, 0x518, 1, NO_PAD_CTRL)
|
||||
|
||||
#define MX25_PAD_LD11__LD11 IOMUX_PAD(0x2ec, 0x0f4, 0x10, 0, 0, NO_PAD_CTRL)
|
||||
#define MX25_PAD_LD11__FEC_RDATA2 IOMUX_PAD(0x2ec, 0x0f4, 0x15, 0x50c, 1, NO_PAD_CTL)
|
||||
#define MX25_PAD_LD11__FEC_RDATA2 IOMUX_PAD(0x2ec, 0x0f4, 0x15, 0x50c, 1, NO_PAD_CTRL)
|
||||
|
||||
#define MX25_PAD_LD12__LD12 IOMUX_PAD(0x2f0, 0x0f8, 0x10, 0, 0, NO_PAD_CTRL)
|
||||
#define MX25_PAD_LD12__FEC_RDATA3 IOMUX_PAD(0x2f0, 0x0f8, 0x15, 0x510, 1, NO_PAD_CTL)
|
||||
#define MX25_PAD_LD12__FEC_RDATA3 IOMUX_PAD(0x2f0, 0x0f8, 0x15, 0x510, 1, NO_PAD_CTRL)
|
||||
|
||||
#define MX25_PAD_LD13__LD13 IOMUX_PAD(0x2f4, 0x0fc, 0x10, 0, 0, NO_PAD_CTRL)
|
||||
#define MX25_PAD_LD13__FEC_TDATA2 IOMUX_PAD(0x2f4, 0x0fc, 0x15, 0, 0, NO_PAD_CTL)
|
||||
#define MX25_PAD_LD13__FEC_TDATA2 IOMUX_PAD(0x2f4, 0x0fc, 0x15, 0, 0, NO_PAD_CTRL)
|
||||
|
||||
#define MX25_PAD_LD14__LD14 IOMUX_PAD(0x2f8, 0x100, 0x10, 0, 0, NO_PAD_CTRL)
|
||||
#define MX25_PAD_LD14__FEC_TDATA3 IOMUX_PAD(0x2f8, 0x100, 0x15, 0, 0, NO_PAD_CTL)
|
||||
#define MX25_PAD_LD14__FEC_TDATA3 IOMUX_PAD(0x2f8, 0x100, 0x15, 0, 0, NO_PAD_CTRL)
|
||||
|
||||
#define MX25_PAD_LD15__LD15 IOMUX_PAD(0x2fc, 0x104, 0x10, 0, 0, NO_PAD_CTRL)
|
||||
#define MX25_PAD_LD15__FEC_RX_CLK IOMUX_PAD(0x2fc, 0x104, 0x15, 0x514, 1, NO_PAD_CTL)
|
||||
#define MX25_PAD_LD15__FEC_RX_CLK IOMUX_PAD(0x2fc, 0x104, 0x15, 0x514, 1, NO_PAD_CTRL)
|
||||
|
||||
#define MX25_PAD_HSYNC__HSYNC IOMUX_PAD(0x300, 0x108, 0x10, 0, 0, NO_PAD_CTRL)
|
||||
#define MX25_PAD_HSYNC__GPIO_1_22 IOMUX_PAD(0x300, 0x108, 0x15, 0, 0, NO_PAD_CTRL)
|
||||
|
@ -265,7 +265,7 @@
|
|||
#define MX25_PAD_OE_ACD__GPIO_1_25 IOMUX_PAD(0x30c, 0x114, 0x15, 0, 0, NO_PAD_CTRL)
|
||||
|
||||
#define MX25_PAD_CONTRAST__CONTRAST IOMUX_PAD(0x310, 0x118, 0x10, 0, 0, NO_PAD_CTRL)
|
||||
#define MX25_PAD_CONTRAST__FEC_CRS IOMUX_PAD(0x310, 0x118, 0x15, 0x508, 1, NO_PAD_CTL)
|
||||
#define MX25_PAD_CONTRAST__FEC_CRS IOMUX_PAD(0x310, 0x118, 0x15, 0x508, 1, NO_PAD_CTRL)
|
||||
|
||||
#define MX25_PAD_PWM__PWM IOMUX_PAD(0x314, 0x11c, 0x10, 0, 0, NO_PAD_CTRL)
|
||||
#define MX25_PAD_PWM__GPIO_1_26 IOMUX_PAD(0x314, 0x11c, 0x15, 0, 0, NO_PAD_CTRL)
|
||||
|
@ -354,19 +354,19 @@
|
|||
#define MX25_PAD_UART2_TXD__GPIO_4_27 IOMUX_PAD(0x37c, 0x184, 0x15, 0, 0, NO_PAD_CTRL)
|
||||
|
||||
#define MX25_PAD_UART2_RTS__UART2_RTS IOMUX_PAD(0x380, 0x188, 0x10, 0, 0, NO_PAD_CTRL)
|
||||
#define MX25_PAD_UART2_RTS__FEC_COL IOMUX_PAD(0x380, 0x188, 0x12, 0x504, 2, NO_PAD_CTL)
|
||||
#define MX25_PAD_UART2_RTS__FEC_COL IOMUX_PAD(0x380, 0x188, 0x12, 0x504, 2, NO_PAD_CTRL)
|
||||
#define MX25_PAD_UART2_RTS__GPIO_4_28 IOMUX_PAD(0x380, 0x188, 0x15, 0, 0, NO_PAD_CTRL)
|
||||
|
||||
#define MX25_PAD_UART2_CTS__FEC_RX_ER IOMUX_PAD(0x384, 0x18c, 0x12, 0x518, 2, NO_PAD_CTL)
|
||||
#define MX25_PAD_UART2_CTS__FEC_RX_ER IOMUX_PAD(0x384, 0x18c, 0x12, 0x518, 2, NO_PAD_CTRL)
|
||||
#define MX25_PAD_UART2_CTS__UART2_CTS IOMUX_PAD(0x384, 0x18c, 0x10, 0, 0, NO_PAD_CTRL)
|
||||
#define MX25_PAD_UART2_CTS__GPIO_4_29 IOMUX_PAD(0x384, 0x18c, 0x15, 0, 0, NO_PAD_CTRL)
|
||||
|
||||
#define MX25_PAD_SD1_CMD__SD1_CMD IOMUX_PAD(0x388, 0x190, 0x10, 0, 0, PAD_CTL_PUS_47K_UP)
|
||||
#define MX25_PAD_SD1_CMD__FEC_RDATA2 IOMUX_PAD(0x388, 0x190, 0x12, 0x50c, 2, NO_PAD_CTL)
|
||||
#define MX25_PAD_SD1_CMD__FEC_RDATA2 IOMUX_PAD(0x388, 0x190, 0x12, 0x50c, 2, NO_PAD_CTRL)
|
||||
#define MX25_PAD_SD1_CMD__GPIO_2_23 IOMUX_PAD(0x388, 0x190, 0x15, 0, 0, NO_PAD_CTRL)
|
||||
|
||||
#define MX25_PAD_SD1_CLK__SD1_CLK IOMUX_PAD(0x38c, 0x194, 0x10, 0, 0, PAD_CTL_PUS_47K_UP)
|
||||
#define MX25_PAD_SD1_CLK__FEC_RDATA3 IOMUX_PAD(0x38c, 0x194, 0x12, 0x510, 2, NO_PAD_CTL)
|
||||
#define MX25_PAD_SD1_CLK__FEC_RDATA3 IOMUX_PAD(0x38c, 0x194, 0x12, 0x510, 2, NO_PAD_CTRL)
|
||||
#define MX25_PAD_SD1_CLK__GPIO_2_24 IOMUX_PAD(0x38c, 0x194, 0x15, 0, 0, NO_PAD_CTRL)
|
||||
|
||||
#define MX25_PAD_SD1_DATA0__SD1_DATA0 IOMUX_PAD(0x390, 0x198, 0x10, 0, 0, PAD_CTL_PUS_47K_UP)
|
||||
|
@ -377,11 +377,11 @@
|
|||
#define MX25_PAD_SD1_DATA1__GPIO_2_26 IOMUX_PAD(0x394, 0x19c, 0x15, 0, 0, NO_PAD_CTRL)
|
||||
|
||||
#define MX25_PAD_SD1_DATA2__SD1_DATA2 IOMUX_PAD(0x398, 0x1a0, 0x10, 0, 0, PAD_CTL_PUS_47K_UP)
|
||||
#define MX25_PAD_SD1_DATA2__FEC_RX_CLK IOMUX_PAD(0x398, 0x1a0, 0x15, 0x514, 2, NO_PAD_CTL)
|
||||
#define MX25_PAD_SD1_DATA2__FEC_RX_CLK IOMUX_PAD(0x398, 0x1a0, 0x15, 0x514, 2, NO_PAD_CTRL)
|
||||
#define MX25_PAD_SD1_DATA2__GPIO_2_27 IOMUX_PAD(0x398, 0x1a0, 0x15, 0, 0, NO_PAD_CTRL)
|
||||
|
||||
#define MX25_PAD_SD1_DATA3__SD1_DATA3 IOMUX_PAD(0x39c, 0x1a4, 0x10, 0, 0, PAD_CTL_PUS_47K_UP)
|
||||
#define MX25_PAD_SD1_DATA3__FEC_CRS IOMUX_PAD(0x39c, 0x1a4, 0x10, 0x508, 2, NO_PAD_CTL)
|
||||
#define MX25_PAD_SD1_DATA3__FEC_CRS IOMUX_PAD(0x39c, 0x1a4, 0x10, 0x508, 2, NO_PAD_CTRL)
|
||||
#define MX25_PAD_SD1_DATA3__GPIO_2_28 IOMUX_PAD(0x39c, 0x1a4, 0x15, 0, 0, NO_PAD_CTRL)
|
||||
|
||||
#define MX25_PAD_KPP_ROW0__KPP_ROW0 IOMUX_PAD(0x3a0, 0x1a8, 0x10, 0, 0, PAD_CTL_PKE)
|
||||
|
@ -410,7 +410,7 @@
|
|||
#define MX25_PAD_KPP_COL3__KPP_COL3 IOMUX_PAD(0x3bc, 0x1c4, 0x10, 0, 0, PAD_CTL_PKE | PAD_CTL_ODE)
|
||||
#define MX25_PAD_KPP_COL3__GPIO_3_4 IOMUX_PAD(0x3bc, 0x1c4, 0x15, 0, 0, NO_PAD_CTRL)
|
||||
|
||||
#define MX25_PAD_FEC_MDC__FEC_MDC IOMUX_PAD(0x3c0, 0x1c8, 0x10, 0, 0, NO_PAD_CTL)
|
||||
#define MX25_PAD_FEC_MDC__FEC_MDC IOMUX_PAD(0x3c0, 0x1c8, 0x10, 0, 0, NO_PAD_CTRL)
|
||||
#define MX25_PAD_FEC_MDC__AUD4_TXD IOMUX_PAD(0x3c0, 0x1c8, 0x12, 0x464, 1, NO_PAD_CTRL)
|
||||
#define MX25_PAD_FEC_MDC__GPIO_3_5 IOMUX_PAD(0x3c0, 0x1c8, 0x15, 0, 0, NO_PAD_CTRL)
|
||||
|
||||
|
@ -418,23 +418,23 @@
|
|||
#define MX25_PAD_FEC_MDIO__AUD4_RXD IOMUX_PAD(0x3c4, 0x1cc, 0x12, 0x460, 1, NO_PAD_CTRL)
|
||||
#define MX25_PAD_FEC_MDIO__GPIO_3_6 IOMUX_PAD(0x3c4, 0x1cc, 0x15, 0, 0, NO_PAD_CTRL)
|
||||
|
||||
#define MX25_PAD_FEC_TDATA0__FEC_TDATA0 IOMUX_PAD(0x3c8, 0x1d0, 0x10, 0, 0, NO_PAD_CTL)
|
||||
#define MX25_PAD_FEC_TDATA0__FEC_TDATA0 IOMUX_PAD(0x3c8, 0x1d0, 0x10, 0, 0, NO_PAD_CTRL)
|
||||
#define MX25_PAD_FEC_TDATA0__GPIO_3_7 IOMUX_PAD(0x3c8, 0x1d0, 0x15, 0, 0, NO_PAD_CTRL)
|
||||
|
||||
#define MX25_PAD_FEC_TDATA1__FEC_TDATA1 IOMUX_PAD(0x3cc, 0x1d4, 0x10, 0, 0, NO_PAD_CTL)
|
||||
#define MX25_PAD_FEC_TDATA1__FEC_TDATA1 IOMUX_PAD(0x3cc, 0x1d4, 0x10, 0, 0, NO_PAD_CTRL)
|
||||
#define MX25_PAD_FEC_TDATA1__AUD4_TXFS IOMUX_PAD(0x3cc, 0x1d4, 0x12, 0x474, 1, NO_PAD_CTRL)
|
||||
#define MX25_PAD_FEC_TDATA1__GPIO_3_8 IOMUX_PAD(0x3cc, 0x1d4, 0x15, 0, 0, NO_PAD_CTRL)
|
||||
|
||||
#define MX25_PAD_FEC_TX_EN__FEC_TX_EN IOMUX_PAD(0x3d0, 0x1d8, 0x10, 0, 0, NO_PAD_CTL)
|
||||
#define MX25_PAD_FEC_TX_EN__FEC_TX_EN IOMUX_PAD(0x3d0, 0x1d8, 0x10, 0, 0, NO_PAD_CTRL)
|
||||
#define MX25_PAD_FEC_TX_EN__GPIO_3_9 IOMUX_PAD(0x3d0, 0x1d8, 0x15, 0, 0, NO_PAD_CTRL)
|
||||
|
||||
#define MX25_PAD_FEC_RDATA0__FEC_RDATA0 IOMUX_PAD(0x3d4, 0x1dc, 0x10, 0, 0, PAD_CTL_PUS_100K_DOWN | NO_PAD_CTL)
|
||||
#define MX25_PAD_FEC_RDATA0__FEC_RDATA0 IOMUX_PAD(0x3d4, 0x1dc, 0x10, 0, 0, PAD_CTL_PUS_100K_DOWN | NO_PAD_CTRL)
|
||||
#define MX25_PAD_FEC_RDATA0__GPIO_3_10 IOMUX_PAD(0x3d4, 0x1dc, 0x15, 0, 0, NO_PAD_CTRL)
|
||||
|
||||
#define MX25_PAD_FEC_RDATA1__FEC_RDATA1 IOMUX_PAD(0x3d8, 0x1e0, 0x10, 0, 0, PAD_CTL_PUS_100K_DOWN | NO_PAD_CTL)
|
||||
#define MX25_PAD_FEC_RDATA1__FEC_RDATA1 IOMUX_PAD(0x3d8, 0x1e0, 0x10, 0, 0, PAD_CTL_PUS_100K_DOWN | NO_PAD_CTRL)
|
||||
#define MX25_PAD_FEC_RDATA1__GPIO_3_11 IOMUX_PAD(0x3d8, 0x1e0, 0x15, 0, 0, NO_PAD_CTRL)
|
||||
|
||||
#define MX25_PAD_FEC_RX_DV__FEC_RX_DV IOMUX_PAD(0x3dc, 0x1e4, 0x10, 0, 0, PAD_CTL_PUS_100K_DOWN | NO_PAD_CTL)
|
||||
#define MX25_PAD_FEC_RX_DV__FEC_RX_DV IOMUX_PAD(0x3dc, 0x1e4, 0x10, 0, 0, PAD_CTL_PUS_100K_DOWN | NO_PAD_CTRL)
|
||||
#define MX25_PAD_FEC_RX_DV__CAN2_RX IOMUX_PAD(0x3dc, 0x1e4, 0x14, 0x484, 0, PAD_CTL_PUS_22K_UP)
|
||||
#define MX25_PAD_FEC_RX_DV__GPIO_3_12 IOMUX_PAD(0x3dc, 0x1e4, 0x15, 0, 0, NO_PAD_CTRL)
|
||||
|
||||
|
|
|
@ -41,4 +41,8 @@
|
|||
#define UART1_BASE_ADDR 0x43f90000
|
||||
#define UART2_BASE_ADDR 0x43f94000
|
||||
|
||||
#define MX25_FEC_BASE_ADDR 0x50038000
|
||||
|
||||
#define MX25_INT_FEC 57
|
||||
|
||||
#endif /* __MACH_MX25_H__ */
|
||||
|
|
|
@ -204,14 +204,14 @@ static int __devinit pwm_probe(struct platform_device *pdev)
|
|||
goto err_free_clk;
|
||||
}
|
||||
|
||||
r = request_mem_region(r->start, r->end - r->start + 1, pdev->name);
|
||||
r = request_mem_region(r->start, resource_size(r), pdev->name);
|
||||
if (r == NULL) {
|
||||
dev_err(&pdev->dev, "failed to request memory resource\n");
|
||||
ret = -EBUSY;
|
||||
goto err_free_clk;
|
||||
}
|
||||
|
||||
pwm->mmio_base = ioremap(r->start, r->end - r->start + 1);
|
||||
pwm->mmio_base = ioremap(r->start, resource_size(r));
|
||||
if (pwm->mmio_base == NULL) {
|
||||
dev_err(&pdev->dev, "failed to ioremap() registers\n");
|
||||
ret = -ENODEV;
|
||||
|
@ -241,7 +241,7 @@ static int __devinit pwm_probe(struct platform_device *pdev)
|
|||
return 0;
|
||||
|
||||
err_free_mem:
|
||||
release_mem_region(r->start, r->end - r->start + 1);
|
||||
release_mem_region(r->start, resource_size(r));
|
||||
err_free_clk:
|
||||
clk_put(pwm->clk);
|
||||
err_free:
|
||||
|
@ -271,7 +271,7 @@ static int __devexit pwm_remove(struct platform_device *pdev)
|
|||
iounmap(pwm->mmio_base);
|
||||
|
||||
r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
release_mem_region(r->start, r->end - r->start + 1);
|
||||
release_mem_region(r->start, resource_size(r));
|
||||
|
||||
clk_put(pwm->clk);
|
||||
kfree(pwm);
|
||||
|
|
|
@ -68,6 +68,7 @@ config W90P910_ETH
|
|||
tristate "Nuvoton w90p910 Ethernet support"
|
||||
depends on ARM && ARCH_W90X900
|
||||
select PHYLIB
|
||||
select MII
|
||||
help
|
||||
Say Y here if you want to use built-in Ethernet ports
|
||||
on w90p910 processor.
|
||||
|
|
|
@ -1221,9 +1221,9 @@ static void setup_smart_timing(struct pxafb_info *fbi,
|
|||
static int pxafb_smart_thread(void *arg)
|
||||
{
|
||||
struct pxafb_info *fbi = arg;
|
||||
struct pxafb_mach_info *inf;
|
||||
struct pxafb_mach_info *inf = fbi->dev->platform_data;
|
||||
|
||||
if (!fbi || !fbi->dev->platform_data->smart_update) {
|
||||
if (!inf->smart_update) {
|
||||
pr_err("%s: not properly initialized, thread terminated\n",
|
||||
__func__);
|
||||
return -EINVAL;
|
||||
|
|
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