KVM: x86: introduce lapic_in_kernel
Avoid pointer chasing and memory barriers, and simplify the code when split irqchip (LAPIC in kernel, IOAPIC/PIC in userspace) is introduced. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
Paolo Bonzini
Родитель
d50ab6c1a2
Коммит
35754c987f
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@ -57,7 +57,7 @@ static int kvm_cpu_has_extint(struct kvm_vcpu *v)
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*/
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int kvm_cpu_has_injectable_intr(struct kvm_vcpu *v)
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{
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if (!irqchip_in_kernel(v->kvm))
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if (!lapic_in_kernel(v))
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return v->arch.interrupt.pending;
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if (kvm_cpu_has_extint(v))
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@ -75,7 +75,7 @@ int kvm_cpu_has_injectable_intr(struct kvm_vcpu *v)
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*/
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int kvm_cpu_has_interrupt(struct kvm_vcpu *v)
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{
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if (!irqchip_in_kernel(v->kvm))
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if (!lapic_in_kernel(v))
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return v->arch.interrupt.pending;
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if (kvm_cpu_has_extint(v))
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@ -103,7 +103,7 @@ int kvm_cpu_get_interrupt(struct kvm_vcpu *v)
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{
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int vector;
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if (!irqchip_in_kernel(v->kvm))
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if (!lapic_in_kernel(v))
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return v->arch.interrupt.nr;
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vector = kvm_cpu_get_extint(v);
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@ -92,6 +92,14 @@ static inline int irqchip_in_kernel(struct kvm *kvm)
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return vpic != NULL;
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}
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static inline int lapic_in_kernel(struct kvm_vcpu *vcpu)
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{
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/* Same as irqchip_in_kernel(vcpu->kvm), but with less
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* pointer chasing and no unnecessary memory barriers.
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*/
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return vcpu->arch.apic != NULL;
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}
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void kvm_pic_reset(struct kvm_kpic_state *s);
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void kvm_inject_pending_timer_irqs(struct kvm_vcpu *vcpu);
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@ -1985,7 +1985,7 @@ int kvm_x2apic_msr_write(struct kvm_vcpu *vcpu, u32 msr, u64 data)
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struct kvm_lapic *apic = vcpu->arch.apic;
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u32 reg = (msr - APIC_BASE_MSR) << 4;
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if (!irqchip_in_kernel(vcpu->kvm) || !apic_x2apic_mode(apic))
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if (!lapic_in_kernel(vcpu) || !apic_x2apic_mode(apic))
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return 1;
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if (reg == APIC_ICR2)
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@ -2002,7 +2002,7 @@ int kvm_x2apic_msr_read(struct kvm_vcpu *vcpu, u32 msr, u64 *data)
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struct kvm_lapic *apic = vcpu->arch.apic;
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u32 reg = (msr - APIC_BASE_MSR) << 4, low, high = 0;
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if (!irqchip_in_kernel(vcpu->kvm) || !apic_x2apic_mode(apic))
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if (!lapic_in_kernel(vcpu) || !apic_x2apic_mode(apic))
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return 1;
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if (reg == APIC_DFR || reg == APIC_ICR2) {
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@ -3427,7 +3427,7 @@ static int kvm_arch_setup_async_pf(struct kvm_vcpu *vcpu, gva_t gva, gfn_t gfn)
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static bool can_do_async_pf(struct kvm_vcpu *vcpu)
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{
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if (unlikely(!irqchip_in_kernel(vcpu->kvm) ||
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if (unlikely(!lapic_in_kernel(vcpu) ||
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kvm_event_needs_reinjection(vcpu)))
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return false;
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@ -3060,7 +3060,7 @@ static int cr8_write_interception(struct vcpu_svm *svm)
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u8 cr8_prev = kvm_get_cr8(&svm->vcpu);
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/* instruction emulation calls kvm_set_cr8() */
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r = cr_interception(svm);
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if (irqchip_in_kernel(svm->vcpu.kvm))
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if (lapic_in_kernel(&svm->vcpu))
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return r;
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if (cr8_prev <= kvm_get_cr8(&svm->vcpu))
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return r;
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@ -3305,7 +3305,7 @@ static int interrupt_window_interception(struct vcpu_svm *svm)
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* If the user space waits to inject interrupts, exit as soon as
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* possible
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*/
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if (!irqchip_in_kernel(svm->vcpu.kvm) &&
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if (!lapic_in_kernel(&svm->vcpu) &&
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kvm_run->request_interrupt_window &&
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!kvm_cpu_has_interrupt(&svm->vcpu)) {
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kvm_run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
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@ -809,7 +809,6 @@ static void kvm_cpu_vmxon(u64 addr);
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static void kvm_cpu_vmxoff(void);
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static bool vmx_mpx_supported(void);
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static bool vmx_xsaves_supported(void);
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static int vmx_vm_has_apicv(struct kvm *kvm);
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static int vmx_cpu_uses_apicv(struct kvm_vcpu *vcpu);
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static int vmx_set_tss_addr(struct kvm *kvm, unsigned int addr);
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static void vmx_set_segment(struct kvm_vcpu *vcpu,
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@ -947,9 +946,9 @@ static inline bool cpu_has_vmx_tpr_shadow(void)
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return vmcs_config.cpu_based_exec_ctrl & CPU_BASED_TPR_SHADOW;
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}
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static inline bool vm_need_tpr_shadow(struct kvm *kvm)
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static inline bool cpu_need_tpr_shadow(struct kvm_vcpu *vcpu)
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{
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return (cpu_has_vmx_tpr_shadow()) && (irqchip_in_kernel(kvm));
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return cpu_has_vmx_tpr_shadow() && lapic_in_kernel(vcpu);
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}
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static inline bool cpu_has_secondary_exec_ctrls(void)
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@ -1063,9 +1062,9 @@ static inline bool cpu_has_vmx_ple(void)
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SECONDARY_EXEC_PAUSE_LOOP_EXITING;
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}
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static inline bool vm_need_virtualize_apic_accesses(struct kvm *kvm)
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static inline bool cpu_need_virtualize_apic_accesses(struct kvm_vcpu *vcpu)
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{
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return flexpriority_enabled && irqchip_in_kernel(kvm);
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return flexpriority_enabled && lapic_in_kernel(vcpu);
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}
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static inline bool cpu_has_vmx_vpid(void)
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@ -2378,7 +2377,7 @@ static void nested_vmx_setup_ctls_msrs(struct vcpu_vmx *vmx)
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vmx->nested.nested_vmx_pinbased_ctls_high |=
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PIN_BASED_ALWAYSON_WITHOUT_TRUE_MSR |
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PIN_BASED_VMX_PREEMPTION_TIMER;
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if (vmx_vm_has_apicv(vmx->vcpu.kvm))
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if (vmx_cpu_uses_apicv(&vmx->vcpu))
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vmx->nested.nested_vmx_pinbased_ctls_high |=
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PIN_BASED_POSTED_INTR;
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@ -4333,14 +4332,9 @@ static void vmx_disable_intercept_msr_write_x2apic(u32 msr)
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msr, MSR_TYPE_W);
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}
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static int vmx_vm_has_apicv(struct kvm *kvm)
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{
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return enable_apicv && irqchip_in_kernel(kvm);
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}
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static int vmx_cpu_uses_apicv(struct kvm_vcpu *vcpu)
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{
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return vmx_vm_has_apicv(vcpu->kvm);
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return enable_apicv && lapic_in_kernel(vcpu);
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}
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static int vmx_complete_nested_posted_interrupt(struct kvm_vcpu *vcpu)
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@ -4520,7 +4514,7 @@ static u32 vmx_pin_based_exec_ctrl(struct vcpu_vmx *vmx)
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{
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u32 pin_based_exec_ctrl = vmcs_config.pin_based_exec_ctrl;
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if (!vmx_vm_has_apicv(vmx->vcpu.kvm))
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if (!vmx_cpu_uses_apicv(&vmx->vcpu))
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pin_based_exec_ctrl &= ~PIN_BASED_POSTED_INTR;
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return pin_based_exec_ctrl;
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}
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@ -4532,7 +4526,7 @@ static u32 vmx_exec_control(struct vcpu_vmx *vmx)
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if (vmx->vcpu.arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)
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exec_control &= ~CPU_BASED_MOV_DR_EXITING;
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if (!vm_need_tpr_shadow(vmx->vcpu.kvm)) {
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if (!cpu_need_tpr_shadow(&vmx->vcpu)) {
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exec_control &= ~CPU_BASED_TPR_SHADOW;
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#ifdef CONFIG_X86_64
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exec_control |= CPU_BASED_CR8_STORE_EXITING |
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@ -4549,7 +4543,7 @@ static u32 vmx_exec_control(struct vcpu_vmx *vmx)
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static u32 vmx_secondary_exec_control(struct vcpu_vmx *vmx)
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{
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u32 exec_control = vmcs_config.cpu_based_2nd_exec_ctrl;
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if (!vm_need_virtualize_apic_accesses(vmx->vcpu.kvm))
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if (!cpu_need_virtualize_apic_accesses(&vmx->vcpu))
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exec_control &= ~SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES;
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if (vmx->vpid == 0)
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exec_control &= ~SECONDARY_EXEC_ENABLE_VPID;
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@ -4563,7 +4557,7 @@ static u32 vmx_secondary_exec_control(struct vcpu_vmx *vmx)
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exec_control &= ~SECONDARY_EXEC_UNRESTRICTED_GUEST;
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if (!ple_gap)
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exec_control &= ~SECONDARY_EXEC_PAUSE_LOOP_EXITING;
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if (!vmx_vm_has_apicv(vmx->vcpu.kvm))
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if (!vmx_cpu_uses_apicv(&vmx->vcpu))
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exec_control &= ~(SECONDARY_EXEC_APIC_REGISTER_VIRT |
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SECONDARY_EXEC_VIRTUAL_INTR_DELIVERY);
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exec_control &= ~SECONDARY_EXEC_VIRTUALIZE_X2APIC_MODE;
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@ -4624,7 +4618,7 @@ static int vmx_vcpu_setup(struct vcpu_vmx *vmx)
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vmx_secondary_exec_control(vmx));
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}
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if (vmx_vm_has_apicv(vmx->vcpu.kvm)) {
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if (vmx_cpu_uses_apicv(&vmx->vcpu)) {
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vmcs_write64(EOI_EXIT_BITMAP0, 0);
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vmcs_write64(EOI_EXIT_BITMAP1, 0);
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vmcs_write64(EOI_EXIT_BITMAP2, 0);
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@ -4768,7 +4762,7 @@ static void vmx_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
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if (cpu_has_vmx_tpr_shadow() && !init_event) {
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vmcs_write64(VIRTUAL_APIC_PAGE_ADDR, 0);
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if (vm_need_tpr_shadow(vcpu->kvm))
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if (cpu_need_tpr_shadow(vcpu))
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vmcs_write64(VIRTUAL_APIC_PAGE_ADDR,
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__pa(vcpu->arch.apic->regs));
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vmcs_write32(TPR_THRESHOLD, 0);
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@ -4776,7 +4770,7 @@ static void vmx_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
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kvm_make_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu);
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if (vmx_vm_has_apicv(vcpu->kvm))
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if (vmx_cpu_uses_apicv(vcpu))
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memset(&vmx->pi_desc, 0, sizeof(struct pi_desc));
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if (vmx->vpid != 0)
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@ -5316,7 +5310,7 @@ static int handle_cr(struct kvm_vcpu *vcpu)
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u8 cr8 = (u8)val;
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err = kvm_set_cr8(vcpu, cr8);
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kvm_complete_insn_gp(vcpu, err);
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if (irqchip_in_kernel(vcpu->kvm))
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if (lapic_in_kernel(vcpu))
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return 1;
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if (cr8_prev <= cr8)
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return 1;
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@ -5535,7 +5529,7 @@ static int handle_interrupt_window(struct kvm_vcpu *vcpu)
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* If the user space waits to inject interrupts, exit as soon as
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* possible
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*/
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if (!irqchip_in_kernel(vcpu->kvm) &&
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if (!lapic_in_kernel(vcpu) &&
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vcpu->run->request_interrupt_window &&
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!kvm_cpu_has_interrupt(vcpu)) {
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vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
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@ -7944,10 +7938,10 @@ static void vmx_set_virtual_x2apic_mode(struct kvm_vcpu *vcpu, bool set)
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* apicv
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*/
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if (!cpu_has_vmx_virtualize_x2apic_mode() ||
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!vmx_vm_has_apicv(vcpu->kvm))
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!vmx_cpu_uses_apicv(vcpu))
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return;
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if (!vm_need_tpr_shadow(vcpu->kvm))
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if (!cpu_need_tpr_shadow(vcpu))
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return;
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sec_exec_control = vmcs_read32(SECONDARY_VM_EXEC_CONTROL);
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@ -8052,7 +8046,7 @@ static void vmx_hwapic_irr_update(struct kvm_vcpu *vcpu, int max_irr)
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static void vmx_load_eoi_exitmap(struct kvm_vcpu *vcpu)
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{
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u64 *eoi_exit_bitmap = vcpu->arch.eoi_exit_bitmap;
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if (!vmx_vm_has_apicv(vcpu->kvm))
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if (!vmx_cpu_uses_apicv(vcpu))
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return;
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vmcs_write64(EOI_EXIT_BITMAP0, eoi_exit_bitmap[0]);
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@ -8551,7 +8545,7 @@ static struct kvm_vcpu *vmx_create_vcpu(struct kvm *kvm, unsigned int id)
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put_cpu();
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if (err)
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goto free_vmcs;
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if (vm_need_virtualize_apic_accesses(kvm)) {
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if (cpu_need_virtualize_apic_accesses(&vmx->vcpu)) {
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err = alloc_apic_access_page(kvm);
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if (err)
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goto free_vmcs;
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@ -9344,7 +9338,7 @@ static void prepare_vmcs02(struct kvm_vcpu *vcpu, struct vmcs12 *vmcs12)
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vmcs_write64(APIC_ACCESS_ADDR,
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page_to_phys(vmx->nested.apic_access_page));
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} else if (!(nested_cpu_has_virt_x2apic_mode(vmcs12)) &&
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(vm_need_virtualize_apic_accesses(vmx->vcpu.kvm))) {
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cpu_need_virtualize_apic_accesses(&vmx->vcpu)) {
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exec_control |=
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SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES;
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kvm_vcpu_reload_apic_access_page(vcpu);
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@ -788,7 +788,7 @@ int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
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{
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if (cr8 & CR8_RESERVED_BITS)
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return 1;
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if (irqchip_in_kernel(vcpu->kvm))
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if (lapic_in_kernel(vcpu))
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kvm_lapic_set_tpr(vcpu, cr8);
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else
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vcpu->arch.cr8 = cr8;
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@ -798,7 +798,7 @@ EXPORT_SYMBOL_GPL(kvm_set_cr8);
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unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
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{
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if (irqchip_in_kernel(vcpu->kvm))
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if (lapic_in_kernel(vcpu))
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return kvm_lapic_get_cr8(vcpu);
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else
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return vcpu->arch.cr8;
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@ -3175,7 +3175,7 @@ long kvm_arch_vcpu_ioctl(struct file *filp,
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struct kvm_vapic_addr va;
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r = -EINVAL;
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if (!irqchip_in_kernel(vcpu->kvm))
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if (!lapic_in_kernel(vcpu))
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goto out;
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r = -EFAULT;
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if (copy_from_user(&va, argp, sizeof va))
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@ -5666,7 +5666,7 @@ void kvm_arch_exit(void)
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int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
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{
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++vcpu->stat.halt_exits;
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if (irqchip_in_kernel(vcpu->kvm)) {
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if (lapic_in_kernel(vcpu)) {
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vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
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return 1;
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} else {
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@ -6162,7 +6162,7 @@ void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
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{
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struct page *page = NULL;
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|
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if (!irqchip_in_kernel(vcpu->kvm))
|
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if (!lapic_in_kernel(vcpu))
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return;
|
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|
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if (!kvm_x86_ops->set_apic_access_page_addr)
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|
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@ -6200,7 +6200,7 @@ void kvm_arch_mmu_notifier_invalidate_page(struct kvm *kvm,
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static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
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{
|
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int r;
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bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
|
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bool req_int_win = !lapic_in_kernel(vcpu) &&
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vcpu->run->request_interrupt_window;
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bool req_immediate_exit = false;
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@ -6597,7 +6597,7 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
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}
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|
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/* re-sync apic's tpr */
|
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if (!irqchip_in_kernel(vcpu->kvm)) {
|
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if (!lapic_in_kernel(vcpu)) {
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if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
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r = -EINVAL;
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goto out;
|
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|
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@ -7297,7 +7297,7 @@ bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
|
|||
|
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bool kvm_vcpu_compatible(struct kvm_vcpu *vcpu)
|
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{
|
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return irqchip_in_kernel(vcpu->kvm) == (vcpu->arch.apic != NULL);
|
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return irqchip_in_kernel(vcpu->kvm) == lapic_in_kernel(vcpu);
|
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}
|
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|
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struct static_key kvm_no_apic_vcpu __read_mostly;
|
||||
|
|
@ -7391,7 +7391,7 @@ void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
|
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kvm_mmu_destroy(vcpu);
|
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srcu_read_unlock(&vcpu->kvm->srcu, idx);
|
||||
free_page((unsigned long)vcpu->arch.pio_data);
|
||||
if (!irqchip_in_kernel(vcpu->kvm))
|
||||
if (!lapic_in_kernel(vcpu))
|
||||
static_key_slow_dec(&kvm_no_apic_vcpu);
|
||||
}
|
||||
|
||||
|
|
|
|||
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