ASoC: Added the CPU driver for PCM controllers
Signed-off-by: Jassi Brar <jassi.brar@samsung.com> Acked-by: Liam Girdwood <lrg@slimlogic.co.uk> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
This commit is contained in:
Jassi Brar
Mark Brown
Родитель
acf1aef9ec
Коммит
357a1db94e
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@ -24,6 +24,9 @@ config SND_S3C64XX_SOC_I2S
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select SND_S3C_I2SV2_SOC
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select S3C64XX_DMA
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config SND_S3C_SOC_PCM
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tristate
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config SND_S3C2443_SOC_AC97
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tristate
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select S3C2410_DMA
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@ -5,6 +5,7 @@ snd-soc-s3c2412-i2s-objs := s3c2412-i2s.o
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snd-soc-s3c64xx-i2s-objs := s3c64xx-i2s.o
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snd-soc-s3c2443-ac97-objs := s3c2443-ac97.o
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snd-soc-s3c-i2s-v2-objs := s3c-i2s-v2.o
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snd-soc-s3c-pcm-objs := s3c-pcm.o
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obj-$(CONFIG_SND_S3C24XX_SOC) += snd-soc-s3c24xx.o
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obj-$(CONFIG_SND_S3C24XX_SOC_I2S) += snd-soc-s3c24xx-i2s.o
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@ -12,6 +13,7 @@ obj-$(CONFIG_SND_S3C2443_SOC_AC97) += snd-soc-s3c2443-ac97.o
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obj-$(CONFIG_SND_S3C2412_SOC_I2S) += snd-soc-s3c2412-i2s.o
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obj-$(CONFIG_SND_S3C64XX_SOC_I2S) += snd-soc-s3c64xx-i2s.o
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obj-$(CONFIG_SND_S3C_I2SV2_SOC) += snd-soc-s3c-i2s-v2.o
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obj-$(CONFIG_SND_S3C_SOC_PCM) += snd-soc-s3c-pcm.o
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# S3C24XX Machine Support
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snd-soc-jive-wm8750-objs := jive_wm8750.o
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@ -0,0 +1,552 @@
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/* sound/soc/s3c24xx/s3c-pcm.c
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*
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* ALSA SoC Audio Layer - S3C PCM-Controller driver
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*
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* Copyright (c) 2009 Samsung Electronics Co. Ltd
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* Author: Jaswinder Singh <jassi.brar@samsung.com>
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* based upon I2S drivers by Ben Dooks.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/device.h>
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#include <linux/delay.h>
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#include <linux/clk.h>
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#include <linux/kernel.h>
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#include <linux/gpio.h>
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#include <linux/io.h>
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#include <sound/core.h>
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#include <sound/pcm.h>
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#include <sound/pcm_params.h>
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#include <sound/initval.h>
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#include <sound/soc.h>
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#include <plat/audio.h>
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#include <plat/dma.h>
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#include "s3c-dma.h"
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#include "s3c-pcm.h"
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static struct s3c2410_dma_client s3c_pcm_dma_client_out = {
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.name = "PCM Stereo out"
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};
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static struct s3c2410_dma_client s3c_pcm_dma_client_in = {
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.name = "PCM Stereo in"
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};
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static struct s3c_dma_params s3c_pcm_stereo_out[] = {
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[0] = {
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.client = &s3c_pcm_dma_client_out,
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.dma_size = 4,
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},
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[1] = {
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.client = &s3c_pcm_dma_client_out,
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.dma_size = 4,
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},
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};
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static struct s3c_dma_params s3c_pcm_stereo_in[] = {
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[0] = {
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.client = &s3c_pcm_dma_client_in,
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.dma_size = 4,
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},
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[1] = {
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.client = &s3c_pcm_dma_client_in,
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.dma_size = 4,
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},
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};
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static struct s3c_pcm_info s3c_pcm[2];
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static inline struct s3c_pcm_info *to_info(struct snd_soc_dai *cpu_dai)
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{
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return cpu_dai->private_data;
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}
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static void s3c_pcm_snd_txctrl(struct s3c_pcm_info *pcm, int on)
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{
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void __iomem *regs = pcm->regs;
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u32 ctl, clkctl;
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clkctl = readl(regs + S3C_PCM_CLKCTL);
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ctl = readl(regs + S3C_PCM_CTL);
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ctl &= ~(S3C_PCM_CTL_TXDIPSTICK_MASK
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<< S3C_PCM_CTL_TXDIPSTICK_SHIFT);
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if (on) {
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ctl |= S3C_PCM_CTL_TXDMA_EN;
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ctl |= S3C_PCM_CTL_TXFIFO_EN;
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ctl |= S3C_PCM_CTL_ENABLE;
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ctl |= (0x20<<S3C_PCM_CTL_TXDIPSTICK_SHIFT);
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clkctl |= S3C_PCM_CLKCTL_SERCLK_EN;
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} else {
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ctl &= ~S3C_PCM_CTL_TXDMA_EN;
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ctl &= ~S3C_PCM_CTL_TXFIFO_EN;
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if (!(ctl & S3C_PCM_CTL_RXFIFO_EN)) {
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ctl &= ~S3C_PCM_CTL_ENABLE;
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if (!pcm->idleclk)
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clkctl |= S3C_PCM_CLKCTL_SERCLK_EN;
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}
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}
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writel(clkctl, regs + S3C_PCM_CLKCTL);
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writel(ctl, regs + S3C_PCM_CTL);
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}
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static void s3c_pcm_snd_rxctrl(struct s3c_pcm_info *pcm, int on)
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{
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void __iomem *regs = pcm->regs;
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u32 ctl, clkctl;
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ctl = readl(regs + S3C_PCM_CTL);
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clkctl = readl(regs + S3C_PCM_CLKCTL);
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if (on) {
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ctl |= S3C_PCM_CTL_RXDMA_EN;
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ctl |= S3C_PCM_CTL_RXFIFO_EN;
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ctl |= S3C_PCM_CTL_ENABLE;
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clkctl |= S3C_PCM_CLKCTL_SERCLK_EN;
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} else {
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ctl &= ~S3C_PCM_CTL_RXDMA_EN;
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ctl &= ~S3C_PCM_CTL_RXFIFO_EN;
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if (!(ctl & S3C_PCM_CTL_TXFIFO_EN)) {
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ctl &= ~S3C_PCM_CTL_ENABLE;
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if (!pcm->idleclk)
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clkctl |= S3C_PCM_CLKCTL_SERCLK_EN;
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}
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}
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writel(clkctl, regs + S3C_PCM_CLKCTL);
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writel(ctl, regs + S3C_PCM_CTL);
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}
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static int s3c_pcm_trigger(struct snd_pcm_substream *substream, int cmd,
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struct snd_soc_dai *dai)
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{
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struct snd_soc_pcm_runtime *rtd = substream->private_data;
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struct s3c_pcm_info *pcm = to_info(rtd->dai->cpu_dai);
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unsigned long flags;
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dev_dbg(pcm->dev, "Entered %s\n", __func__);
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switch (cmd) {
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case SNDRV_PCM_TRIGGER_START:
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case SNDRV_PCM_TRIGGER_RESUME:
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case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
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spin_lock_irqsave(&pcm->lock, flags);
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if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
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s3c_pcm_snd_rxctrl(pcm, 1);
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else
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s3c_pcm_snd_txctrl(pcm, 1);
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spin_unlock_irqrestore(&pcm->lock, flags);
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break;
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case SNDRV_PCM_TRIGGER_STOP:
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case SNDRV_PCM_TRIGGER_SUSPEND:
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case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
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spin_lock_irqsave(&pcm->lock, flags);
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if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
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s3c_pcm_snd_rxctrl(pcm, 0);
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else
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s3c_pcm_snd_txctrl(pcm, 0);
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spin_unlock_irqrestore(&pcm->lock, flags);
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break;
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default:
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return -EINVAL;
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}
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return 0;
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}
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static int s3c_pcm_hw_params(struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *params,
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struct snd_soc_dai *socdai)
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{
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struct snd_soc_pcm_runtime *rtd = substream->private_data;
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struct snd_soc_dai_link *dai = rtd->dai;
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struct s3c_pcm_info *pcm = to_info(dai->cpu_dai);
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void __iomem *regs = pcm->regs;
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struct clk *clk;
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int sclk_div, sync_div;
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unsigned long flags;
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u32 clkctl;
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dev_dbg(pcm->dev, "Entered %s\n", __func__);
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
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dai->cpu_dai->dma_data = pcm->dma_playback;
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else
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dai->cpu_dai->dma_data = pcm->dma_capture;
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/* Strictly check for sample size */
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switch (params_format(params)) {
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case SNDRV_PCM_FORMAT_S16_LE:
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break;
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default:
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return -EINVAL;
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}
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spin_lock_irqsave(&pcm->lock, flags);
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/* Get hold of the PCMSOURCE_CLK */
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clkctl = readl(regs + S3C_PCM_CLKCTL);
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if (clkctl & S3C_PCM_CLKCTL_SERCLKSEL_PCLK)
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clk = pcm->pclk;
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else
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clk = pcm->cclk;
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/* Set the SCLK divider */
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sclk_div = clk_get_rate(clk) / pcm->sclk_per_fs /
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params_rate(params) / 2 - 1;
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clkctl &= ~(S3C_PCM_CLKCTL_SCLKDIV_MASK
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<< S3C_PCM_CLKCTL_SCLKDIV_SHIFT);
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clkctl |= ((sclk_div & S3C_PCM_CLKCTL_SCLKDIV_MASK)
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<< S3C_PCM_CLKCTL_SCLKDIV_SHIFT);
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/* Set the SYNC divider */
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sync_div = pcm->sclk_per_fs - 1;
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clkctl &= ~(S3C_PCM_CLKCTL_SYNCDIV_MASK
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<< S3C_PCM_CLKCTL_SYNCDIV_SHIFT);
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clkctl |= ((sync_div & S3C_PCM_CLKCTL_SYNCDIV_MASK)
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<< S3C_PCM_CLKCTL_SYNCDIV_SHIFT);
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writel(clkctl, regs + S3C_PCM_CLKCTL);
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spin_unlock_irqrestore(&pcm->lock, flags);
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dev_dbg(pcm->dev, "PCMSOURCE_CLK-%lu SCLK=%ufs \
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SCLK_DIV=%d SYNC_DIV=%d\n",
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clk_get_rate(clk), pcm->sclk_per_fs,
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sclk_div, sync_div);
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return 0;
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}
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static int s3c_pcm_set_fmt(struct snd_soc_dai *cpu_dai,
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unsigned int fmt)
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{
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struct s3c_pcm_info *pcm = to_info(cpu_dai);
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void __iomem *regs = pcm->regs;
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unsigned long flags;
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int ret = 0;
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u32 ctl;
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dev_dbg(pcm->dev, "Entered %s\n", __func__);
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spin_lock_irqsave(&pcm->lock, flags);
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ctl = readl(regs + S3C_PCM_CTL);
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switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
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case SND_SOC_DAIFMT_NB_NF:
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/* Nothing to do, NB_NF by default */
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break;
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default:
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dev_err(pcm->dev, "Unsupported clock inversion!\n");
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ret = -EINVAL;
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goto exit;
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}
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switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
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case SND_SOC_DAIFMT_CBS_CFS:
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/* Nothing to do, Master by default */
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break;
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default:
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dev_err(pcm->dev, "Unsupported master/slave format!\n");
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ret = -EINVAL;
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goto exit;
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}
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switch (fmt & SND_SOC_DAIFMT_CLOCK_MASK) {
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case SND_SOC_DAIFMT_CONT:
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pcm->idleclk = 1;
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break;
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case SND_SOC_DAIFMT_GATED:
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pcm->idleclk = 0;
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break;
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default:
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dev_err(pcm->dev, "Invalid Clock gating request!\n");
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ret = -EINVAL;
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goto exit;
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}
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switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
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case SND_SOC_DAIFMT_DSP_A:
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ctl |= S3C_PCM_CTL_TXMSB_AFTER_FSYNC;
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ctl |= S3C_PCM_CTL_RXMSB_AFTER_FSYNC;
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break;
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case SND_SOC_DAIFMT_DSP_B:
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ctl &= ~S3C_PCM_CTL_TXMSB_AFTER_FSYNC;
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ctl &= ~S3C_PCM_CTL_RXMSB_AFTER_FSYNC;
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break;
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default:
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dev_err(pcm->dev, "Unsupported data format!\n");
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ret = -EINVAL;
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goto exit;
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}
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writel(ctl, regs + S3C_PCM_CTL);
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exit:
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spin_unlock_irqrestore(&pcm->lock, flags);
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return ret;
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}
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static int s3c_pcm_set_clkdiv(struct snd_soc_dai *cpu_dai,
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int div_id, int div)
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{
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struct s3c_pcm_info *pcm = to_info(cpu_dai);
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switch (div_id) {
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case S3C_PCM_SCLK_PER_FS:
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pcm->sclk_per_fs = div;
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break;
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default:
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return -EINVAL;
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}
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return 0;
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}
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static int s3c_pcm_set_sysclk(struct snd_soc_dai *cpu_dai,
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int clk_id, unsigned int freq, int dir)
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{
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struct s3c_pcm_info *pcm = to_info(cpu_dai);
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void __iomem *regs = pcm->regs;
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u32 clkctl = readl(regs + S3C_PCM_CLKCTL);
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switch (clk_id) {
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case S3C_PCM_CLKSRC_PCLK:
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clkctl |= S3C_PCM_CLKCTL_SERCLKSEL_PCLK;
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break;
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case S3C_PCM_CLKSRC_MUX:
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clkctl &= ~S3C_PCM_CLKCTL_SERCLKSEL_PCLK;
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if (clk_get_rate(pcm->cclk) != freq)
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clk_set_rate(pcm->cclk, freq);
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break;
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default:
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return -EINVAL;
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}
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writel(clkctl, regs + S3C_PCM_CLKCTL);
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return 0;
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}
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static struct snd_soc_dai_ops s3c_pcm_dai_ops = {
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.set_sysclk = s3c_pcm_set_sysclk,
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.set_clkdiv = s3c_pcm_set_clkdiv,
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.trigger = s3c_pcm_trigger,
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.hw_params = s3c_pcm_hw_params,
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.set_fmt = s3c_pcm_set_fmt,
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};
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#define S3C_PCM_RATES SNDRV_PCM_RATE_8000_96000
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#define S3C_PCM_DECLARE(n) \
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{ \
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.name = "samsung-pcm", \
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.id = (n), \
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.symmetric_rates = 1, \
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.ops = &s3c_pcm_dai_ops, \
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.playback = { \
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.channels_min = 2, \
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.channels_max = 2, \
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.rates = S3C_PCM_RATES, \
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.formats = SNDRV_PCM_FMTBIT_S16_LE, \
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}, \
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.capture = { \
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.channels_min = 2, \
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.channels_max = 2, \
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.rates = S3C_PCM_RATES, \
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.formats = SNDRV_PCM_FMTBIT_S16_LE, \
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}, \
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}
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struct snd_soc_dai s3c_pcm_dai[] = {
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S3C_PCM_DECLARE(0),
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S3C_PCM_DECLARE(1),
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};
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EXPORT_SYMBOL_GPL(s3c_pcm_dai);
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static __devinit int s3c_pcm_dev_probe(struct platform_device *pdev)
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{
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struct s3c_pcm_info *pcm;
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struct snd_soc_dai *dai;
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struct resource *mem_res, *dmatx_res, *dmarx_res;
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struct s3c_audio_pdata *pcm_pdata;
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int ret;
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/* Check for valid device index */
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if ((pdev->id < 0) || pdev->id >= ARRAY_SIZE(s3c_pcm)) {
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dev_err(&pdev->dev, "id %d out of range\n", pdev->id);
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return -EINVAL;
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}
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pcm_pdata = pdev->dev.platform_data;
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/* Check for availability of necessary resource */
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dmatx_res = platform_get_resource(pdev, IORESOURCE_DMA, 0);
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if (!dmatx_res) {
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dev_err(&pdev->dev, "Unable to get PCM-TX dma resource\n");
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return -ENXIO;
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}
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|
||||
dmarx_res = platform_get_resource(pdev, IORESOURCE_DMA, 1);
|
||||
if (!dmarx_res) {
|
||||
dev_err(&pdev->dev, "Unable to get PCM-RX dma resource\n");
|
||||
return -ENXIO;
|
||||
}
|
||||
|
||||
mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
if (!mem_res) {
|
||||
dev_err(&pdev->dev, "Unable to get register resource\n");
|
||||
return -ENXIO;
|
||||
}
|
||||
|
||||
if (pcm_pdata && pcm_pdata->cfg_gpio && pcm_pdata->cfg_gpio(pdev)) {
|
||||
dev_err(&pdev->dev, "Unable to configure gpio\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
pcm = &s3c_pcm[pdev->id];
|
||||
pcm->dev = &pdev->dev;
|
||||
|
||||
spin_lock_init(&pcm->lock);
|
||||
|
||||
dai = &s3c_pcm_dai[pdev->id];
|
||||
dai->dev = &pdev->dev;
|
||||
|
||||
/* Default is 128fs */
|
||||
pcm->sclk_per_fs = 128;
|
||||
|
||||
pcm->cclk = clk_get(&pdev->dev, "audio-bus");
|
||||
if (IS_ERR(pcm->cclk)) {
|
||||
dev_err(&pdev->dev, "failed to get audio-bus\n");
|
||||
ret = PTR_ERR(pcm->cclk);
|
||||
goto err1;
|
||||
}
|
||||
clk_enable(pcm->cclk);
|
||||
|
||||
/* record our pcm structure for later use in the callbacks */
|
||||
dai->private_data = pcm;
|
||||
|
||||
if (!request_mem_region(mem_res->start,
|
||||
resource_size(mem_res), "samsung-pcm")) {
|
||||
dev_err(&pdev->dev, "Unable to request register region\n");
|
||||
ret = -EBUSY;
|
||||
goto err2;
|
||||
}
|
||||
|
||||
pcm->regs = ioremap(mem_res->start, 0x100);
|
||||
if (pcm->regs == NULL) {
|
||||
dev_err(&pdev->dev, "cannot ioremap registers\n");
|
||||
ret = -ENXIO;
|
||||
goto err3;
|
||||
}
|
||||
|
||||
pcm->pclk = clk_get(&pdev->dev, "pcm");
|
||||
if (IS_ERR(pcm->pclk)) {
|
||||
dev_err(&pdev->dev, "failed to get pcm_clock\n");
|
||||
ret = -ENOENT;
|
||||
goto err4;
|
||||
}
|
||||
clk_enable(pcm->pclk);
|
||||
|
||||
ret = snd_soc_register_dai(dai);
|
||||
if (ret != 0) {
|
||||
dev_err(&pdev->dev, "failed to get pcm_clock\n");
|
||||
goto err5;
|
||||
}
|
||||
|
||||
s3c_pcm_stereo_in[pdev->id].dma_addr = mem_res->start
|
||||
+ S3C_PCM_RXFIFO;
|
||||
s3c_pcm_stereo_out[pdev->id].dma_addr = mem_res->start
|
||||
+ S3C_PCM_TXFIFO;
|
||||
|
||||
s3c_pcm_stereo_in[pdev->id].channel = dmarx_res->start;
|
||||
s3c_pcm_stereo_out[pdev->id].channel = dmatx_res->start;
|
||||
|
||||
pcm->dma_capture = &s3c_pcm_stereo_in[pdev->id];
|
||||
pcm->dma_playback = &s3c_pcm_stereo_out[pdev->id];
|
||||
|
||||
return 0;
|
||||
|
||||
err5:
|
||||
clk_disable(pcm->pclk);
|
||||
clk_put(pcm->pclk);
|
||||
err4:
|
||||
iounmap(pcm->regs);
|
||||
err3:
|
||||
release_mem_region(mem_res->start, resource_size(mem_res));
|
||||
err2:
|
||||
clk_disable(pcm->cclk);
|
||||
clk_put(pcm->cclk);
|
||||
err1:
|
||||
return ret;
|
||||
}
|
||||
|
||||
static __devexit int s3c_pcm_dev_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct s3c_pcm_info *pcm = &s3c_pcm[pdev->id];
|
||||
struct resource *mem_res;
|
||||
|
||||
iounmap(pcm->regs);
|
||||
|
||||
mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
release_mem_region(mem_res->start, resource_size(mem_res));
|
||||
|
||||
clk_disable(pcm->cclk);
|
||||
clk_disable(pcm->pclk);
|
||||
clk_put(pcm->pclk);
|
||||
clk_put(pcm->cclk);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct platform_driver s3c_pcm_driver = {
|
||||
.probe = s3c_pcm_dev_probe,
|
||||
.remove = s3c_pcm_dev_remove,
|
||||
.driver = {
|
||||
.name = "samsung-pcm",
|
||||
.owner = THIS_MODULE,
|
||||
},
|
||||
};
|
||||
|
||||
static int __init s3c_pcm_init(void)
|
||||
{
|
||||
return platform_driver_register(&s3c_pcm_driver);
|
||||
}
|
||||
module_init(s3c_pcm_init);
|
||||
|
||||
static void __exit s3c_pcm_exit(void)
|
||||
{
|
||||
platform_driver_unregister(&s3c_pcm_driver);
|
||||
}
|
||||
module_exit(s3c_pcm_exit);
|
||||
|
||||
/* Module information */
|
||||
MODULE_AUTHOR("Jaswinder Singh, <jassi.brar@samsung.com>");
|
||||
MODULE_DESCRIPTION("S3C PCM Controller Driver");
|
||||
MODULE_LICENSE("GPL");
|
||||
|
|
@ -0,0 +1,123 @@
|
|||
/* sound/soc/s3c24xx/s3c-pcm.h
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef __S3C_PCM_H
|
||||
#define __S3C_PCM_H __FILE__
|
||||
|
||||
/*Register Offsets */
|
||||
#define S3C_PCM_CTL (0x00)
|
||||
#define S3C_PCM_CLKCTL (0x04)
|
||||
#define S3C_PCM_TXFIFO (0x08)
|
||||
#define S3C_PCM_RXFIFO (0x0C)
|
||||
#define S3C_PCM_IRQCTL (0x10)
|
||||
#define S3C_PCM_IRQSTAT (0x14)
|
||||
#define S3C_PCM_FIFOSTAT (0x18)
|
||||
#define S3C_PCM_CLRINT (0x20)
|
||||
|
||||
/* PCM_CTL Bit-Fields */
|
||||
#define S3C_PCM_CTL_TXDIPSTICK_MASK (0x3f)
|
||||
#define S3C_PCM_CTL_TXDIPSTICK_SHIFT (13)
|
||||
#define S3C_PCM_CTL_RXDIPSTICK_MSK (0x3f<<7)
|
||||
#define S3C_PCM_CTL_TXDMA_EN (0x1<<6)
|
||||
#define S3C_PCM_CTL_RXDMA_EN (0x1<<5)
|
||||
#define S3C_PCM_CTL_TXMSB_AFTER_FSYNC (0x1<<4)
|
||||
#define S3C_PCM_CTL_RXMSB_AFTER_FSYNC (0x1<<3)
|
||||
#define S3C_PCM_CTL_TXFIFO_EN (0x1<<2)
|
||||
#define S3C_PCM_CTL_RXFIFO_EN (0x1<<1)
|
||||
#define S3C_PCM_CTL_ENABLE (0x1<<0)
|
||||
|
||||
/* PCM_CLKCTL Bit-Fields */
|
||||
#define S3C_PCM_CLKCTL_SERCLK_EN (0x1<<19)
|
||||
#define S3C_PCM_CLKCTL_SERCLKSEL_PCLK (0x1<<18)
|
||||
#define S3C_PCM_CLKCTL_SCLKDIV_MASK (0x1ff)
|
||||
#define S3C_PCM_CLKCTL_SYNCDIV_MASK (0x1ff)
|
||||
#define S3C_PCM_CLKCTL_SCLKDIV_SHIFT (9)
|
||||
#define S3C_PCM_CLKCTL_SYNCDIV_SHIFT (0)
|
||||
|
||||
/* PCM_TXFIFO Bit-Fields */
|
||||
#define S3C_PCM_TXFIFO_DVALID (0x1<<16)
|
||||
#define S3C_PCM_TXFIFO_DATA_MSK (0xffff<<0)
|
||||
|
||||
/* PCM_RXFIFO Bit-Fields */
|
||||
#define S3C_PCM_RXFIFO_DVALID (0x1<<16)
|
||||
#define S3C_PCM_RXFIFO_DATA_MSK (0xffff<<0)
|
||||
|
||||
/* PCM_IRQCTL Bit-Fields */
|
||||
#define S3C_PCM_IRQCTL_IRQEN (0x1<<14)
|
||||
#define S3C_PCM_IRQCTL_WRDEN (0x1<<12)
|
||||
#define S3C_PCM_IRQCTL_TXEMPTYEN (0x1<<11)
|
||||
#define S3C_PCM_IRQCTL_TXALMSTEMPTYEN (0x1<<10)
|
||||
#define S3C_PCM_IRQCTL_TXFULLEN (0x1<<9)
|
||||
#define S3C_PCM_IRQCTL_TXALMSTFULLEN (0x1<<8)
|
||||
#define S3C_PCM_IRQCTL_TXSTARVEN (0x1<<7)
|
||||
#define S3C_PCM_IRQCTL_TXERROVRFLEN (0x1<<6)
|
||||
#define S3C_PCM_IRQCTL_RXEMPTEN (0x1<<5)
|
||||
#define S3C_PCM_IRQCTL_RXALMSTEMPTEN (0x1<<4)
|
||||
#define S3C_PCM_IRQCTL_RXFULLEN (0x1<<3)
|
||||
#define S3C_PCM_IRQCTL_RXALMSTFULLEN (0x1<<2)
|
||||
#define S3C_PCM_IRQCTL_RXSTARVEN (0x1<<1)
|
||||
#define S3C_PCM_IRQCTL_RXERROVRFLEN (0x1<<0)
|
||||
|
||||
/* PCM_IRQSTAT Bit-Fields */
|
||||
#define S3C_PCM_IRQSTAT_IRQPND (0x1<<13)
|
||||
#define S3C_PCM_IRQSTAT_WRD_XFER (0x1<<12)
|
||||
#define S3C_PCM_IRQSTAT_TXEMPTY (0x1<<11)
|
||||
#define S3C_PCM_IRQSTAT_TXALMSTEMPTY (0x1<<10)
|
||||
#define S3C_PCM_IRQSTAT_TXFULL (0x1<<9)
|
||||
#define S3C_PCM_IRQSTAT_TXALMSTFULL (0x1<<8)
|
||||
#define S3C_PCM_IRQSTAT_TXSTARV (0x1<<7)
|
||||
#define S3C_PCM_IRQSTAT_TXERROVRFL (0x1<<6)
|
||||
#define S3C_PCM_IRQSTAT_RXEMPT (0x1<<5)
|
||||
#define S3C_PCM_IRQSTAT_RXALMSTEMPT (0x1<<4)
|
||||
#define S3C_PCM_IRQSTAT_RXFULL (0x1<<3)
|
||||
#define S3C_PCM_IRQSTAT_RXALMSTFULL (0x1<<2)
|
||||
#define S3C_PCM_IRQSTAT_RXSTARV (0x1<<1)
|
||||
#define S3C_PCM_IRQSTAT_RXERROVRFL (0x1<<0)
|
||||
|
||||
/* PCM_FIFOSTAT Bit-Fields */
|
||||
#define S3C_PCM_FIFOSTAT_TXCNT_MSK (0x3f<<14)
|
||||
#define S3C_PCM_FIFOSTAT_TXFIFOEMPTY (0x1<<13)
|
||||
#define S3C_PCM_FIFOSTAT_TXFIFOALMSTEMPTY (0x1<<12)
|
||||
#define S3C_PCM_FIFOSTAT_TXFIFOFULL (0x1<<11)
|
||||
#define S3C_PCM_FIFOSTAT_TXFIFOALMSTFULL (0x1<<10)
|
||||
#define S3C_PCM_FIFOSTAT_RXCNT_MSK (0x3f<<4)
|
||||
#define S3C_PCM_FIFOSTAT_RXFIFOEMPTY (0x1<<3)
|
||||
#define S3C_PCM_FIFOSTAT_RXFIFOALMSTEMPTY (0x1<<2)
|
||||
#define S3C_PCM_FIFOSTAT_RXFIFOFULL (0x1<<1)
|
||||
#define S3C_PCM_FIFOSTAT_RXFIFOALMSTFULL (0x1<<0)
|
||||
|
||||
#define S3C_PCM_CLKSRC_PCLK 0
|
||||
#define S3C_PCM_CLKSRC_MUX 1
|
||||
|
||||
#define S3C_PCM_SCLK_PER_FS 0
|
||||
|
||||
/**
|
||||
* struct s3c_pcm_info - S3C PCM Controller information
|
||||
* @dev: The parent device passed to use from the probe.
|
||||
* @regs: The pointer to the device register block.
|
||||
* @dma_playback: DMA information for playback channel.
|
||||
* @dma_capture: DMA information for capture channel.
|
||||
*/
|
||||
struct s3c_pcm_info {
|
||||
spinlock_t lock;
|
||||
struct device *dev;
|
||||
void __iomem *regs;
|
||||
|
||||
unsigned int sclk_per_fs;
|
||||
|
||||
/* Whether to keep PCMSCLK enabled even when idle(no active xfer) */
|
||||
unsigned int idleclk;
|
||||
|
||||
struct clk *pclk;
|
||||
struct clk *cclk;
|
||||
|
||||
struct s3c_dma_params *dma_playback;
|
||||
struct s3c_dma_params *dma_capture;
|
||||
};
|
||||
|
||||
#endif /* __S3C_PCM_H */
|
||||
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