crypto: talitos - add sha224, sha384 and sha512 to existing AEAD algorithms
With this, now all combinations of CBC: AES, 3DES-EDE with HMAC: SHA-1, SHA-224, SHA-256, SHA-384, SHA-512 are supported. Signed-off-by: Horia Geanta <horia.geanta@freescale.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
This commit is contained in:
Horia Geanta
Herbert Xu
Родитель
865d506155
Коммит
357fb60502
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@ -623,7 +623,7 @@ static void talitos_unregister_rng(struct device *dev)
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* crypto alg
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*/
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#define TALITOS_CRA_PRIORITY 3000
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#define TALITOS_MAX_KEY_SIZE 64
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#define TALITOS_MAX_KEY_SIZE 96
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#define TALITOS_MAX_IV_LENGTH 16 /* max of AES_BLOCK_SIZE, DES3_EDE_BLOCK_SIZE */
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#define MD5_BLOCK_SIZE 64
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@ -1956,6 +1956,59 @@ static struct talitos_alg_template driver_algs[] = {
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DESC_HDR_MODE1_MDEU_PAD |
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DESC_HDR_MODE1_MDEU_SHA1_HMAC,
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},
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{ .type = CRYPTO_ALG_TYPE_AEAD,
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.alg.crypto = {
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.cra_name = "authenc(hmac(sha224),cbc(aes))",
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.cra_driver_name = "authenc-hmac-sha224-cbc-aes-talitos",
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.cra_blocksize = AES_BLOCK_SIZE,
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.cra_flags = CRYPTO_ALG_TYPE_AEAD | CRYPTO_ALG_ASYNC,
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.cra_type = &crypto_aead_type,
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.cra_aead = {
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.setkey = aead_setkey,
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.setauthsize = aead_setauthsize,
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.encrypt = aead_encrypt,
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.decrypt = aead_decrypt,
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.givencrypt = aead_givencrypt,
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.geniv = "<built-in>",
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.ivsize = AES_BLOCK_SIZE,
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.maxauthsize = SHA224_DIGEST_SIZE,
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}
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},
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.desc_hdr_template = DESC_HDR_TYPE_IPSEC_ESP |
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DESC_HDR_SEL0_AESU |
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DESC_HDR_MODE0_AESU_CBC |
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DESC_HDR_SEL1_MDEUA |
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DESC_HDR_MODE1_MDEU_INIT |
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DESC_HDR_MODE1_MDEU_PAD |
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DESC_HDR_MODE1_MDEU_SHA224_HMAC,
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},
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{ .type = CRYPTO_ALG_TYPE_AEAD,
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.alg.crypto = {
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.cra_name = "authenc(hmac(sha224),cbc(des3_ede))",
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.cra_driver_name = "authenc-hmac-sha224-cbc-3des-talitos",
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.cra_blocksize = DES3_EDE_BLOCK_SIZE,
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.cra_flags = CRYPTO_ALG_TYPE_AEAD | CRYPTO_ALG_ASYNC,
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.cra_type = &crypto_aead_type,
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.cra_aead = {
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.setkey = aead_setkey,
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.setauthsize = aead_setauthsize,
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.encrypt = aead_encrypt,
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.decrypt = aead_decrypt,
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.givencrypt = aead_givencrypt,
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.geniv = "<built-in>",
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.ivsize = DES3_EDE_BLOCK_SIZE,
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.maxauthsize = SHA224_DIGEST_SIZE,
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}
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},
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.desc_hdr_template = DESC_HDR_TYPE_IPSEC_ESP |
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DESC_HDR_SEL0_DEU |
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DESC_HDR_MODE0_DEU_CBC |
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DESC_HDR_MODE0_DEU_3DES |
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DESC_HDR_SEL1_MDEUA |
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DESC_HDR_MODE1_MDEU_INIT |
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DESC_HDR_MODE1_MDEU_PAD |
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DESC_HDR_MODE1_MDEU_SHA224_HMAC,
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},
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{ .type = CRYPTO_ALG_TYPE_AEAD,
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.alg.crypto = {
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.cra_name = "authenc(hmac(sha256),cbc(aes))",
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@ -2009,6 +2062,112 @@ static struct talitos_alg_template driver_algs[] = {
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DESC_HDR_MODE1_MDEU_PAD |
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DESC_HDR_MODE1_MDEU_SHA256_HMAC,
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},
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{ .type = CRYPTO_ALG_TYPE_AEAD,
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.alg.crypto = {
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.cra_name = "authenc(hmac(sha384),cbc(aes))",
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.cra_driver_name = "authenc-hmac-sha384-cbc-aes-talitos",
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.cra_blocksize = AES_BLOCK_SIZE,
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.cra_flags = CRYPTO_ALG_TYPE_AEAD | CRYPTO_ALG_ASYNC,
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.cra_type = &crypto_aead_type,
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.cra_aead = {
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.setkey = aead_setkey,
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.setauthsize = aead_setauthsize,
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.encrypt = aead_encrypt,
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.decrypt = aead_decrypt,
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.givencrypt = aead_givencrypt,
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.geniv = "<built-in>",
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.ivsize = AES_BLOCK_SIZE,
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.maxauthsize = SHA384_DIGEST_SIZE,
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}
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},
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.desc_hdr_template = DESC_HDR_TYPE_IPSEC_ESP |
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DESC_HDR_SEL0_AESU |
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DESC_HDR_MODE0_AESU_CBC |
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DESC_HDR_SEL1_MDEUB |
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DESC_HDR_MODE1_MDEU_INIT |
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DESC_HDR_MODE1_MDEU_PAD |
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DESC_HDR_MODE1_MDEUB_SHA384_HMAC,
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},
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{ .type = CRYPTO_ALG_TYPE_AEAD,
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.alg.crypto = {
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.cra_name = "authenc(hmac(sha384),cbc(des3_ede))",
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.cra_driver_name = "authenc-hmac-sha384-cbc-3des-talitos",
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.cra_blocksize = DES3_EDE_BLOCK_SIZE,
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.cra_flags = CRYPTO_ALG_TYPE_AEAD | CRYPTO_ALG_ASYNC,
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.cra_type = &crypto_aead_type,
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.cra_aead = {
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.setkey = aead_setkey,
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.setauthsize = aead_setauthsize,
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.encrypt = aead_encrypt,
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.decrypt = aead_decrypt,
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.givencrypt = aead_givencrypt,
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.geniv = "<built-in>",
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.ivsize = DES3_EDE_BLOCK_SIZE,
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.maxauthsize = SHA384_DIGEST_SIZE,
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}
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},
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.desc_hdr_template = DESC_HDR_TYPE_IPSEC_ESP |
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DESC_HDR_SEL0_DEU |
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DESC_HDR_MODE0_DEU_CBC |
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DESC_HDR_MODE0_DEU_3DES |
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DESC_HDR_SEL1_MDEUB |
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DESC_HDR_MODE1_MDEU_INIT |
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DESC_HDR_MODE1_MDEU_PAD |
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DESC_HDR_MODE1_MDEUB_SHA384_HMAC,
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},
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{ .type = CRYPTO_ALG_TYPE_AEAD,
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.alg.crypto = {
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.cra_name = "authenc(hmac(sha512),cbc(aes))",
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.cra_driver_name = "authenc-hmac-sha512-cbc-aes-talitos",
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.cra_blocksize = AES_BLOCK_SIZE,
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.cra_flags = CRYPTO_ALG_TYPE_AEAD | CRYPTO_ALG_ASYNC,
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.cra_type = &crypto_aead_type,
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.cra_aead = {
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.setkey = aead_setkey,
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.setauthsize = aead_setauthsize,
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.encrypt = aead_encrypt,
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.decrypt = aead_decrypt,
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.givencrypt = aead_givencrypt,
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.geniv = "<built-in>",
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.ivsize = AES_BLOCK_SIZE,
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.maxauthsize = SHA512_DIGEST_SIZE,
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}
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},
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.desc_hdr_template = DESC_HDR_TYPE_IPSEC_ESP |
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DESC_HDR_SEL0_AESU |
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DESC_HDR_MODE0_AESU_CBC |
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DESC_HDR_SEL1_MDEUB |
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DESC_HDR_MODE1_MDEU_INIT |
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DESC_HDR_MODE1_MDEU_PAD |
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DESC_HDR_MODE1_MDEUB_SHA512_HMAC,
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},
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{ .type = CRYPTO_ALG_TYPE_AEAD,
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.alg.crypto = {
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.cra_name = "authenc(hmac(sha512),cbc(des3_ede))",
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.cra_driver_name = "authenc-hmac-sha512-cbc-3des-talitos",
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.cra_blocksize = DES3_EDE_BLOCK_SIZE,
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.cra_flags = CRYPTO_ALG_TYPE_AEAD | CRYPTO_ALG_ASYNC,
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.cra_type = &crypto_aead_type,
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.cra_aead = {
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.setkey = aead_setkey,
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.setauthsize = aead_setauthsize,
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.encrypt = aead_encrypt,
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.decrypt = aead_decrypt,
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.givencrypt = aead_givencrypt,
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.geniv = "<built-in>",
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.ivsize = DES3_EDE_BLOCK_SIZE,
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.maxauthsize = SHA512_DIGEST_SIZE,
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}
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},
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.desc_hdr_template = DESC_HDR_TYPE_IPSEC_ESP |
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DESC_HDR_SEL0_DEU |
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DESC_HDR_MODE0_DEU_CBC |
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DESC_HDR_MODE0_DEU_3DES |
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DESC_HDR_SEL1_MDEUB |
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DESC_HDR_MODE1_MDEU_INIT |
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DESC_HDR_MODE1_MDEU_PAD |
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DESC_HDR_MODE1_MDEUB_SHA512_HMAC,
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},
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{ .type = CRYPTO_ALG_TYPE_AEAD,
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.alg.crypto = {
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.cra_name = "authenc(hmac(md5),cbc(aes))",
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@ -326,6 +326,12 @@ extern int talitos_submit(struct device *dev, int ch, struct talitos_desc *desc,
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DESC_HDR_MODE1_MDEU_HMAC)
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#define DESC_HDR_MODE1_MDEU_SHA1_HMAC (DESC_HDR_MODE1_MDEU_SHA1 | \
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DESC_HDR_MODE1_MDEU_HMAC)
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#define DESC_HDR_MODE1_MDEU_SHA224_HMAC (DESC_HDR_MODE1_MDEU_SHA224 | \
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DESC_HDR_MODE1_MDEU_HMAC)
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#define DESC_HDR_MODE1_MDEUB_SHA384_HMAC (DESC_HDR_MODE1_MDEUB_SHA384 | \
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DESC_HDR_MODE1_MDEU_HMAC)
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#define DESC_HDR_MODE1_MDEUB_SHA512_HMAC (DESC_HDR_MODE1_MDEUB_SHA512 | \
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DESC_HDR_MODE1_MDEU_HMAC)
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/* direction of overall data flow (DIR) */
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#define DESC_HDR_DIR_INBOUND cpu_to_be32(0x00000002)
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