[CPUFREQ] powernow-k8: Limit Pstate transition latency check

The Pstate transition latency check was added for broken F10h BIOSen
which wrongly contain a value of 0 for transition and bus master
latency. Fam11h and later, however, (will) have similar transition
latency so extend that behavior for them too.

Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
Signed-off-by: Dave Jones <davej@redhat.com>

arch/x86/kernel/cpu/cpufreq/powernow-k8.c

@@ -1023,13 +1023,12 @@ static int get_transition_latency(struct powernow_k8_data *data)
 	}
 	if (max_latency == 0) {
 		/*
-		 * Fam 11h always returns 0 as transition latency.
+		 * Fam 11h and later may return 0 as transition latency. This
-		 * This is intended and means "very fast". While cpufreq core
+		 * is intended and means "very fast". While cpufreq core and
-		 * and governors currently can handle that gracefully, better
+		 * governors currently can handle that gracefully, better set it
-		 * set it to 1 to avoid problems in the future.
+		 * to 1 to avoid problems in the future.
-		 * For all others it's a BIOS bug.
 		 */
-		if (boot_cpu_data.x86 != 0x11)
+		if (boot_cpu_data.x86 < 0x11)
 			printk(KERN_ERR FW_WARN PFX "Invalid zero transition "
 				"latency\n");
 		max_latency = 1;