RDMA/mlx4: Redo TX checksum offload in line with docs
Ingress checksum offload was not working for IPv6 frames because the conditional expression that checks validation status passed from the hardware was not matching the algorithm described in the documentation. This patch defines L4_CSUM flag (which falls inside the badfcs_enc field in the existing definition of the CQE layout) and replaces the conditional expression with the one defined in the "ConnectX(r) Family Programmer's Manual" document. Link: https://lore.kernel.org/r/20191219134847.413582-1-leon@kernel.org Signed-off-by: Eugene Crosser <evgenii.cherkashin@profitbricks.com> Reviewed-by: Jack Wang <jinpu.wang@profitbricks.com> Signed-off-by: Leon Romanovsky <leonro@mellanox.com> Signed-off-by: Jason Gunthorpe <jgg@mellanox.com>
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@ -568,18 +568,13 @@ static void mlx4_ib_handle_error_cqe(struct mlx4_err_cqe *cqe,
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wc->vendor_err = cqe->vendor_err_syndrome;
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}
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static int mlx4_ib_ipoib_csum_ok(__be16 status, __be16 checksum)
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static int mlx4_ib_ipoib_csum_ok(__be16 status, u8 badfcs_enc, __be16 checksum)
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{
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return ((status & cpu_to_be16(MLX4_CQE_STATUS_IPV4 |
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MLX4_CQE_STATUS_IPV4F |
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MLX4_CQE_STATUS_IPV4OPT |
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MLX4_CQE_STATUS_IPV6 |
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MLX4_CQE_STATUS_IPOK)) ==
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cpu_to_be16(MLX4_CQE_STATUS_IPV4 |
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MLX4_CQE_STATUS_IPOK)) &&
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(status & cpu_to_be16(MLX4_CQE_STATUS_UDP |
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MLX4_CQE_STATUS_TCP)) &&
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checksum == cpu_to_be16(0xffff);
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return ((badfcs_enc & MLX4_CQE_STATUS_L4_CSUM) ||
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((status & cpu_to_be16(MLX4_CQE_STATUS_IPOK)) &&
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(status & cpu_to_be16(MLX4_CQE_STATUS_TCP |
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MLX4_CQE_STATUS_UDP)) &&
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(checksum == cpu_to_be16(0xffff))));
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}
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static void use_tunnel_data(struct mlx4_ib_qp *qp, struct mlx4_ib_cq *cq, struct ib_wc *wc,
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@ -855,6 +850,7 @@ repoll:
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wc->wc_flags |= g_mlpath_rqpn & 0x80000000 ? IB_WC_GRH : 0;
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wc->pkey_index = be32_to_cpu(cqe->immed_rss_invalid) & 0x7f;
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wc->wc_flags |= mlx4_ib_ipoib_csum_ok(cqe->status,
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cqe->badfcs_enc,
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cqe->checksum) ? IB_WC_IP_CSUM_OK : 0;
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if (is_eth) {
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wc->slid = 0;
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@ -130,6 +130,11 @@ enum {
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MLX4_CQE_STATUS_IPOK = 1 << 12,
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};
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/* L4_CSUM is logically part of status, but has to checked against badfcs_enc */
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enum {
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MLX4_CQE_STATUS_L4_CSUM = 1 << 2,
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};
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enum {
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MLX4_CQE_LLC = 1,
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MLX4_CQE_SNAP = 1 << 1,
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