ARM: SAMSUNG: Add support s3c2416-adc for S3C2416/S3C2450
The ADC of the S3C2416/2450 SoC is 10 or 12 bit wide, has its source selection in the register base+0x18 and its width selection in bit 03 of the ADCCON register. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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Родитель
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Коммит
35cc3cea2c
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@ -60,6 +60,7 @@
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#include <plat/iic-core.h>
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#include <plat/iic-core.h>
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#include <plat/fb-core.h>
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#include <plat/fb-core.h>
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#include <plat/nand-core.h>
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#include <plat/nand-core.h>
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#include <plat/adc-core.h>
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static struct map_desc s3c2416_iodesc[] __initdata = {
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static struct map_desc s3c2416_iodesc[] __initdata = {
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IODESC_ENT(WATCHDOG),
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IODESC_ENT(WATCHDOG),
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@ -97,6 +98,8 @@ int __init s3c2416_init(void)
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s3c_fb_setname("s3c2443-fb");
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s3c_fb_setname("s3c2443-fb");
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s3c_adc_setname("s3c2416-adc");
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register_syscore_ops(&s3c2416_pm_syscore_ops);
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register_syscore_ops(&s3c2416_pm_syscore_ops);
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register_syscore_ops(&s3c24xx_irq_syscore_ops);
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register_syscore_ops(&s3c24xx_irq_syscore_ops);
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@ -42,6 +42,7 @@
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enum s3c_cpu_type {
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enum s3c_cpu_type {
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TYPE_ADCV1, /* S3C24XX */
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TYPE_ADCV1, /* S3C24XX */
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TYPE_ADCV11, /* S3C2443 */
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TYPE_ADCV11, /* S3C2443 */
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TYPE_ADCV12, /* S3C2416, S3C2450 */
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TYPE_ADCV2, /* S3C64XX, S5P64X0, S5PC100 */
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TYPE_ADCV2, /* S3C64XX, S5P64X0, S5PC100 */
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TYPE_ADCV3, /* S5PV210, S5PC110, EXYNOS4210 */
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TYPE_ADCV3, /* S5PV210, S5PC110, EXYNOS4210 */
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};
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};
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@ -107,7 +108,7 @@ static inline void s3c_adc_select(struct adc_device *adc,
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if (!client->is_ts) {
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if (!client->is_ts) {
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if (cpu == TYPE_ADCV3)
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if (cpu == TYPE_ADCV3)
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writel(client->channel & 0xf, adc->regs + S5P_ADCMUX);
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writel(client->channel & 0xf, adc->regs + S5P_ADCMUX);
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else if (cpu == TYPE_ADCV11)
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else if (cpu == TYPE_ADCV11 || cpu == TYPE_ADCV12)
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writel(client->channel & 0xf,
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writel(client->channel & 0xf,
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adc->regs + S3C2443_ADCMUX);
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adc->regs + S3C2443_ADCMUX);
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else
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else
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@ -302,7 +303,7 @@ static irqreturn_t s3c_adc_irq(int irq, void *pw)
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data0 &= 0x3ff;
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data0 &= 0x3ff;
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data1 &= 0x3ff;
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data1 &= 0x3ff;
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} else {
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} else {
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/* S3C64XX/S5P ADC resolution is 12-bit */
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/* S3C2416/S3C64XX/S5P ADC resolution is 12-bit */
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data0 &= 0xfff;
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data0 &= 0xfff;
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data1 &= 0xfff;
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data1 &= 0xfff;
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}
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}
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@ -337,6 +338,7 @@ static int s3c_adc_probe(struct platform_device *pdev)
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struct device *dev = &pdev->dev;
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struct device *dev = &pdev->dev;
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struct adc_device *adc;
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struct adc_device *adc;
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struct resource *regs;
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struct resource *regs;
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enum s3c_cpu_type cpu = platform_get_device_id(pdev)->driver_data;
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int ret;
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int ret;
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unsigned tmp;
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unsigned tmp;
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@ -399,10 +401,13 @@ static int s3c_adc_probe(struct platform_device *pdev)
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clk_enable(adc->clk);
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clk_enable(adc->clk);
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tmp = adc->prescale | S3C2410_ADCCON_PRSCEN;
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tmp = adc->prescale | S3C2410_ADCCON_PRSCEN;
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if (platform_get_device_id(pdev)->driver_data != TYPE_ADCV1) {
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/* Enable 12-bit ADC resolution */
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/* Enable 12-bit ADC resolution */
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if (cpu == TYPE_ADCV12)
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tmp |= S3C2416_ADCCON_RESSEL;
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if (cpu == TYPE_ADCV2 || cpu == TYPE_ADCV3)
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tmp |= S3C64XX_ADCCON_RESSEL;
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tmp |= S3C64XX_ADCCON_RESSEL;
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}
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writel(tmp, adc->regs + S3C2410_ADCCON);
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writel(tmp, adc->regs + S3C2410_ADCCON);
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dev_info(dev, "attached adc driver\n");
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dev_info(dev, "attached adc driver\n");
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@ -469,6 +474,7 @@ static int s3c_adc_resume(struct device *dev)
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struct platform_device *pdev = container_of(dev,
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struct platform_device *pdev = container_of(dev,
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struct platform_device, dev);
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struct platform_device, dev);
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struct adc_device *adc = platform_get_drvdata(pdev);
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struct adc_device *adc = platform_get_drvdata(pdev);
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enum s3c_cpu_type cpu = platform_get_device_id(pdev)->driver_data;
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int ret;
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int ret;
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unsigned long tmp;
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unsigned long tmp;
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@ -479,9 +485,13 @@ static int s3c_adc_resume(struct device *dev)
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enable_irq(adc->irq);
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enable_irq(adc->irq);
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tmp = adc->prescale | S3C2410_ADCCON_PRSCEN;
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tmp = adc->prescale | S3C2410_ADCCON_PRSCEN;
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/* Enable 12-bit ADC resolution */
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/* Enable 12-bit ADC resolution */
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if (platform_get_device_id(pdev)->driver_data != TYPE_ADCV1)
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if (cpu == TYPE_ADCV12)
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tmp |= S3C2416_ADCCON_RESSEL;
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if (cpu == TYPE_ADCV2 || cpu == TYPE_ADCV3)
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tmp |= S3C64XX_ADCCON_RESSEL;
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tmp |= S3C64XX_ADCCON_RESSEL;
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writel(tmp, adc->regs + S3C2410_ADCCON);
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writel(tmp, adc->regs + S3C2410_ADCCON);
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return 0;
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return 0;
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@ -499,6 +509,9 @@ static struct platform_device_id s3c_adc_driver_ids[] = {
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}, {
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}, {
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.name = "s3c2443-adc",
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.name = "s3c2443-adc",
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.driver_data = TYPE_ADCV11,
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.driver_data = TYPE_ADCV11,
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}, {
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.name = "s3c2416-adc",
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.driver_data = TYPE_ADCV12,
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}, {
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}, {
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.name = "s3c64xx-adc",
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.name = "s3c64xx-adc",
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.driver_data = TYPE_ADCV2,
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.driver_data = TYPE_ADCV2,
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