Merge branch 'xtensa-dma-fixes' (early part) into xtensa-fixes
This switches xtensa arch to the generic noncoherent direct mapping operations, adds support for DMA_ATTR_NO_KERNEL_MAPPING attribute and allows for platform-specific handling of coherent memory. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
This commit is contained in:
Коммит
35d231db53
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@ -4,12 +4,15 @@ config ZONE_DMA
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config XTENSA
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def_bool y
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select ARCH_HAS_SYNC_DMA_FOR_CPU
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select ARCH_HAS_SYNC_DMA_FOR_DEVICE
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select ARCH_NO_COHERENT_DMA_MMAP if !MMU
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select ARCH_WANT_FRAME_POINTERS
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select ARCH_WANT_IPC_PARSE_VERSION
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select BUILDTIME_EXTABLE_SORT
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select CLONE_BACKWARDS
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select COMMON_CLK
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select DMA_NONCOHERENT_OPS
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select GENERIC_ATOMIC64
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select GENERIC_CLOCKEVENTS
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select GENERIC_IRQ_SHOW
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@ -3,6 +3,7 @@ generic-y += compat.h
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generic-y += device.h
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generic-y += div64.h
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generic-y += dma-contiguous.h
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generic-y += dma-mapping.h
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generic-y += emergency-restart.h
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generic-y += exec.h
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generic-y += extable.h
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@ -1,26 +0,0 @@
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/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2003 - 2005 Tensilica Inc.
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* Copyright (C) 2015 Cadence Design Systems Inc.
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*/
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#ifndef _XTENSA_DMA_MAPPING_H
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#define _XTENSA_DMA_MAPPING_H
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#include <asm/cache.h>
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#include <asm/io.h>
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#include <linux/mm.h>
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#include <linux/scatterlist.h>
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extern const struct dma_map_ops xtensa_dma_map_ops;
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static inline const struct dma_map_ops *get_arch_dma_ops(struct bus_type *bus)
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{
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return &xtensa_dma_map_ops;
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}
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#endif /* _XTENSA_DMA_MAPPING_H */
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@ -63,12 +63,6 @@
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#error XCHAL_KSEG_PADDR is not properly aligned to XCHAL_KSEG_ALIGNMENT
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#endif
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#else
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#define XCHAL_KSEG_CACHED_VADDR __XTENSA_UL_CONST(0xd0000000)
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#define XCHAL_KSEG_BYPASS_VADDR __XTENSA_UL_CONST(0xd8000000)
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#define XCHAL_KSEG_SIZE __XTENSA_UL_CONST(0x08000000)
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#endif
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#ifndef CONFIG_KASAN
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@ -66,6 +66,7 @@
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#define FIRST_USER_ADDRESS 0UL
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#define FIRST_USER_PGD_NR (FIRST_USER_ADDRESS >> PGDIR_SHIFT)
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#ifdef CONFIG_MMU
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/*
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* Virtual memory area. We keep a distance to other memory regions to be
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* on the safe side. We also use this area for cache aliasing.
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@ -80,6 +81,13 @@
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#define TLBTEMP_SIZE ICACHE_WAY_SIZE
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#endif
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#else
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#define VMALLOC_START __XTENSA_UL_CONST(0)
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#define VMALLOC_END __XTENSA_UL_CONST(0xffffffff)
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#endif
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/*
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* For the Xtensa architecture, the PTE layout is as follows:
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*
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@ -75,4 +75,31 @@ extern void platform_calibrate_ccount (void);
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*/
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void cpu_reset(void) __attribute__((noreturn));
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/*
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* Memory caching is platform-dependent in noMMU xtensa configurations.
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* The following set of functions should be implemented in platform code
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* in order to enable coherent DMA memory operations when CONFIG_MMU is not
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* enabled. Default implementations do nothing and issue a warning.
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*/
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/*
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* Check whether p points to a cached memory.
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*/
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bool platform_vaddr_cached(const void *p);
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/*
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* Check whether p points to an uncached memory.
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*/
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bool platform_vaddr_uncached(const void *p);
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/*
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* Return pointer to an uncached view of the cached sddress p.
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*/
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void *platform_vaddr_to_uncached(void *p);
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/*
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* Return pointer to a cached view of the uncached sddress p.
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*/
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void *platform_vaddr_to_cached(void *p);
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#endif /* _XTENSA_PLATFORM_H */
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@ -16,26 +16,25 @@
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*/
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#include <linux/dma-contiguous.h>
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#include <linux/dma-noncoherent.h>
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#include <linux/dma-direct.h>
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#include <linux/gfp.h>
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#include <linux/highmem.h>
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#include <linux/mm.h>
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <linux/string.h>
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#include <linux/types.h>
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#include <asm/cacheflush.h>
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#include <asm/io.h>
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#include <asm/platform.h>
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static void do_cache_op(dma_addr_t dma_handle, size_t size,
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static void do_cache_op(phys_addr_t paddr, size_t size,
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void (*fn)(unsigned long, unsigned long))
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{
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unsigned long off = dma_handle & (PAGE_SIZE - 1);
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unsigned long pfn = PFN_DOWN(dma_handle);
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unsigned long off = paddr & (PAGE_SIZE - 1);
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unsigned long pfn = PFN_DOWN(paddr);
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struct page *page = pfn_to_page(pfn);
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if (!PageHighMem(page))
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fn((unsigned long)bus_to_virt(dma_handle), size);
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fn((unsigned long)phys_to_virt(paddr), size);
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else
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while (size > 0) {
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size_t sz = min_t(size_t, size, PAGE_SIZE - off);
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@ -49,14 +48,13 @@ static void do_cache_op(dma_addr_t dma_handle, size_t size,
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}
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}
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static void xtensa_sync_single_for_cpu(struct device *dev,
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dma_addr_t dma_handle, size_t size,
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enum dma_data_direction dir)
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void arch_sync_dma_for_cpu(struct device *dev, phys_addr_t paddr,
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size_t size, enum dma_data_direction dir)
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{
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switch (dir) {
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case DMA_BIDIRECTIONAL:
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case DMA_FROM_DEVICE:
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do_cache_op(dma_handle, size, __invalidate_dcache_range);
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do_cache_op(paddr, size, __invalidate_dcache_range);
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break;
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case DMA_NONE:
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@ -68,15 +66,14 @@ static void xtensa_sync_single_for_cpu(struct device *dev,
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}
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}
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static void xtensa_sync_single_for_device(struct device *dev,
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dma_addr_t dma_handle, size_t size,
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enum dma_data_direction dir)
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void arch_sync_dma_for_device(struct device *dev, phys_addr_t paddr,
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size_t size, enum dma_data_direction dir)
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{
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switch (dir) {
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case DMA_BIDIRECTIONAL:
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case DMA_TO_DEVICE:
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if (XCHAL_DCACHE_IS_WRITEBACK)
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do_cache_op(dma_handle, size, __flush_dcache_range);
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do_cache_op(paddr, size, __flush_dcache_range);
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break;
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case DMA_NONE:
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@ -88,43 +85,66 @@ static void xtensa_sync_single_for_device(struct device *dev,
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}
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}
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static void xtensa_sync_sg_for_cpu(struct device *dev,
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struct scatterlist *sg, int nents,
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enum dma_data_direction dir)
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#ifdef CONFIG_MMU
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bool platform_vaddr_cached(const void *p)
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{
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struct scatterlist *s;
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int i;
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unsigned long addr = (unsigned long)p;
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for_each_sg(sg, s, nents, i) {
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xtensa_sync_single_for_cpu(dev, sg_dma_address(s),
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sg_dma_len(s), dir);
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}
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return addr >= XCHAL_KSEG_CACHED_VADDR &&
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addr - XCHAL_KSEG_CACHED_VADDR < XCHAL_KSEG_SIZE;
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}
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static void xtensa_sync_sg_for_device(struct device *dev,
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struct scatterlist *sg, int nents,
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enum dma_data_direction dir)
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bool platform_vaddr_uncached(const void *p)
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{
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struct scatterlist *s;
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int i;
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unsigned long addr = (unsigned long)p;
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for_each_sg(sg, s, nents, i) {
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xtensa_sync_single_for_device(dev, sg_dma_address(s),
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sg_dma_len(s), dir);
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}
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return addr >= XCHAL_KSEG_BYPASS_VADDR &&
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addr - XCHAL_KSEG_BYPASS_VADDR < XCHAL_KSEG_SIZE;
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}
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void *platform_vaddr_to_uncached(void *p)
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{
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return p + XCHAL_KSEG_BYPASS_VADDR - XCHAL_KSEG_CACHED_VADDR;
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}
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void *platform_vaddr_to_cached(void *p)
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{
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return p + XCHAL_KSEG_CACHED_VADDR - XCHAL_KSEG_BYPASS_VADDR;
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}
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#else
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bool __attribute__((weak)) platform_vaddr_cached(const void *p)
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{
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WARN_ONCE(1, "Default %s implementation is used\n", __func__);
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return true;
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}
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bool __attribute__((weak)) platform_vaddr_uncached(const void *p)
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{
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WARN_ONCE(1, "Default %s implementation is used\n", __func__);
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return false;
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}
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void __attribute__((weak)) *platform_vaddr_to_uncached(void *p)
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{
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WARN_ONCE(1, "Default %s implementation is used\n", __func__);
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return p;
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}
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void __attribute__((weak)) *platform_vaddr_to_cached(void *p)
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{
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WARN_ONCE(1, "Default %s implementation is used\n", __func__);
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return p;
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}
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#endif
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/*
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* Note: We assume that the full memory space is always mapped to 'kseg'
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* Otherwise we have to use page attributes (not implemented).
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*/
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static void *xtensa_dma_alloc(struct device *dev, size_t size,
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dma_addr_t *handle, gfp_t flag,
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unsigned long attrs)
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void *arch_dma_alloc(struct device *dev, size_t size, dma_addr_t *handle,
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gfp_t flag, unsigned long attrs)
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{
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unsigned long ret;
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unsigned long uncached;
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unsigned long count = PAGE_ALIGN(size) >> PAGE_SHIFT;
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struct page *page = NULL;
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@ -147,6 +167,10 @@ static void *xtensa_dma_alloc(struct device *dev, size_t size,
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*handle = phys_to_dma(dev, page_to_phys(page));
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if (attrs & DMA_ATTR_NO_KERNEL_MAPPING) {
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return page;
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}
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#ifdef CONFIG_MMU
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if (PageHighMem(page)) {
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void *p;
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@ -161,27 +185,21 @@ static void *xtensa_dma_alloc(struct device *dev, size_t size,
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return p;
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}
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#endif
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ret = (unsigned long)page_address(page);
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BUG_ON(ret < XCHAL_KSEG_CACHED_VADDR ||
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ret > XCHAL_KSEG_CACHED_VADDR + XCHAL_KSEG_SIZE - 1);
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uncached = ret + XCHAL_KSEG_BYPASS_VADDR - XCHAL_KSEG_CACHED_VADDR;
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__invalidate_dcache_range(ret, size);
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return (void *)uncached;
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BUG_ON(!platform_vaddr_cached(page_address(page)));
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__invalidate_dcache_range((unsigned long)page_address(page), size);
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return platform_vaddr_to_uncached(page_address(page));
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}
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static void xtensa_dma_free(struct device *dev, size_t size, void *vaddr,
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dma_addr_t dma_handle, unsigned long attrs)
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void arch_dma_free(struct device *dev, size_t size, void *vaddr,
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dma_addr_t dma_handle, unsigned long attrs)
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{
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unsigned long count = PAGE_ALIGN(size) >> PAGE_SHIFT;
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unsigned long addr = (unsigned long)vaddr;
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struct page *page;
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if (addr >= XCHAL_KSEG_BYPASS_VADDR &&
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addr - XCHAL_KSEG_BYPASS_VADDR < XCHAL_KSEG_SIZE) {
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addr += XCHAL_KSEG_CACHED_VADDR - XCHAL_KSEG_BYPASS_VADDR;
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page = virt_to_page(addr);
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if (attrs & DMA_ATTR_NO_KERNEL_MAPPING) {
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page = vaddr;
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} else if (platform_vaddr_uncached(vaddr)) {
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page = virt_to_page(platform_vaddr_to_cached(vaddr));
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} else {
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#ifdef CONFIG_MMU
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dma_common_free_remap(vaddr, size, VM_MAP);
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@ -192,72 +210,3 @@ static void xtensa_dma_free(struct device *dev, size_t size, void *vaddr,
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if (!dma_release_from_contiguous(dev, page, count))
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__free_pages(page, get_order(size));
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}
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static dma_addr_t xtensa_map_page(struct device *dev, struct page *page,
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unsigned long offset, size_t size,
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enum dma_data_direction dir,
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unsigned long attrs)
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{
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dma_addr_t dma_handle = page_to_phys(page) + offset;
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if (!(attrs & DMA_ATTR_SKIP_CPU_SYNC))
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xtensa_sync_single_for_device(dev, dma_handle, size, dir);
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return dma_handle;
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}
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static void xtensa_unmap_page(struct device *dev, dma_addr_t dma_handle,
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size_t size, enum dma_data_direction dir,
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unsigned long attrs)
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{
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if (!(attrs & DMA_ATTR_SKIP_CPU_SYNC))
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xtensa_sync_single_for_cpu(dev, dma_handle, size, dir);
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}
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static int xtensa_map_sg(struct device *dev, struct scatterlist *sg,
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int nents, enum dma_data_direction dir,
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unsigned long attrs)
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{
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struct scatterlist *s;
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int i;
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for_each_sg(sg, s, nents, i) {
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s->dma_address = xtensa_map_page(dev, sg_page(s), s->offset,
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s->length, dir, attrs);
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}
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return nents;
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}
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static void xtensa_unmap_sg(struct device *dev,
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struct scatterlist *sg, int nents,
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enum dma_data_direction dir,
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unsigned long attrs)
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{
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struct scatterlist *s;
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int i;
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for_each_sg(sg, s, nents, i) {
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xtensa_unmap_page(dev, sg_dma_address(s),
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sg_dma_len(s), dir, attrs);
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}
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}
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int xtensa_dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
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{
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return 0;
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||||
}
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|
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const struct dma_map_ops xtensa_dma_map_ops = {
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.alloc = xtensa_dma_alloc,
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.free = xtensa_dma_free,
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.map_page = xtensa_map_page,
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.unmap_page = xtensa_unmap_page,
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.map_sg = xtensa_map_sg,
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.unmap_sg = xtensa_unmap_sg,
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.sync_single_for_cpu = xtensa_sync_single_for_cpu,
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.sync_single_for_device = xtensa_sync_single_for_device,
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.sync_sg_for_cpu = xtensa_sync_sg_for_cpu,
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.sync_sg_for_device = xtensa_sync_sg_for_device,
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.mapping_error = xtensa_dma_mapping_error,
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};
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EXPORT_SYMBOL(xtensa_dma_map_ops);
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