spi_mpc83xx: rework chip selects handling
The main purpose of this patch is to pass 'struct spi_device' to the chip select handling routines. This is needed so that we could implement full-fledged OpenFirmware support for this driver. While at it, also: - Replace two {de,activate}_cs routines by single cs_contol(). - Don't duplicate platform data callbacks in mpc83xx_spi struct. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Cc: David Brownell <david-b@pacbell.net> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Kumar Gala <galak@gate.crashing.org> Cc: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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@ -39,16 +39,10 @@
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#endif
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#ifdef CONFIG_QUICC_ENGINE
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static void mpc83xx_spi_activate_cs(u8 cs, u8 polarity)
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static void mpc83xx_spi_cs_control(struct spi_device *spi, bool on)
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{
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pr_debug("%s %d %d\n", __func__, cs, polarity);
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par_io_data_set(3, 13, polarity);
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}
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static void mpc83xx_spi_deactivate_cs(u8 cs, u8 polarity)
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{
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pr_debug("%s %d %d\n", __func__, cs, polarity);
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par_io_data_set(3, 13, !polarity);
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pr_debug("%s %d %d\n", __func__, spi->chip_select, on);
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par_io_data_set(3, 13, on);
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}
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static struct mmc_spi_platform_data mpc832x_mmc_pdata = {
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@ -74,9 +68,7 @@ static int __init mpc832x_spi_init(void)
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par_io_config_pin(3, 14, 2, 0, 0, 0); /* SD_INSERT, I */
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par_io_config_pin(3, 15, 2, 0, 0, 0); /* SD_PROTECT,I */
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return fsl_spi_init(&mpc832x_spi_boardinfo, 1,
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mpc83xx_spi_activate_cs,
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mpc83xx_spi_deactivate_cs);
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return fsl_spi_init(&mpc832x_spi_boardinfo, 1, mpc83xx_spi_cs_control);
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}
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machine_device_initcall(mpc832x_rdb, mpc832x_spi_init);
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#endif /* CONFIG_QUICC_ENGINE */
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@ -420,8 +420,8 @@ arch_initcall(fsl_usb_of_init);
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static int __init of_fsl_spi_probe(char *type, char *compatible, u32 sysclk,
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struct spi_board_info *board_infos,
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unsigned int num_board_infos,
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void (*activate_cs)(u8 cs, u8 polarity),
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void (*deactivate_cs)(u8 cs, u8 polarity))
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void (*cs_control)(struct spi_device *dev,
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bool on))
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{
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struct device_node *np;
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unsigned int i = 0;
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@ -433,8 +433,7 @@ static int __init of_fsl_spi_probe(char *type, char *compatible, u32 sysclk,
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struct resource res[2];
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struct platform_device *pdev;
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struct fsl_spi_platform_data pdata = {
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.activate_cs = activate_cs,
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.deactivate_cs = deactivate_cs,
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.cs_control = cs_control,
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};
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memset(res, 0, sizeof(res));
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@ -501,8 +500,7 @@ next:
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int __init fsl_spi_init(struct spi_board_info *board_infos,
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unsigned int num_board_infos,
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void (*activate_cs)(u8 cs, u8 polarity),
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void (*deactivate_cs)(u8 cs, u8 polarity))
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void (*cs_control)(struct spi_device *spi, bool on))
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{
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u32 sysclk = -1;
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int ret;
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@ -518,10 +516,10 @@ int __init fsl_spi_init(struct spi_board_info *board_infos,
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}
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ret = of_fsl_spi_probe(NULL, "fsl,spi", sysclk, board_infos,
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num_board_infos, activate_cs, deactivate_cs);
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num_board_infos, cs_control);
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if (!ret)
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of_fsl_spi_probe("spi", "fsl_spi", sysclk, board_infos,
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num_board_infos, activate_cs, deactivate_cs);
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num_board_infos, cs_control);
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return spi_register_board_info(board_infos, num_board_infos);
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}
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@ -4,6 +4,8 @@
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#include <asm/mmu.h>
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struct spi_device;
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extern phys_addr_t get_immrbase(void);
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#if defined(CONFIG_CPM2) || defined(CONFIG_QUICC_ENGINE) || defined(CONFIG_8xx)
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extern u32 get_brgfreq(void);
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@ -19,8 +21,7 @@ struct device_node;
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extern int fsl_spi_init(struct spi_board_info *board_infos,
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unsigned int num_board_infos,
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void (*activate_cs)(u8 cs, u8 polarity),
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void (*deactivate_cs)(u8 cs, u8 polarity));
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void (*cs_control)(struct spi_device *spi, bool on));
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extern void fsl_rstcr_restart(char *cmd);
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@ -89,9 +89,6 @@ struct mpc83xx_spi {
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bool qe_mode;
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void (*activate_cs) (u8 cs, u8 polarity);
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void (*deactivate_cs) (u8 cs, u8 polarity);
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u8 busy;
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struct workqueue_struct *workqueue;
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@ -153,15 +150,14 @@ MPC83XX_SPI_TX_BUF(u32)
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static void mpc83xx_spi_chipselect(struct spi_device *spi, int value)
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{
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struct mpc83xx_spi *mpc83xx_spi;
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u8 pol = spi->mode & SPI_CS_HIGH ? 1 : 0;
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struct mpc83xx_spi *mpc83xx_spi = spi_master_get_devdata(spi->master);
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struct fsl_spi_platform_data *pdata = spi->dev.parent->platform_data;
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bool pol = spi->mode & SPI_CS_HIGH;
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struct spi_mpc83xx_cs *cs = spi->controller_state;
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mpc83xx_spi = spi_master_get_devdata(spi->master);
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if (value == BITBANG_CS_INACTIVE) {
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if (mpc83xx_spi->deactivate_cs)
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mpc83xx_spi->deactivate_cs(spi->chip_select, pol);
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if (pdata->cs_control)
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pdata->cs_control(spi, !pol);
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}
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if (value == BITBANG_CS_ACTIVE) {
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@ -186,8 +182,8 @@ static void mpc83xx_spi_chipselect(struct spi_device *spi, int value)
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mpc83xx_spi_write_reg(mode, regval);
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local_irq_restore(flags);
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}
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if (mpc83xx_spi->activate_cs)
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mpc83xx_spi->activate_cs(spi->chip_select, pol);
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if (pdata->cs_control)
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pdata->cs_control(spi, pol);
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}
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}
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@ -582,8 +578,6 @@ static int __init mpc83xx_spi_probe(struct platform_device *dev)
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master->cleanup = mpc83xx_spi_cleanup;
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mpc83xx_spi = spi_master_get_devdata(master);
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mpc83xx_spi->activate_cs = pdata->activate_cs;
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mpc83xx_spi->deactivate_cs = pdata->deactivate_cs;
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mpc83xx_spi->qe_mode = pdata->qe_mode;
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mpc83xx_spi->get_rx = mpc83xx_spi_rx_buf_u8;
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mpc83xx_spi->get_tx = mpc83xx_spi_tx_buf_u8;
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@ -95,14 +95,15 @@ struct fsl_usb2_platform_data {
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#define FSL_USB2_PORT0_ENABLED 0x00000001
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#define FSL_USB2_PORT1_ENABLED 0x00000002
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struct spi_device;
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struct fsl_spi_platform_data {
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u32 initial_spmode; /* initial SPMODE value */
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u16 bus_num;
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bool qe_mode;
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/* board specific information */
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u16 max_chipselect;
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void (*activate_cs)(u8 cs, u8 polarity);
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void (*deactivate_cs)(u8 cs, u8 polarity);
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void (*cs_control)(struct spi_device *spi, bool on);
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u32 sysclk;
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};
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