[SCSI] arcmsr: Support HW reset for EH and polling scheme for scsi device
1. To support instantaneous report for SCSI device existing by periodic polling 2. In arcmsr_iop_xfer(), inform AP of F/W's deadlock state to prevent endless waiting 3. To block the coming SCSI command while the driver is handling bus reset 4. To support HW reset in bus reset error handler Signed-off-by: Nick Cheng <nick.cheng@areca.com.tw> Signed-off-by: James Bottomley <James.Bottomley@suse.de>
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7873ca4e44
Коммит
36b83ded06
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@ -48,7 +48,7 @@ struct device_attribute;
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/*The limit of outstanding scsi command that firmware can handle*/
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#define ARCMSR_MAX_OUTSTANDING_CMD 256
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#define ARCMSR_MAX_FREECCB_NUM 320
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#define ARCMSR_DRIVER_VERSION "Driver Version 1.20.00.15 2008/02/27"
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#define ARCMSR_DRIVER_VERSION "Driver Version 1.20.00.15 2008/11/03"
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#define ARCMSR_SCSI_INITIATOR_ID 255
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#define ARCMSR_MAX_XFER_SECTORS 512
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#define ARCMSR_MAX_XFER_SECTORS_B 4096
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@ -110,6 +110,8 @@ struct CMD_MESSAGE_FIELD
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#define FUNCTION_SAY_HELLO 0x0807
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#define FUNCTION_SAY_GOODBYE 0x0808
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#define FUNCTION_FLUSH_ADAPTER_CACHE 0x0809
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#define FUNCTION_GET_FIRMWARE_STATUS 0x080A
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#define FUNCTION_HARDWARE_RESET 0x080B
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/* ARECA IO CONTROL CODE*/
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#define ARCMSR_MESSAGE_READ_RQBUFFER \
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ARECA_SATA_RAID | FUNCTION_READ_RQBUFFER
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@ -133,6 +135,7 @@ struct CMD_MESSAGE_FIELD
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#define ARCMSR_MESSAGE_RETURNCODE_OK 0x00000001
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#define ARCMSR_MESSAGE_RETURNCODE_ERROR 0x00000006
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#define ARCMSR_MESSAGE_RETURNCODE_3F 0x0000003F
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#define ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON 0x00000088
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/*
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*************************************************************
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** structure for holding DMA address data
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@ -341,13 +344,13 @@ struct MessageUnit_B
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uint32_t done_qbuffer[ARCMSR_MAX_HBB_POSTQUEUE];
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uint32_t postq_index;
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uint32_t doneq_index;
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void __iomem *drv2iop_doorbell_reg;
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void __iomem *drv2iop_doorbell_mask_reg;
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void __iomem *iop2drv_doorbell_reg;
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void __iomem *iop2drv_doorbell_mask_reg;
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void __iomem *msgcode_rwbuffer_reg;
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void __iomem *ioctl_wbuffer_reg;
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void __iomem *ioctl_rbuffer_reg;
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uint32_t __iomem *drv2iop_doorbell_reg;
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uint32_t __iomem *drv2iop_doorbell_mask_reg;
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uint32_t __iomem *iop2drv_doorbell_reg;
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uint32_t __iomem *iop2drv_doorbell_mask_reg;
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uint32_t __iomem *msgcode_rwbuffer_reg;
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uint32_t __iomem *ioctl_wbuffer_reg;
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uint32_t __iomem *ioctl_rbuffer_reg;
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};
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/*
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@ -375,6 +378,7 @@ struct AdapterControlBlock
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/* message unit ATU inbound base address0 */
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uint32_t acb_flags;
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uint8_t adapter_index;
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#define ACB_F_SCSISTOPADAPTER 0x0001
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#define ACB_F_MSG_STOP_BGRB 0x0002
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/* stop RAID background rebuild */
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@ -390,7 +394,7 @@ struct AdapterControlBlock
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#define ACB_F_BUS_RESET 0x0080
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#define ACB_F_IOP_INITED 0x0100
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/* iop init */
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#define ACB_F_FIRMWARE_TRAP 0x0400
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struct CommandControlBlock * pccb_pool[ARCMSR_MAX_FREECCB_NUM];
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/* used for memory free */
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struct list_head ccb_free_list;
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@ -423,12 +427,19 @@ struct AdapterControlBlock
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#define ARECA_RAID_GOOD 0xaa
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uint32_t num_resets;
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uint32_t num_aborts;
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uint32_t signature;
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uint32_t firm_request_len;
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uint32_t firm_numbers_queue;
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uint32_t firm_sdram_size;
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uint32_t firm_hd_channels;
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char firm_model[12];
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char firm_version[20];
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char device_map[20]; /*21,84-99*/
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struct work_struct arcmsr_do_message_isr_bh;
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struct timer_list eternal_timer;
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unsigned short fw_state;
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atomic_t rq_map_token;
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int ante_token_value;
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};/* HW_DEVICE_EXTENSION */
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/*
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*******************************************************************************
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@ -192,6 +192,7 @@ static struct bin_attribute arcmsr_sysfs_message_read_attr = {
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.attr = {
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.name = "mu_read",
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.mode = S_IRUSR ,
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.owner = THIS_MODULE,
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},
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.size = 1032,
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.read = arcmsr_sysfs_iop_message_read,
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@ -201,6 +202,7 @@ static struct bin_attribute arcmsr_sysfs_message_write_attr = {
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.attr = {
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.name = "mu_write",
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.mode = S_IWUSR,
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.owner = THIS_MODULE,
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},
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.size = 1032,
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.write = arcmsr_sysfs_iop_message_write,
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@ -210,6 +212,7 @@ static struct bin_attribute arcmsr_sysfs_message_clear_attr = {
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.attr = {
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.name = "mu_clear",
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.mode = S_IWUSR,
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.owner = THIS_MODULE,
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},
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.size = 1,
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.write = arcmsr_sysfs_iop_message_clear,
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