dt-bindings: sh_eth convert bindings to json-schema
Convert Renesas Electronics SH EtherMAC bindings documentation to json-schema. Also name bindings documentation file according to the compat string being documented. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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# SPDX-License-Identifier: GPL-2.0
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/net/renesas,ether.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Renesas Electronics SH EtherMAC
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allOf:
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- $ref: ethernet-controller.yaml#
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maintainers:
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- Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
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properties:
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compatible:
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oneOf:
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- items:
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- enum:
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- renesas,gether-r8a7740 # device is a part of R8A7740 SoC
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- renesas,gether-r8a77980 # device is a part of R8A77980 SoC
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- renesas,ether-r7s72100 # device is a part of R7S72100 SoC
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- renesas,ether-r7s9210 # device is a part of R7S9210 SoC
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- items:
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- enum:
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- renesas,ether-r8a7778 # device is a part of R8A7778 SoC
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- renesas,ether-r8a7779 # device is a part of R8A7779 SoC
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- enum:
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- renesas,rcar-gen1-ether # a generic R-Car Gen1 device
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- items:
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- enum:
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- renesas,ether-r8a7745 # device is a part of R8A7745 SoC
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- renesas,ether-r8a7743 # device is a part of R8A7743 SoC
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- renesas,ether-r8a7790 # device is a part of R8A7790 SoC
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- renesas,ether-r8a7791 # device is a part of R8A7791 SoC
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- renesas,ether-r8a7793 # device is a part of R8A7793 SoC
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- renesas,ether-r8a7794 # device is a part of R8A7794 SoC
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- enum:
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- renesas,rcar-gen2-ether # a generic R-Car Gen2 or RZ/G1 device
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reg:
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items:
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- description: E-DMAC/feLic registers
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- description: TSU registers
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minItems: 1
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interrupts:
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maxItems: 1
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'#address-cells':
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description: number of address cells for the MDIO bus
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const: 1
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'#size-cells':
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description: number of size cells on the MDIO bus
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const: 0
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clocks:
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maxItems: 1
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pinctrl-0: true
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pinctrl-names: true
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renesas,no-ether-link:
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type: boolean
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description:
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specify when a board does not provide a proper Ether LINK signal
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renesas,ether-link-active-low:
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type: boolean
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description:
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specify when the Ether LINK signal is active-low instead of normal
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active-high
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required:
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- compatible
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- reg
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- interrupts
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- phy-mode
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- phy-handle
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- '#address-cells'
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- '#size-cells'
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- clocks
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- pinctrl-0
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examples:
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# Lager board
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- |
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#include <dt-bindings/clock/r8a7790-clock.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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ethernet@ee700000 {
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compatible = "renesas,ether-r8a7790", "renesas,rcar-gen2-ether";
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reg = <0 0xee700000 0 0x400>;
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interrupt-parent = <&gic>;
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interrupts = <0 162 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp8_clks R8A7790_CLK_ETHER>;
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phy-mode = "rmii";
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phy-handle = <&phy1>;
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pinctrl-0 = <ðer_pins>;
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pinctrl-names = "default";
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renesas,ether-link-active-low;
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#address-cells = <1>;
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#size-cells = <0>;
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phy1: ethernet-phy@1 {
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reg = <1>;
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interrupt-parent = <&irqc0>;
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interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
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pinctrl-0 = <&phy1_pins>;
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pinctrl-names = "default";
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};
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};
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@ -1,69 +0,0 @@
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* Renesas Electronics SH EtherMAC
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This file provides information on what the device node for the SH EtherMAC
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interface contains.
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Required properties:
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- compatible: Must contain one or more of the following:
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"renesas,gether-r8a7740" if the device is a part of R8A7740 SoC.
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"renesas,ether-r8a7743" if the device is a part of R8A7743 SoC.
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"renesas,ether-r8a7745" if the device is a part of R8A7745 SoC.
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"renesas,ether-r8a7778" if the device is a part of R8A7778 SoC.
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"renesas,ether-r8a7779" if the device is a part of R8A7779 SoC.
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"renesas,ether-r8a7790" if the device is a part of R8A7790 SoC.
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"renesas,ether-r8a7791" if the device is a part of R8A7791 SoC.
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"renesas,ether-r8a7793" if the device is a part of R8A7793 SoC.
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"renesas,ether-r8a7794" if the device is a part of R8A7794 SoC.
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"renesas,gether-r8a77980" if the device is a part of R8A77980 SoC.
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"renesas,ether-r7s72100" if the device is a part of R7S72100 SoC.
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"renesas,ether-r7s9210" if the device is a part of R7S9210 SoC.
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"renesas,rcar-gen1-ether" for a generic R-Car Gen1 device.
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"renesas,rcar-gen2-ether" for a generic R-Car Gen2 or RZ/G1
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device.
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When compatible with the generic version, nodes must list
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the SoC-specific version corresponding to the platform
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first followed by the generic version.
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- reg: offset and length of (1) the E-DMAC/feLic register block (required),
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(2) the TSU register block (optional).
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- interrupts: interrupt specifier for the sole interrupt.
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- phy-mode: see ethernet.txt file in the same directory.
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- phy-handle: see ethernet.txt file in the same directory.
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- #address-cells: number of address cells for the MDIO bus, must be equal to 1.
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- #size-cells: number of size cells on the MDIO bus, must be equal to 0.
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- clocks: clock phandle and specifier pair.
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- pinctrl-0: phandle, referring to a default pin configuration node.
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Optional properties:
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- pinctrl-names: pin configuration state name ("default").
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- renesas,no-ether-link: boolean, specify when a board does not provide a proper
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Ether LINK signal.
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- renesas,ether-link-active-low: boolean, specify when the Ether LINK signal is
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active-low instead of normal active-high.
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Example (Lager board):
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ethernet@ee700000 {
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compatible = "renesas,ether-r8a7790",
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"renesas,rcar-gen2-ether";
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reg = <0 0xee700000 0 0x400>;
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interrupt-parent = <&gic>;
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interrupts = <0 162 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp8_clks R8A7790_CLK_ETHER>;
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phy-mode = "rmii";
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phy-handle = <&phy1>;
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pinctrl-0 = <ðer_pins>;
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pinctrl-names = "default";
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renesas,ether-link-active-low;
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#address-cells = <1>;
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#size-cells = <0>;
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phy1: ethernet-phy@1 {
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reg = <1>;
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interrupt-parent = <&irqc0>;
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interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
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pinctrl-0 = <&phy1_pins>;
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pinctrl-names = "default";
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};
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};
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@ -13810,7 +13810,7 @@ R: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
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L: netdev@vger.kernel.org
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L: linux-renesas-soc@vger.kernel.org
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F: Documentation/devicetree/bindings/net/renesas,*.txt
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F: Documentation/devicetree/bindings/net/sh_eth.txt
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F: Documentation/devicetree/bindings/net/renesas,*.yaml
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F: drivers/net/ethernet/renesas/
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F: include/linux/sh_eth.h
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