can/sja1000: driver for PEAK PCAN PCI/PCIe cards
This patch add the peak_pci driver for the PCAN PCI/PCIe cards (1, 2, 3 or 4 channels) from PEAK Systems (http://www.peak-system.com). Signed-off-by: Wolfgang Grandegger <wg@grandegger.com> Acked-by: Marc Kleine-Budde <mkl@pengutronix.de> Tested-by: Oliver Hartkopp <socketcan@hartkopp.net> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Wolfgang Grandegger
David S. Miller
Родитель
9c9b1f24f2
Коммит
38034518c0
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@ -37,6 +37,13 @@ config CAN_EMS_PCI
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CPC-PCIe and CPC-104P cards from EMS Dr. Thomas Wuensche
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(http://www.ems-wuensche.de).
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config CAN_PEAK_PCI
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tristate "PEAK PCAN PCI/PCIe Cards"
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depends on PCI
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---help---
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This driver is for the PCAN PCI/PCIe cards (1, 2, 3 or 4 channels)
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from PEAK Systems (http://www.peak-system.com).
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config CAN_KVASER_PCI
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tristate "Kvaser PCIcanx and Kvaser PCIcan PCI Cards"
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depends on PCI
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@ -8,6 +8,7 @@ obj-$(CONFIG_CAN_SJA1000_PLATFORM) += sja1000_platform.o
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obj-$(CONFIG_CAN_SJA1000_OF_PLATFORM) += sja1000_of_platform.o
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obj-$(CONFIG_CAN_EMS_PCI) += ems_pci.o
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obj-$(CONFIG_CAN_KVASER_PCI) += kvaser_pci.o
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obj-$(CONFIG_CAN_PEAK_PCI) += peak_pci.o
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obj-$(CONFIG_CAN_PLX_PCI) += plx_pci.o
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obj-$(CONFIG_CAN_TSCAN1) += tscan1.o
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@ -0,0 +1,291 @@
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/*
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* Copyright (C) 2007, 2011 Wolfgang Grandegger <wg@grandegger.com>
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*
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* Derived from the PCAN project file driver/src/pcan_pci.c:
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*
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* Copyright (C) 2001-2006 PEAK System-Technik GmbH
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the version 2 of the GNU General Public License
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* as published by the Free Software Foundation
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software Foundation,
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* Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*/
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#include <linux/kernel.h>
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#include <linux/version.h>
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#include <linux/module.h>
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#include <linux/interrupt.h>
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#include <linux/netdevice.h>
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#include <linux/delay.h>
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#include <linux/pci.h>
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#include <linux/io.h>
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#include <linux/can.h>
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#include <linux/can/dev.h>
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#include "sja1000.h"
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MODULE_AUTHOR("Wolfgang Grandegger <wg@grandegger.com>");
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MODULE_DESCRIPTION("Socket-CAN driver for PEAK PCAN PCI/PCIe cards");
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MODULE_SUPPORTED_DEVICE("PEAK PCAN PCI/PCIe CAN card");
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MODULE_LICENSE("GPL v2");
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#define DRV_NAME "peak_pci"
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struct peak_pci_chan {
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void __iomem *cfg_base; /* Common for all channels */
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struct net_device *next_dev; /* Chain of network devices */
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u16 icr_mask; /* Interrupt mask for fast ack */
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};
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#define PEAK_PCI_CAN_CLOCK (16000000 / 2)
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#define PEAK_PCI_CDR (CDR_CBP | CDR_CLKOUT_MASK)
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#define PEAK_PCI_OCR OCR_TX0_PUSHPULL
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/*
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* Important PITA registers
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*/
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#define PITA_ICR 0x00 /* Interrupt control register */
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#define PITA_GPIOICR 0x18 /* GPIO interface control register */
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#define PITA_MISC 0x1C /* Miscellaneous register */
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#define PEAK_PCI_CFG_SIZE 0x1000 /* Size of the config PCI bar */
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#define PEAK_PCI_CHAN_SIZE 0x0400 /* Size used by the channel */
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#define PEAK_PCI_VENDOR_ID 0x001C /* The PCI device and vendor IDs */
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#define PEAK_PCI_DEVICE_ID 0x0001 /* for PCI/PCIe slot cards */
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static const u16 peak_pci_icr_masks[] = {0x02, 0x01, 0x40, 0x80};
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static DEFINE_PCI_DEVICE_TABLE(peak_pci_tbl) = {
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{PEAK_PCI_VENDOR_ID, PEAK_PCI_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,},
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{0,}
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};
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MODULE_DEVICE_TABLE(pci, peak_pci_tbl);
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static u8 peak_pci_read_reg(const struct sja1000_priv *priv, int port)
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{
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return readb(priv->reg_base + (port << 2));
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}
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static void peak_pci_write_reg(const struct sja1000_priv *priv,
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int port, u8 val)
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{
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writeb(val, priv->reg_base + (port << 2));
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}
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static void peak_pci_post_irq(const struct sja1000_priv *priv)
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{
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struct peak_pci_chan *chan = priv->priv;
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u16 icr;
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/* Select and clear in PITA stored interrupt */
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icr = readw(chan->cfg_base + PITA_ICR);
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if (icr & chan->icr_mask)
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writew(chan->icr_mask, chan->cfg_base + PITA_ICR);
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}
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static int __devinit peak_pci_probe(struct pci_dev *pdev,
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const struct pci_device_id *ent)
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{
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struct sja1000_priv *priv;
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struct peak_pci_chan *chan;
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struct net_device *dev, *dev0 = NULL;
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void __iomem *cfg_base, *reg_base;
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u16 sub_sys_id, icr;
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int i, err, channels;
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err = pci_enable_device(pdev);
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if (err)
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return err;
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err = pci_request_regions(pdev, DRV_NAME);
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if (err)
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goto failure_disable_pci;
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err = pci_read_config_word(pdev, 0x2e, &sub_sys_id);
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if (err)
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goto failure_release_regions;
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dev_dbg(&pdev->dev, "probing device %04x:%04x:%04x\n",
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pdev->vendor, pdev->device, sub_sys_id);
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err = pci_write_config_word(pdev, 0x44, 0);
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if (err)
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goto failure_release_regions;
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if (sub_sys_id >= 12)
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channels = 4;
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else if (sub_sys_id >= 10)
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channels = 3;
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else if (sub_sys_id >= 4)
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channels = 2;
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else
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channels = 1;
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cfg_base = pci_iomap(pdev, 0, PEAK_PCI_CFG_SIZE);
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if (!cfg_base) {
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dev_err(&pdev->dev, "failed to map PCI resource #0\n");
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goto failure_release_regions;
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}
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reg_base = pci_iomap(pdev, 1, PEAK_PCI_CHAN_SIZE * channels);
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if (!reg_base) {
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dev_err(&pdev->dev, "failed to map PCI resource #1\n");
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goto failure_unmap_cfg_base;
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}
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/* Set GPIO control register */
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writew(0x0005, cfg_base + PITA_GPIOICR + 2);
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/* Enable all channels of this card */
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writeb(0x00, cfg_base + PITA_GPIOICR);
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/* Toggle reset */
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writeb(0x05, cfg_base + PITA_MISC + 3);
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mdelay(5);
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/* Leave parport mux mode */
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writeb(0x04, cfg_base + PITA_MISC + 3);
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icr = readw(cfg_base + PITA_ICR + 2);
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for (i = 0; i < channels; i++) {
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dev = alloc_sja1000dev(sizeof(struct peak_pci_chan));
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if (!dev) {
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err = -ENOMEM;
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goto failure_remove_channels;
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}
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priv = netdev_priv(dev);
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chan = priv->priv;
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chan->cfg_base = cfg_base;
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priv->reg_base = reg_base + i * PEAK_PCI_CHAN_SIZE;
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priv->read_reg = peak_pci_read_reg;
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priv->write_reg = peak_pci_write_reg;
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priv->post_irq = peak_pci_post_irq;
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priv->can.clock.freq = PEAK_PCI_CAN_CLOCK;
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priv->ocr = PEAK_PCI_OCR;
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priv->cdr = PEAK_PCI_CDR;
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/* Neither a slave nor a single device distributes the clock */
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if (channels == 1 || i > 0)
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priv->cdr |= CDR_CLK_OFF;
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/* Setup interrupt handling */
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priv->irq_flags = IRQF_SHARED;
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dev->irq = pdev->irq;
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chan->icr_mask = peak_pci_icr_masks[i];
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icr |= chan->icr_mask;
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SET_NETDEV_DEV(dev, &pdev->dev);
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err = register_sja1000dev(dev);
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if (err) {
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dev_err(&pdev->dev, "failed to register device\n");
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free_sja1000dev(dev);
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goto failure_remove_channels;
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}
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/* Create chain of SJA1000 devices */
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if (i == 0)
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dev0 = dev;
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else
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chan->next_dev = dev;
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dev_info(&pdev->dev,
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"%s at reg_base=0x%p cfg_base=0x%p irq=%d\n",
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dev->name, priv->reg_base, chan->cfg_base, dev->irq);
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}
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pci_set_drvdata(pdev, dev0);
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/* Enable interrupts */
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writew(icr, cfg_base + PITA_ICR + 2);
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return 0;
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failure_remove_channels:
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/* Disable interrupts */
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writew(0x0, cfg_base + PITA_ICR + 2);
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for (dev = dev0; dev; dev = chan->next_dev) {
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unregister_sja1000dev(dev);
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free_sja1000dev(dev);
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priv = netdev_priv(dev);
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chan = priv->priv;
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dev = chan->next_dev;
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}
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pci_iounmap(pdev, reg_base);
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failure_unmap_cfg_base:
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pci_iounmap(pdev, cfg_base);
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failure_release_regions:
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pci_release_regions(pdev);
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failure_disable_pci:
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pci_disable_device(pdev);
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return err;
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}
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static void __devexit peak_pci_remove(struct pci_dev *pdev)
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{
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struct net_device *dev = pci_get_drvdata(pdev); /* First device */
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struct sja1000_priv *priv = netdev_priv(dev);
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struct peak_pci_chan *chan = priv->priv;
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void __iomem *cfg_base = chan->cfg_base;
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void __iomem *reg_base = priv->reg_base;
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/* Disable interrupts */
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writew(0x0, cfg_base + PITA_ICR + 2);
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/* Loop over all registered devices */
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while (1) {
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dev_info(&pdev->dev, "removing device %s\n", dev->name);
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unregister_sja1000dev(dev);
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free_sja1000dev(dev);
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dev = chan->next_dev;
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if (!dev)
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break;
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priv = netdev_priv(dev);
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chan = priv->priv;
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}
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pci_iounmap(pdev, reg_base);
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pci_iounmap(pdev, cfg_base);
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pci_release_regions(pdev);
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pci_disable_device(pdev);
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pci_set_drvdata(pdev, NULL);
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}
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static struct pci_driver peak_pci_driver = {
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.name = DRV_NAME,
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.id_table = peak_pci_tbl,
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.probe = peak_pci_probe,
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.remove = __devexit_p(peak_pci_remove),
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};
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static int __init peak_pci_init(void)
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{
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return pci_register_driver(&peak_pci_driver);
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}
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module_init(peak_pci_init);
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static void __exit peak_pci_exit(void)
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{
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pci_unregister_driver(&peak_pci_driver);
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}
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module_exit(peak_pci_exit);
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