hwmon: (it87) Reapply probe path chip registers settings after resume
After a suspend / resume cycle we possibly need to reapply chip registers settings that we had set or fixed in a probe path, since they might have been reset to default values or set incorrectly by a BIOS again. Tested on a Gigabyte M720-US3 board, which requires routing internal VCCH5V to in7 (and had it wrong again on resume from S3). Signed-off-by: Maciej S. Szmigiero <mail@maciej.szmigiero.name> [groeck: Return value from it87_resume_sio() is unused; make it void] Signed-off-by: Guenter Roeck <linux@roeck-us.net>
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384548e569
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@ -497,12 +497,14 @@ static const struct it87_devices it87_devices[] = {
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#define has_vin3_5v(data) ((data)->features & FEAT_VIN3_5V)
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#define has_vin3_5v(data) ((data)->features & FEAT_VIN3_5V)
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struct it87_sio_data {
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struct it87_sio_data {
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int sioaddr;
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enum chips type;
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enum chips type;
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/* Values read from Super-I/O config space */
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/* Values read from Super-I/O config space */
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u8 revision;
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u8 revision;
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u8 vid_value;
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u8 vid_value;
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u8 beep_pin;
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u8 beep_pin;
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u8 internal; /* Internal sensors can be labeled */
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u8 internal; /* Internal sensors can be labeled */
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bool need_in7_reroute;
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/* Features skipped based on config or DMI */
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/* Features skipped based on config or DMI */
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u16 skip_in;
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u16 skip_in;
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u8 skip_vid;
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u8 skip_vid;
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@ -517,6 +519,7 @@ struct it87_sio_data {
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*/
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*/
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struct it87_data {
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struct it87_data {
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const struct attribute_group *groups[7];
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const struct attribute_group *groups[7];
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int sioaddr;
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enum chips type;
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enum chips type;
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u32 features;
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u32 features;
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u8 peci_mask;
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u8 peci_mask;
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@ -532,6 +535,7 @@ struct it87_data {
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u16 in_internal; /* Bitfield, internal sensors (for labels) */
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u16 in_internal; /* Bitfield, internal sensors (for labels) */
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u16 has_in; /* Bitfield, voltage sensors enabled */
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u16 has_in; /* Bitfield, voltage sensors enabled */
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u8 in[NUM_VIN][3]; /* [nr][0]=in, [1]=min, [2]=max */
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u8 in[NUM_VIN][3]; /* [nr][0]=in, [1]=min, [2]=max */
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bool need_in7_reroute;
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u8 has_fan; /* Bitfield, fans enabled */
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u8 has_fan; /* Bitfield, fans enabled */
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u16 fan[NUM_FAN][2]; /* Register values, [nr][0]=fan, [1]=min */
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u16 fan[NUM_FAN][2]; /* Register values, [nr][0]=fan, [1]=min */
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u8 has_temp; /* Bitfield, temp sensors enabled */
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u8 has_temp; /* Bitfield, temp sensors enabled */
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@ -2487,6 +2491,7 @@ static int __init it87_find(int sioaddr, unsigned short *address,
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}
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}
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err = 0;
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err = 0;
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sio_data->sioaddr = sioaddr;
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sio_data->revision = superio_inb(sioaddr, DEVREV) & 0x0f;
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sio_data->revision = superio_inb(sioaddr, DEVREV) & 0x0f;
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pr_info("Found IT%04x%s chip at 0x%x, revision %d\n", chip_type,
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pr_info("Found IT%04x%s chip at 0x%x, revision %d\n", chip_type,
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it87_devices[sio_data->type].suffix,
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it87_devices[sio_data->type].suffix,
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@ -2575,6 +2580,7 @@ static int __init it87_find(int sioaddr, unsigned short *address,
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reg2c |= BIT(1);
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reg2c |= BIT(1);
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superio_outb(sioaddr, IT87_SIO_PINX2_REG,
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superio_outb(sioaddr, IT87_SIO_PINX2_REG,
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reg2c);
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reg2c);
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sio_data->need_in7_reroute = true;
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pr_notice("Routing internal VCCH5V to in7.\n");
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pr_notice("Routing internal VCCH5V to in7.\n");
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}
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}
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pr_notice("in7 routed to internal voltage divider, with external pin disabled.\n");
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pr_notice("in7 routed to internal voltage divider, with external pin disabled.\n");
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@ -2777,6 +2783,7 @@ static int __init it87_find(int sioaddr, unsigned short *address,
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if ((sio_data->type == it8720 || uart6) && !(reg & BIT(1))) {
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if ((sio_data->type == it8720 || uart6) && !(reg & BIT(1))) {
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reg |= BIT(1);
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reg |= BIT(1);
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superio_outb(sioaddr, IT87_SIO_PINX2_REG, reg);
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superio_outb(sioaddr, IT87_SIO_PINX2_REG, reg);
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sio_data->need_in7_reroute = true;
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pr_notice("Routing internal VCCH5V to in7\n");
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pr_notice("Routing internal VCCH5V to in7\n");
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}
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}
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if (reg & BIT(0))
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if (reg & BIT(0))
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@ -3024,8 +3031,6 @@ static int it87_check_pwm(struct device *dev)
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"PWM configuration is too broken to be fixed\n");
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"PWM configuration is too broken to be fixed\n");
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}
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}
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dev_info(dev,
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"Detected broken BIOS defaults, disabling PWM interface\n");
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return 0;
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return 0;
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} else if (fix_pwm_polarity) {
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} else if (fix_pwm_polarity) {
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dev_info(dev,
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dev_info(dev,
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@ -3058,6 +3063,7 @@ static int it87_probe(struct platform_device *pdev)
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return -ENOMEM;
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return -ENOMEM;
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data->addr = res->start;
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data->addr = res->start;
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data->sioaddr = sio_data->sioaddr;
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data->type = sio_data->type;
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data->type = sio_data->type;
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data->features = it87_devices[sio_data->type].features;
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data->features = it87_devices[sio_data->type].features;
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data->peci_mask = it87_devices[sio_data->type].peci_mask;
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data->peci_mask = it87_devices[sio_data->type].peci_mask;
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@ -3096,6 +3102,9 @@ static int it87_probe(struct platform_device *pdev)
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/* Check PWM configuration */
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/* Check PWM configuration */
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enable_pwm_interface = it87_check_pwm(dev);
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enable_pwm_interface = it87_check_pwm(dev);
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if (!enable_pwm_interface)
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dev_info(dev,
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"Detected broken BIOS defaults, disabling PWM interface\n");
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/* Starting with IT8721F, we handle scaling of internal voltages */
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/* Starting with IT8721F, we handle scaling of internal voltages */
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if (has_12mv_adc(data)) {
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if (has_12mv_adc(data)) {
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@ -3123,6 +3132,7 @@ static int it87_probe(struct platform_device *pdev)
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}
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}
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data->in_internal = sio_data->internal;
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data->in_internal = sio_data->internal;
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data->need_in7_reroute = sio_data->need_in7_reroute;
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data->has_in = 0x3ff & ~sio_data->skip_in;
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data->has_in = 0x3ff & ~sio_data->skip_in;
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if (has_six_temp(data)) {
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if (has_six_temp(data)) {
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@ -3178,9 +3188,71 @@ static int it87_probe(struct platform_device *pdev)
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return PTR_ERR_OR_ZERO(hwmon_dev);
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return PTR_ERR_OR_ZERO(hwmon_dev);
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}
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}
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static void __maybe_unused it87_resume_sio(struct platform_device *pdev)
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{
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struct it87_data *data = dev_get_drvdata(&pdev->dev);
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int err;
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int reg2c;
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if (!data->need_in7_reroute)
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return;
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err = superio_enter(data->sioaddr);
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if (err) {
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dev_warn(&pdev->dev,
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"Unable to enter Super I/O to reroute in7 (%d)",
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err);
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return;
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}
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superio_select(data->sioaddr, GPIO);
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reg2c = superio_inb(data->sioaddr, IT87_SIO_PINX2_REG);
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if (!(reg2c & BIT(1))) {
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dev_dbg(&pdev->dev,
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"Routing internal VCCH5V to in7 again");
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reg2c |= BIT(1);
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superio_outb(data->sioaddr, IT87_SIO_PINX2_REG,
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reg2c);
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}
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superio_exit(data->sioaddr);
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}
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static int __maybe_unused it87_resume(struct device *dev)
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{
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struct platform_device *pdev = to_platform_device(dev);
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struct it87_data *data = dev_get_drvdata(dev);
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it87_resume_sio(pdev);
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mutex_lock(&data->update_lock);
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it87_check_pwm(dev);
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it87_check_limit_regs(data);
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it87_check_voltage_monitors_reset(data);
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it87_check_tachometers_reset(pdev);
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it87_check_tachometers_16bit_mode(pdev);
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it87_start_monitoring(data);
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/* force update */
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data->valid = 0;
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mutex_unlock(&data->update_lock);
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it87_update_device(dev);
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return 0;
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}
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static SIMPLE_DEV_PM_OPS(it87_dev_pm_ops, NULL, it87_resume);
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static struct platform_driver it87_driver = {
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static struct platform_driver it87_driver = {
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.driver = {
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.driver = {
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.name = DRVNAME,
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.name = DRVNAME,
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.pm = &it87_dev_pm_ops,
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},
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},
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.probe = it87_probe,
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.probe = it87_probe,
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};
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};
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