Merge branch 'WoL-fixes-for-DP83822-and-DP83tc811'
Dan Murphy says: ==================== WoL fixes for DP83822 and DP83tc811 The WoL feature for each device was enabled during boot or when the PHY was brought up which may be undesired. These patches disable the WoL in the config_init. The disabling and enabling of the WoL is now done though the set_wol call. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
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Коммит
384649e79e
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@ -137,19 +137,18 @@ static int dp83822_set_wol(struct phy_device *phydev,
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value &= ~DP83822_WOL_SECURE_ON;
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}
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value |= (DP83822_WOL_EN | DP83822_WOL_INDICATION_SEL |
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DP83822_WOL_CLR_INDICATION);
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phy_write_mmd(phydev, DP83822_DEVADDR, MII_DP83822_WOL_CFG,
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value);
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} else {
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value = phy_read_mmd(phydev, DP83822_DEVADDR,
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MII_DP83822_WOL_CFG);
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value &= ~DP83822_WOL_EN;
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phy_write_mmd(phydev, DP83822_DEVADDR, MII_DP83822_WOL_CFG,
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value);
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}
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/* Clear any pending WoL interrupt */
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phy_read(phydev, MII_DP83822_MISR2);
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return 0;
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value |= DP83822_WOL_EN | DP83822_WOL_INDICATION_SEL |
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DP83822_WOL_CLR_INDICATION;
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return phy_write_mmd(phydev, DP83822_DEVADDR,
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MII_DP83822_WOL_CFG, value);
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} else {
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return phy_clear_bits_mmd(phydev, DP83822_DEVADDR,
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MII_DP83822_WOL_CFG, DP83822_WOL_EN);
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}
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}
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static void dp83822_get_wol(struct phy_device *phydev,
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@ -258,12 +257,11 @@ static int dp83822_config_intr(struct phy_device *phydev)
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static int dp83822_config_init(struct phy_device *phydev)
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{
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int value;
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int value = DP83822_WOL_EN | DP83822_WOL_MAGIC_EN |
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DP83822_WOL_SECURE_ON;
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value = DP83822_WOL_MAGIC_EN | DP83822_WOL_SECURE_ON | DP83822_WOL_EN;
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return phy_write_mmd(phydev, DP83822_DEVADDR, MII_DP83822_WOL_CFG,
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value);
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return phy_clear_bits_mmd(phydev, DP83822_DEVADDR,
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MII_DP83822_WOL_CFG, value);
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}
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static int dp83822_phy_reset(struct phy_device *phydev)
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@ -139,16 +139,19 @@ static int dp83811_set_wol(struct phy_device *phydev,
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value &= ~DP83811_WOL_SECURE_ON;
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}
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value |= (DP83811_WOL_EN | DP83811_WOL_INDICATION_SEL |
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DP83811_WOL_CLR_INDICATION);
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phy_write_mmd(phydev, DP83811_DEVADDR, MII_DP83811_WOL_CFG,
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value);
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/* Clear any pending WoL interrupt */
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phy_read(phydev, MII_DP83811_INT_STAT1);
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value |= DP83811_WOL_EN | DP83811_WOL_INDICATION_SEL |
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DP83811_WOL_CLR_INDICATION;
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return phy_write_mmd(phydev, DP83811_DEVADDR,
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MII_DP83811_WOL_CFG, value);
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} else {
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phy_clear_bits_mmd(phydev, DP83811_DEVADDR, MII_DP83811_WOL_CFG,
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DP83811_WOL_EN);
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return phy_clear_bits_mmd(phydev, DP83811_DEVADDR,
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MII_DP83811_WOL_CFG, DP83811_WOL_EN);
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}
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return 0;
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}
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static void dp83811_get_wol(struct phy_device *phydev,
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@ -292,8 +295,8 @@ static int dp83811_config_init(struct phy_device *phydev)
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value = DP83811_WOL_MAGIC_EN | DP83811_WOL_SECURE_ON | DP83811_WOL_EN;
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return phy_write_mmd(phydev, DP83811_DEVADDR, MII_DP83811_WOL_CFG,
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value);
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return phy_clear_bits_mmd(phydev, DP83811_DEVADDR, MII_DP83811_WOL_CFG,
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value);
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}
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static int dp83811_phy_reset(struct phy_device *phydev)
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