Merge branch 'fixes' of git://git.linaro.org/people/arnd/arm-soc
* 'fixes' of git://git.linaro.org/people/arnd/arm-soc: mach-integrator: fix VGA base regression arm/dt: Tegra: Update SDHCI nodes to match bindings ARM: EXYNOS4: fix incorrect pad configuration for keypad row lines ARM: SAMSUNG: fix to prevent declaring duplicated ARM: SAMSUNG: fix watchdog reset issue with clk_get() ARM: S3C64XX: Remove un-used code backlight code on SMDK6410 ARM: EXYNOS4: restart clocksource while system resumes ARM: EXYNOS4: Fix routing timer interrupt to offline CPU ARM: EXYNOS4: Fix return type of local_timer_setup() ARM: EXYNOS4: Fix wrong pll type for vpll ARM: Dove: fix second SPI initialization call
This commit is contained in:
Коммит
38867a28a7
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@ -57,14 +57,14 @@
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};
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sdhci@c8000200 {
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gpios = <&gpio 69 0>, /* cd, gpio PI5 */
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<&gpio 57 0>, /* wp, gpio PH1 */
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<&gpio 155 0>; /* power, gpio PT3 */
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cd-gpios = <&gpio 69 0>; /* gpio PI5 */
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wp-gpios = <&gpio 57 0>; /* gpio PH1 */
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power-gpios = <&gpio 155 0>; /* gpio PT3 */
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};
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sdhci@c8000600 {
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gpios = <&gpio 58 0>, /* cd, gpio PH2 */
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<&gpio 59 0>, /* wp, gpio PH3 */
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<&gpio 70 0>; /* power, gpio PI6 */
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cd-gpios = <&gpio 58 0>; /* gpio PH2 */
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wp-gpios = <&gpio 59 0>; /* gpio PH3 */
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power-gpios = <&gpio 70 0>; /* gpio PI6 */
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};
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};
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@ -21,8 +21,8 @@
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};
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sdhci@c8000400 {
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gpios = <&gpio 69 0>, /* cd, gpio PI5 */
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<&gpio 57 0>, /* wp, gpio PH1 */
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<&gpio 70 0>; /* power, gpio PI6 */
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cd-gpios = <&gpio 69 0>; /* gpio PI5 */
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wp-gpios = <&gpio 57 0>; /* gpio PH1 */
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power-gpios = <&gpio 70 0>; /* gpio PI6 */
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};
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};
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@ -158,7 +158,7 @@ void __init dove_spi0_init(void)
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void __init dove_spi1_init(void)
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{
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orion_spi_init(DOVE_SPI1_PHYS_BASE, get_tclk());
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orion_spi_1_init(DOVE_SPI1_PHYS_BASE, get_tclk());
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}
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/*****************************************************************************
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@ -1160,7 +1160,7 @@ void __init_or_cpufreq exynos4_setup_clocks(void)
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vpllsrc = clk_get_rate(&clk_vpllsrc.clk);
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vpll = s5p_get_pll46xx(vpllsrc, __raw_readl(S5P_VPLL_CON0),
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__raw_readl(S5P_VPLL_CON1), pll_4650);
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__raw_readl(S5P_VPLL_CON1), pll_4650c);
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clk_fout_apll.ops = &exynos4_fout_apll_ops;
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clk_fout_mpll.rate = mpll;
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@ -132,12 +132,18 @@ static cycle_t exynos4_frc_read(struct clocksource *cs)
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return ((cycle_t)hi << 32) | lo;
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}
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static void exynos4_frc_resume(struct clocksource *cs)
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{
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exynos4_mct_frc_start(0, 0);
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}
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struct clocksource mct_frc = {
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.name = "mct-frc",
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.rating = 400,
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.read = exynos4_frc_read,
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.mask = CLOCKSOURCE_MASK(64),
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.flags = CLOCK_SOURCE_IS_CONTINUOUS,
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.resume = exynos4_frc_resume,
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};
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static void __init exynos4_clocksource_init(void)
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@ -389,9 +395,11 @@ static void exynos4_mct_tick_init(struct clock_event_device *evt)
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}
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/* Setup the local clock events for a CPU */
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void __cpuinit local_timer_setup(struct clock_event_device *evt)
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int __cpuinit local_timer_setup(struct clock_event_device *evt)
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{
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exynos4_mct_tick_init(evt);
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return 0;
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}
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int local_timer_ack(void)
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@ -106,6 +106,8 @@ void __cpuinit platform_secondary_init(unsigned int cpu)
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*/
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spin_lock(&boot_lock);
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spin_unlock(&boot_lock);
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set_cpu_online(cpu, true);
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}
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int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
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@ -19,15 +19,16 @@ void samsung_keypad_cfg_gpio(unsigned int rows, unsigned int cols)
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if (rows > 8) {
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/* Set all the necessary GPX2 pins: KP_ROW[0~7] */
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s3c_gpio_cfgrange_nopull(EXYNOS4_GPX2(0), 8, S3C_GPIO_SFN(3));
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s3c_gpio_cfgall_range(EXYNOS4_GPX2(0), 8, S3C_GPIO_SFN(3),
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S3C_GPIO_PULL_UP);
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/* Set all the necessary GPX3 pins: KP_ROW[8~] */
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s3c_gpio_cfgrange_nopull(EXYNOS4_GPX3(0), (rows - 8),
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S3C_GPIO_SFN(3));
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s3c_gpio_cfgall_range(EXYNOS4_GPX3(0), (rows - 8),
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S3C_GPIO_SFN(3), S3C_GPIO_PULL_UP);
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} else {
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/* Set all the necessary GPX2 pins: KP_ROW[x] */
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s3c_gpio_cfgrange_nopull(EXYNOS4_GPX2(0), rows,
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S3C_GPIO_SFN(3));
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s3c_gpio_cfgall_range(EXYNOS4_GPX2(0), rows, S3C_GPIO_SFN(3),
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S3C_GPIO_PULL_UP);
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}
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/* Set all the necessary GPX1 pins to special-function 3: KP_COL[x] */
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@ -32,6 +32,7 @@
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/mtd/physmap.h>
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#include <video/vga.h>
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#include <mach/hardware.h>
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#include <mach/platform.h>
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@ -154,6 +155,7 @@ static struct map_desc ap_io_desc[] __initdata = {
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static void __init ap_map_io(void)
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{
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iotable_init(ap_io_desc, ARRAY_SIZE(ap_io_desc));
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vga_base = PCI_MEMORY_VADDR;
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}
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#define INTEGRATOR_SC_VALID_INT 0x003fffff
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@ -27,7 +27,6 @@
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#include <linux/spinlock.h>
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#include <linux/init.h>
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#include <linux/io.h>
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#include <video/vga.h>
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#include <mach/hardware.h>
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#include <mach/platform.h>
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@ -505,7 +504,6 @@ void __init pci_v3_preinit(void)
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pcibios_min_io = 0x6000;
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pcibios_min_mem = 0x00100000;
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vga_base = PCI_MEMORY_VADDR;
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/*
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* Hook in our fault handler for PCI errors
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@ -262,45 +262,6 @@ static struct samsung_keypad_platdata smdk6410_keypad_data __initdata = {
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.cols = 8,
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};
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static int smdk6410_backlight_init(struct device *dev)
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{
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int ret;
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ret = gpio_request(S3C64XX_GPF(15), "Backlight");
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if (ret) {
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printk(KERN_ERR "failed to request GPF for PWM-OUT1\n");
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return ret;
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}
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/* Configure GPIO pin with S3C64XX_GPF15_PWM_TOUT1 */
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s3c_gpio_cfgpin(S3C64XX_GPF(15), S3C_GPIO_SFN(2));
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return 0;
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}
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static void smdk6410_backlight_exit(struct device *dev)
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{
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s3c_gpio_cfgpin(S3C64XX_GPF(15), S3C_GPIO_OUTPUT);
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gpio_free(S3C64XX_GPF(15));
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}
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static struct platform_pwm_backlight_data smdk6410_backlight_data = {
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.pwm_id = 1,
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.max_brightness = 255,
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.dft_brightness = 255,
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.pwm_period_ns = 78770,
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.init = smdk6410_backlight_init,
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.exit = smdk6410_backlight_exit,
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};
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static struct platform_device smdk6410_backlight_device = {
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.name = "pwm-backlight",
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.dev = {
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.parent = &s3c_device_timer[1].dev,
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.platform_data = &smdk6410_backlight_data,
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},
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};
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static struct map_desc smdk6410_iodesc[] = {};
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static struct platform_device *smdk6410_devices[] __initdata = {
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@ -64,6 +64,17 @@ static LIST_HEAD(clocks);
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*/
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DEFINE_SPINLOCK(clocks_lock);
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/* Global watchdog clock used by arch_wtd_reset() callback */
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struct clk *s3c2410_wdtclk;
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static int __init s3c_wdt_reset_init(void)
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{
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s3c2410_wdtclk = clk_get(NULL, "watchdog");
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if (IS_ERR(s3c2410_wdtclk))
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printk(KERN_WARNING "%s: warning: cannot get watchdog clock\n", __func__);
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return 0;
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}
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arch_initcall(s3c_wdt_reset_init);
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/* enable and disable calls for use with the clk struct */
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static int clk_null_enable(struct clk *clk, int enable)
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@ -9,6 +9,9 @@
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* published by the Free Software Foundation.
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*/
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#ifndef __ASM_PLAT_CLOCK_H
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#define __ASM_PLAT_CLOCK_H __FILE__
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#include <linux/spinlock.h>
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#include <linux/clkdev.h>
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@ -121,3 +124,8 @@ extern int s3c64xx_sclk_ctrl(struct clk *clk, int enable);
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extern void s3c_pwmclk_init(void);
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/* Global watchdog clock used by arch_wtd_reset() callback */
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extern struct clk *s3c2410_wdtclk;
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#endif /* __ASM_PLAT_CLOCK_H */
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@ -10,6 +10,7 @@
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* published by the Free Software Foundation.
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*/
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#include <plat/clock.h>
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#include <plat/regs-watchdog.h>
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#include <mach/map.h>
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static inline void arch_wdt_reset(void)
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{
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struct clk *wdtclk;
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printk("arch_reset: attempting watchdog reset\n");
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__raw_writel(0, S3C2410_WTCON); /* disable watchdog, to be safe */
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wdtclk = clk_get(NULL, "watchdog");
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if (!IS_ERR(wdtclk)) {
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clk_enable(wdtclk);
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} else
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printk(KERN_WARNING "%s: warning: cannot get watchdog clock\n", __func__);
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if (s3c2410_wdtclk)
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clk_enable(s3c2410_wdtclk);
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/* put initial values into count and data */
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__raw_writel(0x80, S3C2410_WTCNT);
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