ARM: OMAP4: PM: Adapt the existing OMAP2/3 and common Power Domain Frameworks.
Taking care of the platform specific and common power domains with proper checks. Also refining some Macros according to the latest OMAP4 requirements. Signed-off-by: Abhijit Pagare <abhijitpagare@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Benoit Cousson <b-cousson@ti.com> Cc: Rajendra Nayak <rnayak@ti.com>
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@ -12,6 +12,12 @@
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* published by the Free Software Foundation.
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*/
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/*
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* To Do List
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* -> Move the Sleep/Wakeup dependencies from Power Domain framework to
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* Clock Domain Framework
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*/
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#ifndef ARCH_ARM_MACH_OMAP2_POWERDOMAINS
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#define ARCH_ARM_MACH_OMAP2_POWERDOMAINS
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@ -71,6 +77,7 @@
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/* OMAP2/3-common powerdomains and wakeup dependencies */
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#ifndef CONFIG_ARCH_OMAP4
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/*
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* 2420/2430 PM_WKDEP_GFX: CORE, MPU, WKUP
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* 3430ES1 PM_WKDEP_GFX: adds IVA2, removes CORE
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@ -110,21 +117,25 @@ static struct pwrdm_dep cam_gfx_sleepdeps[] = {
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},
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{ NULL },
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};
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#endif
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#include "powerdomains24xx.h"
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#include "powerdomains34xx.h"
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#include "powerdomains44xx.h"
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/*
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* OMAP2/3 common powerdomains
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*/
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#if defined(CONFIG_ARCH_OMAP24XX) | defined(CONFIG_ARCH_OMAP34XX)
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/*
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* The GFX powerdomain is not present on 3430ES2, but currently we do not
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* have a macro to filter it out at compile-time.
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*/
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static struct powerdomain gfx_pwrdm = {
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static struct powerdomain gfx_omap2_pwrdm = {
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.name = "gfx_pwrdm",
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.prcm_offs = GFX_MOD,
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.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX |
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@ -142,20 +153,23 @@ static struct powerdomain gfx_pwrdm = {
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},
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};
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static struct powerdomain wkup_pwrdm = {
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static struct powerdomain wkup_omap2_pwrdm = {
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.name = "wkup_pwrdm",
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.prcm_offs = WKUP_MOD,
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.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX | CHIP_IS_OMAP3430),
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.dep_bit = OMAP_EN_WKUP_SHIFT,
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};
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#endif
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/* As powerdomains are added or removed above, this list must also be changed */
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static struct powerdomain *powerdomains_omap[] __initdata = {
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&gfx_pwrdm,
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&wkup_pwrdm,
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#if defined(CONFIG_ARCH_OMAP24XX) | defined(CONFIG_ARCH_OMAP34XX)
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&wkup_omap2_pwrdm,
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&gfx_omap2_pwrdm,
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#endif
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#ifdef CONFIG_ARCH_OMAP24XX
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&dsp_pwrdm,
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@ -186,6 +200,24 @@ static struct powerdomain *powerdomains_omap[] __initdata = {
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&dpll5_pwrdm,
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#endif
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#ifdef CONFIG_ARCH_OMAP4
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&core_44xx_pwrdm,
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&gfx_44xx_pwrdm,
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&abe_44xx_pwrdm,
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&dss_44xx_pwrdm,
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&tesla_44xx_pwrdm,
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&wkup_44xx_pwrdm,
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&cpu0_44xx_pwrdm,
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&cpu1_44xx_pwrdm,
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&emu_44xx_pwrdm,
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&mpu_44xx_pwrdm,
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&ivahd_44xx_pwrdm,
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&cam_44xx_pwrdm,
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&l3init_44xx_pwrdm,
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&l4per_44xx_pwrdm,
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&always_on_core_44xx_pwrdm,
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&cefuse_44xx_pwrdm,
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#endif
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NULL
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};
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@ -51,16 +51,16 @@
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*/
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/*
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* Number of memory banks that are power-controllable. On OMAP3430, the
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* maximum is 4.
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* Number of memory banks that are power-controllable. On OMAP4430, the
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* maximum is 5.
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*/
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#define PWRDM_MAX_MEM_BANKS 4
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#define PWRDM_MAX_MEM_BANKS 5
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/*
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* Maximum number of clockdomains that can be associated with a powerdomain.
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* CORE powerdomain on OMAP3 is the worst case
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* CORE powerdomain on OMAP4 is the worst case
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*/
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#define PWRDM_MAX_CLKDMS 4
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#define PWRDM_MAX_CLKDMS 9
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/* XXX A completely arbitrary number. What is reasonable here? */
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#define PWRDM_TRANSITION_BAILOUT 100000
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