drm/powerplay: label internally used symbols as static
Used sparse(make C=1) to find these loose ends. Signed-off-by: Nirmoy Das <nirmoy.das@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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38ed7b0983
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@ -1695,7 +1695,7 @@ static int smu_enable_umd_pstate(void *handle,
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return 0;
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}
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int smu_adjust_power_state_dynamic(struct smu_context *smu,
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static int smu_adjust_power_state_dynamic(struct smu_context *smu,
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enum amd_dpm_forced_level level,
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bool skip_display_settings)
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{
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@ -1487,7 +1487,7 @@ static int smu7_update_avfs(struct pp_hwmgr *hwmgr)
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return 0;
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}
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int smu7_disable_dpm_tasks(struct pp_hwmgr *hwmgr)
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static int smu7_disable_dpm_tasks(struct pp_hwmgr *hwmgr)
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{
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int tmp_result, result = 0;
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@ -1879,7 +1879,7 @@ static int smu8_enable_disable_uvd_dpm(struct pp_hwmgr *hwmgr, bool enable)
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return 0;
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}
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int smu8_dpm_update_uvd_dpm(struct pp_hwmgr *hwmgr, bool bgate)
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static int smu8_dpm_update_uvd_dpm(struct pp_hwmgr *hwmgr, bool bgate)
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{
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struct smu8_hwmgr *data = hwmgr->backend;
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struct phm_uvd_clock_voltage_dependency_table *ptable =
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@ -90,7 +90,7 @@ typedef enum {
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static const ULONG PhwVega10_Magic = (ULONG)(PHM_VIslands_Magic);
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struct vega10_power_state *cast_phw_vega10_power_state(
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static struct vega10_power_state *cast_phw_vega10_power_state(
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struct pp_hw_power_state *hw_ps)
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{
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PP_ASSERT_WITH_CODE((PhwVega10_Magic == hw_ps->magic),
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@ -100,7 +100,7 @@ struct vega10_power_state *cast_phw_vega10_power_state(
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return (struct vega10_power_state *)hw_ps;
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}
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const struct vega10_power_state *cast_const_phw_vega10_power_state(
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static const struct vega10_power_state *cast_const_phw_vega10_power_state(
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const struct pp_hw_power_state *hw_ps)
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{
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PP_ASSERT_WITH_CODE((PhwVega10_Magic == hw_ps->magic),
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@ -2330,7 +2330,7 @@ static int vega10_acg_disable(struct pp_hwmgr *hwmgr)
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{
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struct vega10_hwmgr *data = hwmgr->backend;
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if (data->smu_features[GNLD_ACG].supported &&
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if (data->smu_features[GNLD_ACG].supported &&
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data->smu_features[GNLD_ACG].enabled)
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if (!vega10_enable_smc_features(hwmgr, false,
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data->smu_features[GNLD_ACG].smu_feature_bitmap))
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@ -3905,7 +3905,7 @@ static void vega10_notify_smc_display_change(struct pp_hwmgr *hwmgr,
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NULL);
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}
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int vega10_display_clock_voltage_request(struct pp_hwmgr *hwmgr,
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static int vega10_display_clock_voltage_request(struct pp_hwmgr *hwmgr,
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struct pp_display_clock_request *clock_req)
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{
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int result = 0;
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@ -4672,7 +4672,7 @@ static int vega10_display_configuration_changed_task(struct pp_hwmgr *hwmgr)
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return result;
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}
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int vega10_enable_disable_uvd_dpm(struct pp_hwmgr *hwmgr, bool enable)
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static int vega10_enable_disable_uvd_dpm(struct pp_hwmgr *hwmgr, bool enable)
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{
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struct vega10_hwmgr *data = hwmgr->backend;
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@ -499,7 +499,7 @@ int vega10_thermal_stop_thermal_controller(struct pp_hwmgr *hwmgr)
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* @param Result the last failure code
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* @return result from set temperature range routine
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*/
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int vega10_thermal_setup_fan_table(struct pp_hwmgr *hwmgr)
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static int vega10_thermal_setup_fan_table(struct pp_hwmgr *hwmgr)
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{
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int ret;
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struct vega10_hwmgr *data = hwmgr->backend;
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@ -602,7 +602,7 @@ int vega10_enable_mgpu_fan_boost(struct pp_hwmgr *hwmgr)
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* @param Result the last failure code
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* @return result from set temperature range routine
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*/
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int vega10_thermal_start_smc_fan_control(struct pp_hwmgr *hwmgr)
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static int vega10_thermal_start_smc_fan_control(struct pp_hwmgr *hwmgr)
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{
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/* If the fantable setup has failed we could have disabled
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* PHM_PlatformCaps_MicrocodeFanControl even after
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@ -1436,7 +1436,7 @@ static int vega12_notify_smc_display_change(struct pp_hwmgr *hwmgr,
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return 0;
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}
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int vega12_display_clock_voltage_request(struct pp_hwmgr *hwmgr,
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static int vega12_display_clock_voltage_request(struct pp_hwmgr *hwmgr,
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struct pp_display_clock_request *clock_req)
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{
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int result = 0;
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@ -2404,7 +2404,7 @@ static int vega12_display_configuration_changed_task(struct pp_hwmgr *hwmgr)
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return result;
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}
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int vega12_enable_disable_uvd_dpm(struct pp_hwmgr *hwmgr, bool enable)
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static int vega12_enable_disable_uvd_dpm(struct pp_hwmgr *hwmgr, bool enable)
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{
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struct vega12_hwmgr *data =
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(struct vega12_hwmgr *)(hwmgr->backend);
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@ -263,7 +263,7 @@ static int init_powerplay_table_information(
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return result;
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}
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int vega12_pp_tables_initialize(struct pp_hwmgr *hwmgr)
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static int vega12_pp_tables_initialize(struct pp_hwmgr *hwmgr)
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{
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int result = 0;
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const ATOM_Vega12_POWERPLAYTABLE *powerplay_table;
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@ -251,7 +251,7 @@ int vega12_thermal_stop_thermal_controller(struct pp_hwmgr *hwmgr)
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* @param Result the last failure code
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* @return result from set temperature range routine
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*/
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int vega12_thermal_setup_fan_table(struct pp_hwmgr *hwmgr)
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static int vega12_thermal_setup_fan_table(struct pp_hwmgr *hwmgr)
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{
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int ret;
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struct vega12_hwmgr *data = (struct vega12_hwmgr *)(hwmgr->backend);
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@ -274,7 +274,7 @@ int vega12_thermal_setup_fan_table(struct pp_hwmgr *hwmgr)
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* @param Result the last failure code
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* @return result from set temperature range routine
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*/
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int vega12_thermal_start_smc_fan_control(struct pp_hwmgr *hwmgr)
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static int vega12_thermal_start_smc_fan_control(struct pp_hwmgr *hwmgr)
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{
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/* If the fantable setup has failed we could have disabled
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* PHM_PlatformCaps_MicrocodeFanControl even after
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@ -1981,7 +1981,7 @@ static int vega20_upload_dpm_max_level(struct pp_hwmgr *hwmgr, uint32_t feature_
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return ret;
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}
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int vega20_enable_disable_vce_dpm(struct pp_hwmgr *hwmgr, bool enable)
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static int vega20_enable_disable_vce_dpm(struct pp_hwmgr *hwmgr, bool enable)
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{
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struct vega20_hwmgr *data =
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(struct vega20_hwmgr *)(hwmgr->backend);
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@ -2253,7 +2253,7 @@ static int vega20_read_sensor(struct pp_hwmgr *hwmgr, int idx,
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return ret;
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}
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int vega20_display_clock_voltage_request(struct pp_hwmgr *hwmgr,
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static int vega20_display_clock_voltage_request(struct pp_hwmgr *hwmgr,
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struct pp_display_clock_request *clock_req)
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{
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int result = 0;
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@ -3589,7 +3589,7 @@ static int vega20_display_configuration_changed_task(struct pp_hwmgr *hwmgr)
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return result;
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}
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int vega20_enable_disable_uvd_dpm(struct pp_hwmgr *hwmgr, bool enable)
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static int vega20_enable_disable_uvd_dpm(struct pp_hwmgr *hwmgr, bool enable)
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{
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struct vega20_hwmgr *data =
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(struct vega20_hwmgr *)(hwmgr->backend);
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@ -1805,7 +1805,7 @@ static int sienna_cichlid_update_pcie_parameters(struct smu_context *smu,
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return 0;
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}
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int sienna_cichlid_get_dpm_ultimate_freq(struct smu_context *smu,
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static int sienna_cichlid_get_dpm_ultimate_freq(struct smu_context *smu,
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enum smu_clk_type clk_type,
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uint32_t *min, uint32_t *max)
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{
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@ -1821,7 +1821,7 @@ int sienna_cichlid_get_dpm_ultimate_freq(struct smu_context *smu,
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return ret;
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}
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int sienna_cichlid_set_soft_freq_limited_range(struct smu_context *smu,
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static int sienna_cichlid_set_soft_freq_limited_range(struct smu_context *smu,
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enum smu_clk_type clk_type,
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uint32_t min, uint32_t max)
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{
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@ -183,7 +183,7 @@ static int ci_program_jump_on_start(struct pp_hwmgr *hwmgr)
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return 0;
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}
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bool ci_is_smc_ram_running(struct pp_hwmgr *hwmgr)
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static bool ci_is_smc_ram_running(struct pp_hwmgr *hwmgr)
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{
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return ((0 == PHM_READ_VFPF_INDIRECT_FIELD(hwmgr->device,
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CGS_IND_REG__SMC, SMC_SYSCON_CLOCK_CNTL_0, ck_disable))
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@ -1083,7 +1083,7 @@ static int tonga_populate_single_memory_level(
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return result;
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}
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int tonga_populate_all_memory_levels(struct pp_hwmgr *hwmgr)
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static int tonga_populate_all_memory_levels(struct pp_hwmgr *hwmgr)
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{
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struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend);
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struct tonga_smumgr *smu_data =
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