staging: wilc1000: make use of FIELD_GET/_PREP macro
Simplified the code by making use of FIELD_GET/_PREP bitfield macro. Signed-off-by: Ajay Singh <ajay.kathat@microchip.com> Link: https://lore.kernel.org/r/20200214172250.13026-2-ajay.kathat@microchip.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -988,7 +988,7 @@ void wilc_wfi_p2p_rx(struct wilc_vif *vif, u8 *buff, u32 size)
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s32 freq;
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header = get_unaligned_le32(buff - HOST_HDR_OFFSET);
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pkt_offset = GET_PKT_OFFSET(header);
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pkt_offset = FIELD_GET(WILC_PKT_HDR_OFFSET_FIELD, header);
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if (pkt_offset & IS_MANAGMEMENT_CALLBACK) {
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bool ack = false;
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@ -40,7 +40,7 @@ void wilc_wfi_monitor_rx(struct net_device *mon_dev, u8 *buff, u32 size)
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* The packet offset field contain info about what type of management
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* the frame we are dealing with and ack status
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*/
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pkt_offset = GET_PKT_OFFSET(header);
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pkt_offset = FIELD_GET(WILC_PKT_HDR_OFFSET_FIELD, header);
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if (pkt_offset & IS_MANAGMEMENT_CALLBACK) {
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/* hostapd callback mgmt frame */
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@ -29,8 +29,6 @@
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#define TCP_ACK_FILTER_LINK_SPEED_THRESH 54
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#define DEFAULT_LINK_SPEED 72
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#define GET_PKT_OFFSET(a) (((a) >> 22) & 0x1ff)
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struct wilc_wfi_stats {
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unsigned long rx_packets;
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unsigned long tx_packets;
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@ -898,7 +898,7 @@ static int wilc_spi_read_size(struct wilc *wilc, u32 *size)
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int ret;
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ret = spi_internal_read(wilc, 0xe840 - WILC_SPI_REG_BASE, size);
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*size = *size & IRQ_DMA_WD_CNT_MASK;
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*size = FIELD_GET(IRQ_DMA_WD_CNT_MASK, *size);
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return ret;
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}
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@ -568,8 +568,8 @@ int wilc_wlan_handle_txq(struct wilc *wilc, u32 *txq_count)
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ret = func->hif_read_reg(wilc, WILC_HOST_VMM_CTL, ®);
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if (ret)
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break;
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if ((reg >> 2) & 0x1) {
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entries = ((reg >> 3) & 0x3f);
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if (FIELD_GET(WILC_VMM_ENTRY_AVAILABLE, reg)) {
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entries = FIELD_GET(WILC_VMM_ENTRY_COUNT, reg);
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break;
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}
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release_bus(wilc, WILC_BUS_RELEASE_ALLOW_SLEEP);
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@ -610,6 +610,7 @@ int wilc_wlan_handle_txq(struct wilc *wilc, u32 *txq_count)
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do {
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u32 header, buffer_offset;
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char *bssid;
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u8 mgmt_ptk = 0;
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tqe = wilc_wlan_txq_remove_from_head(dev);
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if (!tqe)
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@ -620,15 +621,16 @@ int wilc_wlan_handle_txq(struct wilc *wilc, u32 *txq_count)
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break;
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le32_to_cpus(&vmm_table[i]);
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vmm_sz = (vmm_table[i] & 0x3ff);
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vmm_sz = FIELD_GET(WILC_VMM_BUFFER_SIZE, vmm_table[i]);
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vmm_sz *= 4;
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header = (tqe->type << 31) |
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(tqe->buffer_size << 15) |
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vmm_sz;
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if (tqe->type == WILC_MGMT_PKT)
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header |= BIT(30);
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else
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header &= ~BIT(30);
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mgmt_ptk = 1;
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header = (FIELD_PREP(WILC_VMM_HDR_TYPE, tqe->type) |
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FIELD_PREP(WILC_VMM_HDR_MGMT_FIELD, mgmt_ptk) |
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FIELD_PREP(WILC_VMM_HDR_PKT_SIZE, tqe->buffer_size) |
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FIELD_PREP(WILC_VMM_HDR_BUFF_SIZE, vmm_sz));
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cpu_to_le32s(&header);
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memcpy(&txb[offset], &header, 4);
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@ -686,10 +688,10 @@ static void wilc_wlan_handle_rx_buff(struct wilc *wilc, u8 *buffer, int size)
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buff_ptr = buffer + offset;
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header = get_unaligned_le32(buff_ptr);
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is_cfg_packet = (header >> 31) & 0x1;
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pkt_offset = (header >> 22) & 0x1ff;
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tp_len = (header >> 11) & 0x7ff;
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pkt_len = header & 0x7ff;
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is_cfg_packet = FIELD_GET(WILC_PKT_HDR_CONFIG_FIELD, header);
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pkt_offset = FIELD_GET(WILC_PKT_HDR_OFFSET_FIELD, header);
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tp_len = FIELD_GET(WILC_PKT_HDR_TOTAL_LEN_FIELD, header);
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pkt_len = FIELD_GET(WILC_PKT_HDR_LEN_FIELD, header);
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if (pkt_len == 0 || tp_len == 0)
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break;
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@ -758,11 +760,11 @@ static void wilc_wlan_handle_isr_ext(struct wilc *wilc, u32 int_status)
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int ret = 0;
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struct rxq_entry_t *rqe;
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size = (int_status & 0x7fff) << 2;
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size = FIELD_GET(WILC_INTERRUPT_DATA_SIZE, int_status) << 2;
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while (!size && retries < 10) {
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wilc->hif_func->hif_read_size(wilc, &size);
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size = (size & 0x7fff) << 2;
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size = FIELD_GET(WILC_INTERRUPT_DATA_SIZE, size) << 2;
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retries++;
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}
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@ -8,6 +8,7 @@
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#define WILC_WLAN_H
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#include <linux/types.h>
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#include <linux/bitfield.h>
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/********************************************
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*
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@ -135,6 +136,23 @@
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#define MODALIAS "WILC_SPI"
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#define GPIO_NUM 0x44
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#define WILC_PKT_HDR_CONFIG_FIELD BIT(31)
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#define WILC_PKT_HDR_OFFSET_FIELD GENMASK(30, 22)
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#define WILC_PKT_HDR_TOTAL_LEN_FIELD GENMASK(21, 11)
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#define WILC_PKT_HDR_LEN_FIELD GENMASK(10, 0)
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#define WILC_INTERRUPT_DATA_SIZE GENMASK(14, 0)
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#define WILC_VMM_BUFFER_SIZE GENMASK(9, 0)
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#define WILC_VMM_HDR_TYPE BIT(31)
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#define WILC_VMM_HDR_MGMT_FIELD BIT(30)
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#define WILC_VMM_HDR_PKT_SIZE GENMASK(29, 15)
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#define WILC_VMM_HDR_BUFF_SIZE GENMASK(14, 0)
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#define WILC_VMM_ENTRY_COUNT GENMASK(8, 3)
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#define WILC_VMM_ENTRY_AVAILABLE BIT(2)
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/*******************************************/
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/* E0 and later Interrupt flags. */
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/*******************************************/
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@ -150,7 +168,7 @@
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/* 21: INT5 flag */
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/*******************************************/
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#define IRG_FLAGS_OFFSET 16
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#define IRQ_DMA_WD_CNT_MASK ((1ul << IRG_FLAGS_OFFSET) - 1)
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#define IRQ_DMA_WD_CNT_MASK GENMASK(IRG_FLAGS_OFFSET - 1, 0)
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#define INT_0 BIT(IRG_FLAGS_OFFSET)
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#define INT_1 BIT(IRG_FLAGS_OFFSET + 1)
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#define INT_2 BIT(IRG_FLAGS_OFFSET + 2)
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