ARM: dts: imx6: phytec: Add PEB-WLBT-05 support
The PEB-WLBT-05 is equipped with a Sterling-LWB radio module, which is capable of Wi-Fi 802.11 b/g/n and Bluetooth 4.2. Signed-off-by: Yunus Bas <y.bas@phytec.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Yunus Bas
Shawn Guo
Родитель
d3af422c05
Коммит
3951cc6bae
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#include "imx6qdl-phytec-mira.dtsi"
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#include "imx6qdl-phytec-mira-peb-eval-01.dtsi"
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#include "imx6qdl-phytec-mira-peb-av-02.dtsi"
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#include "imx6qdl-phytec-mira-peb-wlbt-05.dtsi"
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/ {
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model = "PHYTEC phyBOARD-Mira DualLite/Solo Carrier-Board with NAND";
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#include "imx6qdl-phytec-mira.dtsi"
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#include "imx6qdl-phytec-mira-peb-eval-01.dtsi"
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#include "imx6qdl-phytec-mira-peb-av-02.dtsi"
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#include "imx6qdl-phytec-mira-peb-wlbt-05.dtsi"
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/ {
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model = "PHYTEC phyBOARD-Mira Quad Carrier-Board with eMMC";
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#include "imx6qdl-phytec-mira.dtsi"
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#include "imx6qdl-phytec-mira-peb-eval-01.dtsi"
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#include "imx6qdl-phytec-mira-peb-av-02.dtsi"
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#include "imx6qdl-phytec-mira-peb-wlbt-05.dtsi"
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/ {
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model = "PHYTEC phyBOARD-Mira Quad Carrier-Board with NAND";
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (C) 2021 PHYTEC Messtechnik GmbH
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* Author: Yunus Bas <y.bas@phytec.de>
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*/
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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/ {
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reg_wl_en: regulator-wl-en {
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compatible = "regulator-fixed";
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regulator-name = "wlan_en";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_wl>;
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gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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startup-delay-us = <100>;
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status = "disabled";
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};
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};
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&uart3 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart3_bt>;
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uart-has-rtscts;
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bluetooth {
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compatible = "brcm,bcm43438-bt";
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shutdown-gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>;
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device-wakeup-gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>;
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host-wakeup-gpios = <&gpio5 26 GPIO_ACTIVE_HIGH>;
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status = "disabled";
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};
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};
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&usdhc3 {
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#address-cells = <1>;
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#size-cells = <0>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usdhc3_wl>;
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vmmc-supply = <®_wl_en>;
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bus-width = <4>;
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non-removable;
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no-1-8-v;
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status = "disabled";
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brmcf: wifi@1 {
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compatible = "brcm,bcm4329-fmac";
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reg = <1>;
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};
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};
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&iomuxc {
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pinctrl_uart3_bt: uart3grp-bt {
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fsl,pins = <
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MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
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MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
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MX6QDL_PAD_EIM_EB3__UART3_RTS_B 0x1b0b1
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MX6QDL_PAD_EIM_D23__UART3_CTS_B 0x1b0b1
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MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0xb0b1 /* BT ENABLE */
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MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0xb0b1 /* DEV WAKEUP */
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MX6QDL_PAD_CSI0_DAT8__GPIO5_IO26 0xb0b1 /* HOST WAKEUP */
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>;
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};
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pinctrl_usdhc3_wl: usdhc3grp-wl {
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fsl,pins = <
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MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
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MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
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MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
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MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
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MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
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MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
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>;
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};
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pinctrl_wl: wlgrp {
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fsl,pins = <
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MX6QDL_PAD_EIM_A25__GPIO5_IO02 0xb0b1 /* WLAN ENABLE */
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>;
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};
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};
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#include "imx6qdl-phytec-mira.dtsi"
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#include "imx6qdl-phytec-mira-peb-eval-01.dtsi"
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#include "imx6qdl-phytec-mira-peb-av-02.dtsi"
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#include "imx6qdl-phytec-mira-peb-wlbt-05.dtsi"
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/ {
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model = "PHYTEC phyBOARD-Mira QuadPlus Carrier-Board with NAND";
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#include "imx6ul-phytec-segin.dtsi"
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#include "imx6ul-phytec-segin-peb-eval-01.dtsi"
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#include "imx6ul-phytec-segin-peb-av-02.dtsi"
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#include "imx6ul-phytec-segin-peb-wlbt-05.dtsi"
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/ {
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model = "PHYTEC phyBOARD-Segin i.MX6 UltraLite Full Featured with NAND";
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (C) 2021 PHYTEC Messtechnik GmbH
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* Author: Yunus Bas <y.bas@phytec.de>
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*/
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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/ {
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reg_wl_en: regulator-wl-en {
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compatible = "regulator-fixed";
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regulator-name = "wlan_en";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_wl>;
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gpio = <&gpio5 9 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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startup-delay-us = <100>;
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status = "disabled";
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};
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};
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&iomuxc {
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pinctrl_bt: btgrp {
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fsl,pins = <
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MX6UL_PAD_GPIO1_IO01__GPIO1_IO01 0x3031 /* BT ENABLE */
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MX6UL_PAD_GPIO1_IO03__GPIO1_IO03 0x3031 /* HOST WAKEUP */
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MX6UL_PAD_JTAG_MOD__GPIO1_IO10 0x3031 /* DEV WAKEUP */
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>;
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};
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pinctrl_uart2_bt: uart2grp-bt {
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fsl,pins = <
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MX6UL_PAD_UART2_TX_DATA__UART2_DCE_TX 0x17059
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MX6UL_PAD_UART2_RX_DATA__UART2_DCE_RX 0x17059
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MX6UL_PAD_UART2_CTS_B__UART2_DCE_CTS 0x17059
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MX6UL_PAD_UART2_RTS_B__UART2_DCE_RTS 0x17059
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>;
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};
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pinctrl_usdhc2_wl: usdhc2grp-wl {
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fsl,pins = <
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MX6UL_PAD_LCD_DATA18__USDHC2_CMD 0x10051
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MX6UL_PAD_LCD_DATA19__USDHC2_CLK 0x10061
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MX6UL_PAD_LCD_DATA20__USDHC2_DATA0 0x10051
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MX6UL_PAD_LCD_DATA21__USDHC2_DATA1 0x10051
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MX6UL_PAD_LCD_DATA22__USDHC2_DATA2 0x10051
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MX6UL_PAD_LCD_DATA23__USDHC2_DATA3 0x10051
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>;
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};
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pinctrl_wl: wlgrp {
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fsl,pins = <
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MX6UL_PAD_SNVS_TAMPER9__GPIO5_IO09 0x3031 /* WLAN ENABLE */
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>;
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};
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};
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&uart2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart2_bt &pinctrl_bt>;
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uart-has-rtscts;
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status = "disabled";
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bluetooth {
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compatible = "brcm,bcm43438-bt";
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shutdown-gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>;
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device-wakeup-gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>;
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host-wakeup-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
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};
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};
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&usdhc2 {
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#address-cells = <1>;
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#size-cells = <0>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usdhc2_wl>;
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vmmc-supply = <®_wl_en>;
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bus-width = <4>;
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non-removable;
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no-1-8-v;
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status = "disabled";
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brmcf: wifi@1 {
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compatible = "brcm,bcm4329-fmac";
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reg = <1>;
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};
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};
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#include "imx6ull-phytec-segin.dtsi"
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#include "imx6ull-phytec-segin-peb-eval-01.dtsi"
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#include "imx6ull-phytec-segin-peb-av-02.dtsi"
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#include "imx6ull-phytec-segin-peb-wlbt-05.dtsi"
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/ {
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model = "PHYTEC phyBOARD-Segin i.MX6 ULL Full Featured with NAND";
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@ -9,6 +9,7 @@
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#include "imx6ull-phytec-phycore-som.dtsi"
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#include "imx6ull-phytec-segin.dtsi"
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#include "imx6ull-phytec-segin-peb-eval-01.dtsi"
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#include "imx6ull-phytec-segin-peb-wlbt-05.dtsi"
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/ {
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model = "PHYTEC phyBOARD-Segin i.MX6 ULL Low Cost with NAND";
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (C) 2021 PHYTEC Messtechnik GmbH
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* Author: Yunus Bas <y.bas@phytec.de>
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*/
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#include "imx6ul-phytec-segin-peb-wlbt-05.dtsi"
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&iomuxc {
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/delete-node/ wlgrp;
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};
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&iomuxc_snvs {
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pinctrl_wl: wlgrp {
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fsl,pins = <
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MX6ULL_PAD_SNVS_TAMPER9__GPIO5_IO09 0x3031
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>;
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};
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};
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