From 41ffada18f77b3309603dfff6a719b5b8425de3b Mon Sep 17 00:00:00 2001 From: Suman Anna Date: Fri, 11 Jul 2014 16:44:34 -0500 Subject: [PATCH 01/10] ARM: dts: OMAP2+: Add mailbox fifo and user information The number of mailbox fifos and users (IP interrupts) are added to the Mailbox DT nodes on OMAP2420, OMAP2430, OMAP3, and OMAP5 family of SoCs through the DT properties "ti,mbox-num-fifos" and "ti,mbox-num-users" properties. This data represents the same data that used to be represented in hwmod attribute data through the .num_fifos and .num_users fields previously. Signed-off-by: Suman Anna Acked-by: Pavel Machek Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/omap2420.dtsi | 2 ++ arch/arm/boot/dts/omap2430.dtsi | 2 ++ arch/arm/boot/dts/omap3.dtsi | 2 ++ arch/arm/boot/dts/omap5.dtsi | 2 ++ 4 files changed, 8 insertions(+) diff --git a/arch/arm/boot/dts/omap2420.dtsi b/arch/arm/boot/dts/omap2420.dtsi index e83b0468080c..6d21994d824b 100644 --- a/arch/arm/boot/dts/omap2420.dtsi +++ b/arch/arm/boot/dts/omap2420.dtsi @@ -157,6 +157,8 @@ interrupts = <26>, <34>; interrupt-names = "dsp", "iva"; ti,hwmods = "mailbox"; + ti,mbox-num-users = <4>; + ti,mbox-num-fifos = <6>; }; timer1: timer@48028000 { diff --git a/arch/arm/boot/dts/omap2430.dtsi b/arch/arm/boot/dts/omap2430.dtsi index c4e8013801ee..aa6a354e236f 100644 --- a/arch/arm/boot/dts/omap2430.dtsi +++ b/arch/arm/boot/dts/omap2430.dtsi @@ -247,6 +247,8 @@ reg = <0x48094000 0x200>; interrupts = <26>; ti,hwmods = "mailbox"; + ti,mbox-num-users = <4>; + ti,mbox-num-fifos = <6>; }; timer1: timer@49018000 { diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi index b2891a9a6975..575a49bf968d 100644 --- a/arch/arm/boot/dts/omap3.dtsi +++ b/arch/arm/boot/dts/omap3.dtsi @@ -332,6 +332,8 @@ ti,hwmods = "mailbox"; reg = <0x48094000 0x200>; interrupts = <26>; + ti,mbox-num-users = <2>; + ti,mbox-num-fifos = <2>; }; mcspi1: spi@48098000 { diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi index 3bfda16c8b52..0e8336ed1a79 100644 --- a/arch/arm/boot/dts/omap5.dtsi +++ b/arch/arm/boot/dts/omap5.dtsi @@ -641,6 +641,8 @@ reg = <0x4a0f4000 0x200>; interrupts = ; ti,hwmods = "mailbox"; + ti,mbox-num-users = <3>; + ti,mbox-num-fifos = <8>; }; timer1: timer@4ae18000 { From 8ebc30dd504c41c6c01eca42486ea6d64fd75f06 Mon Sep 17 00:00:00 2001 From: Suman Anna Date: Fri, 11 Jul 2014 16:44:35 -0500 Subject: [PATCH 02/10] ARM: dts: OMAP4: Add mailbox node The mailbox DT node data has been added for OMAP44xx devices. Signed-off-by: Suman Anna Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/omap4.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi index 7e26d222bfe3..69408b53200d 100644 --- a/arch/arm/boot/dts/omap4.dtsi +++ b/arch/arm/boot/dts/omap4.dtsi @@ -649,6 +649,15 @@ }; }; + mailbox: mailbox@4a0f4000 { + compatible = "ti,omap4-mailbox"; + reg = <0x4a0f4000 0x200>; + interrupts = ; + ti,hwmods = "mailbox"; + ti,mbox-num-users = <3>; + ti,mbox-num-fifos = <8>; + }; + timer1: timer@4a318000 { compatible = "ti,omap3430-timer"; reg = <0x4a318000 0x80>; From 402423019a098fee735143d90dc487efc25d4b85 Mon Sep 17 00:00:00 2001 From: Suman Anna Date: Fri, 11 Jul 2014 16:44:36 -0500 Subject: [PATCH 03/10] ARM: dts: AM33xx: Add mailbox node The mailbox DT node data has been added for AM33xx device. The mailbox IP in AM33xx is similar to the version found in OMAP4+ devices. Signed-off-by: Suman Anna Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/am33xx.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi index 4a4e02d0ce9e..3a0a161342ba 100644 --- a/arch/arm/boot/dts/am33xx.dtsi +++ b/arch/arm/boot/dts/am33xx.dtsi @@ -347,6 +347,15 @@ status = "disabled"; }; + mailbox: mailbox@480C8000 { + compatible = "ti,omap4-mailbox"; + reg = <0x480C8000 0x200>; + interrupts = <77>; + ti,hwmods = "mailbox"; + ti,mbox-num-users = <4>; + ti,mbox-num-fifos = <8>; + }; + timer1: timer@44e31000 { compatible = "ti,am335x-timer-1ms"; reg = <0x44e31000 0x400>; From 44e6ab1b619853f05bf7250e55a6d82864e340d7 Mon Sep 17 00:00:00 2001 From: Suman Anna Date: Fri, 11 Jul 2014 16:44:37 -0500 Subject: [PATCH 04/10] ARM: dts: AM4372: Correct mailbox node data The mailbox DT node for AM4372 is enabled and is corrected to remove some properties that have crept in by mistake. Fixes: 9e3269b (ARM: dts: AM4372: Add L2, EDMA, mailbox, MMC and SHAM nodes) Cc: Lokesh Vutla Signed-off-by: Suman Anna Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/am4372.dtsi | 3 --- 1 file changed, 3 deletions(-) diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi index 49fa59622254..c9aee0e799bb 100644 --- a/arch/arm/boot/dts/am4372.dtsi +++ b/arch/arm/boot/dts/am4372.dtsi @@ -168,9 +168,6 @@ ti,hwmods = "mailbox"; ti,mbox-num-users = <4>; ti,mbox-num-fifos = <8>; - ti,mbox-names = "wkup_m3"; - ti,mbox-data = <0 0 0 0>; - status = "disabled"; }; timer1: timer@44e31000 { From 38baefb33f418991072d64b0c8d619def3c362d3 Mon Sep 17 00:00:00 2001 From: Suman Anna Date: Fri, 11 Jul 2014 16:44:38 -0500 Subject: [PATCH 05/10] ARM: dts: DRA7: Add mailbox nodes DRA7xx has 13 system mailboxes, and is present on both the DRA72x and DRA74x family of SoCs. Add the DT nodes for all these 13 mailboxes. Except for mailbox 1, all other mailboxes do not have interrupts mapped into the MPU GIC by default. All the mailboxes have been disabled and the interrupts property information is left out intentionally for now, because of the dependencies against the crossbar driver. These mailboxes can be enabled when a usecase arises and the crossbar driver dependencies are met. NOTE: The mailbox 1 has different number of mailbox fifos and IP interrupts compared to the remaining 12 mailboxes. Signed-off-by: Suman Anna Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/dra7.dtsi | 117 ++++++++++++++++++++++++++++++++++++ 1 file changed, 117 insertions(+) diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi index c29945e07c5a..99c40d476186 100644 --- a/arch/arm/boot/dts/dra7.dtsi +++ b/arch/arm/boot/dts/dra7.dtsi @@ -338,6 +338,123 @@ status = "disabled"; }; + mailbox1: mailbox@4a0f4000 { + compatible = "ti,omap4-mailbox"; + reg = <0x4a0f4000 0x200>; + ti,hwmods = "mailbox1"; + ti,mbox-num-users = <3>; + ti,mbox-num-fifos = <8>; + status = "disabled"; + }; + + mailbox2: mailbox@4883a000 { + compatible = "ti,omap4-mailbox"; + reg = <0x4883a000 0x200>; + ti,hwmods = "mailbox2"; + ti,mbox-num-users = <4>; + ti,mbox-num-fifos = <12>; + status = "disabled"; + }; + + mailbox3: mailbox@4883c000 { + compatible = "ti,omap4-mailbox"; + reg = <0x4883c000 0x200>; + ti,hwmods = "mailbox3"; + ti,mbox-num-users = <4>; + ti,mbox-num-fifos = <12>; + status = "disabled"; + }; + + mailbox4: mailbox@4883e000 { + compatible = "ti,omap4-mailbox"; + reg = <0x4883e000 0x200>; + ti,hwmods = "mailbox4"; + ti,mbox-num-users = <4>; + ti,mbox-num-fifos = <12>; + status = "disabled"; + }; + + mailbox5: mailbox@48840000 { + compatible = "ti,omap4-mailbox"; + reg = <0x48840000 0x200>; + ti,hwmods = "mailbox5"; + ti,mbox-num-users = <4>; + ti,mbox-num-fifos = <12>; + status = "disabled"; + }; + + mailbox6: mailbox@48842000 { + compatible = "ti,omap4-mailbox"; + reg = <0x48842000 0x200>; + ti,hwmods = "mailbox6"; + ti,mbox-num-users = <4>; + ti,mbox-num-fifos = <12>; + status = "disabled"; + }; + + mailbox7: mailbox@48844000 { + compatible = "ti,omap4-mailbox"; + reg = <0x48844000 0x200>; + ti,hwmods = "mailbox7"; + ti,mbox-num-users = <4>; + ti,mbox-num-fifos = <12>; + status = "disabled"; + }; + + mailbox8: mailbox@48846000 { + compatible = "ti,omap4-mailbox"; + reg = <0x48846000 0x200>; + ti,hwmods = "mailbox8"; + ti,mbox-num-users = <4>; + ti,mbox-num-fifos = <12>; + status = "disabled"; + }; + + mailbox9: mailbox@4885e000 { + compatible = "ti,omap4-mailbox"; + reg = <0x4885e000 0x200>; + ti,hwmods = "mailbox9"; + ti,mbox-num-users = <4>; + ti,mbox-num-fifos = <12>; + status = "disabled"; + }; + + mailbox10: mailbox@48860000 { + compatible = "ti,omap4-mailbox"; + reg = <0x48860000 0x200>; + ti,hwmods = "mailbox10"; + ti,mbox-num-users = <4>; + ti,mbox-num-fifos = <12>; + status = "disabled"; + }; + + mailbox11: mailbox@48862000 { + compatible = "ti,omap4-mailbox"; + reg = <0x48862000 0x200>; + ti,hwmods = "mailbox11"; + ti,mbox-num-users = <4>; + ti,mbox-num-fifos = <12>; + status = "disabled"; + }; + + mailbox12: mailbox@48864000 { + compatible = "ti,omap4-mailbox"; + reg = <0x48864000 0x200>; + ti,hwmods = "mailbox12"; + ti,mbox-num-users = <4>; + ti,mbox-num-fifos = <12>; + status = "disabled"; + }; + + mailbox13: mailbox@48802000 { + compatible = "ti,omap4-mailbox"; + reg = <0x48802000 0x200>; + ti,hwmods = "mailbox13"; + ti,mbox-num-users = <4>; + ti,mbox-num-fifos = <12>; + status = "disabled"; + }; + timer1: timer@4ae18000 { compatible = "ti,omap5430-timer"; reg = <0x4ae18000 0x80>; From 067395d49c5149b7b50fa93e9cb691a184b24927 Mon Sep 17 00:00:00 2001 From: Suman Anna Date: Fri, 11 Jul 2014 16:44:39 -0500 Subject: [PATCH 06/10] ARM: DRA7: hwmod_data: Add mailbox hwmod data Add the hwmod data for the 13 instances of the system mailbox IP in DRA7 SoC. The patch is needed for performing a soft-reset while configuring the respective mailbox instance, otherwise is a non-essential change for functionality. The modules are smart idled on reset, and the IP module mode is hardware controlled. Cc: Rajendra Nayak Cc: Paul Walmsley Signed-off-by: Suman Anna Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 305 ++++++++++++++++++++++ 1 file changed, 305 insertions(+) diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c index 20b4398cec05..e35f5b18de6d 100644 --- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c @@ -938,6 +938,194 @@ static struct omap_hwmod dra7xx_i2c5_hwmod = { .dev_attr = &i2c_dev_attr, }; +/* + * 'mailbox' class + * + */ + +static struct omap_hwmod_class_sysconfig dra7xx_mailbox_sysc = { + .rev_offs = 0x0000, + .sysc_offs = 0x0010, + .sysc_flags = (SYSC_HAS_RESET_STATUS | SYSC_HAS_SIDLEMODE | + SYSC_HAS_SOFTRESET), + .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), + .sysc_fields = &omap_hwmod_sysc_type2, +}; + +static struct omap_hwmod_class dra7xx_mailbox_hwmod_class = { + .name = "mailbox", + .sysc = &dra7xx_mailbox_sysc, +}; + +/* mailbox1 */ +static struct omap_hwmod dra7xx_mailbox1_hwmod = { + .name = "mailbox1", + .class = &dra7xx_mailbox_hwmod_class, + .clkdm_name = "l4cfg_clkdm", + .prcm = { + .omap4 = { + .clkctrl_offs = DRA7XX_CM_L4CFG_MAILBOX1_CLKCTRL_OFFSET, + .context_offs = DRA7XX_RM_L4CFG_MAILBOX1_CONTEXT_OFFSET, + }, + }, +}; + +/* mailbox2 */ +static struct omap_hwmod dra7xx_mailbox2_hwmod = { + .name = "mailbox2", + .class = &dra7xx_mailbox_hwmod_class, + .clkdm_name = "l4cfg_clkdm", + .prcm = { + .omap4 = { + .clkctrl_offs = DRA7XX_CM_L4CFG_MAILBOX2_CLKCTRL_OFFSET, + .context_offs = DRA7XX_RM_L4CFG_MAILBOX2_CONTEXT_OFFSET, + }, + }, +}; + +/* mailbox3 */ +static struct omap_hwmod dra7xx_mailbox3_hwmod = { + .name = "mailbox3", + .class = &dra7xx_mailbox_hwmod_class, + .clkdm_name = "l4cfg_clkdm", + .prcm = { + .omap4 = { + .clkctrl_offs = DRA7XX_CM_L4CFG_MAILBOX3_CLKCTRL_OFFSET, + .context_offs = DRA7XX_RM_L4CFG_MAILBOX3_CONTEXT_OFFSET, + }, + }, +}; + +/* mailbox4 */ +static struct omap_hwmod dra7xx_mailbox4_hwmod = { + .name = "mailbox4", + .class = &dra7xx_mailbox_hwmod_class, + .clkdm_name = "l4cfg_clkdm", + .prcm = { + .omap4 = { + .clkctrl_offs = DRA7XX_CM_L4CFG_MAILBOX4_CLKCTRL_OFFSET, + .context_offs = DRA7XX_RM_L4CFG_MAILBOX4_CONTEXT_OFFSET, + }, + }, +}; + +/* mailbox5 */ +static struct omap_hwmod dra7xx_mailbox5_hwmod = { + .name = "mailbox5", + .class = &dra7xx_mailbox_hwmod_class, + .clkdm_name = "l4cfg_clkdm", + .prcm = { + .omap4 = { + .clkctrl_offs = DRA7XX_CM_L4CFG_MAILBOX5_CLKCTRL_OFFSET, + .context_offs = DRA7XX_RM_L4CFG_MAILBOX5_CONTEXT_OFFSET, + }, + }, +}; + +/* mailbox6 */ +static struct omap_hwmod dra7xx_mailbox6_hwmod = { + .name = "mailbox6", + .class = &dra7xx_mailbox_hwmod_class, + .clkdm_name = "l4cfg_clkdm", + .prcm = { + .omap4 = { + .clkctrl_offs = DRA7XX_CM_L4CFG_MAILBOX6_CLKCTRL_OFFSET, + .context_offs = DRA7XX_RM_L4CFG_MAILBOX6_CONTEXT_OFFSET, + }, + }, +}; + +/* mailbox7 */ +static struct omap_hwmod dra7xx_mailbox7_hwmod = { + .name = "mailbox7", + .class = &dra7xx_mailbox_hwmod_class, + .clkdm_name = "l4cfg_clkdm", + .prcm = { + .omap4 = { + .clkctrl_offs = DRA7XX_CM_L4CFG_MAILBOX7_CLKCTRL_OFFSET, + .context_offs = DRA7XX_RM_L4CFG_MAILBOX7_CONTEXT_OFFSET, + }, + }, +}; + +/* mailbox8 */ +static struct omap_hwmod dra7xx_mailbox8_hwmod = { + .name = "mailbox8", + .class = &dra7xx_mailbox_hwmod_class, + .clkdm_name = "l4cfg_clkdm", + .prcm = { + .omap4 = { + .clkctrl_offs = DRA7XX_CM_L4CFG_MAILBOX8_CLKCTRL_OFFSET, + .context_offs = DRA7XX_RM_L4CFG_MAILBOX8_CONTEXT_OFFSET, + }, + }, +}; + +/* mailbox9 */ +static struct omap_hwmod dra7xx_mailbox9_hwmod = { + .name = "mailbox9", + .class = &dra7xx_mailbox_hwmod_class, + .clkdm_name = "l4cfg_clkdm", + .prcm = { + .omap4 = { + .clkctrl_offs = DRA7XX_CM_L4CFG_MAILBOX9_CLKCTRL_OFFSET, + .context_offs = DRA7XX_RM_L4CFG_MAILBOX9_CONTEXT_OFFSET, + }, + }, +}; + +/* mailbox10 */ +static struct omap_hwmod dra7xx_mailbox10_hwmod = { + .name = "mailbox10", + .class = &dra7xx_mailbox_hwmod_class, + .clkdm_name = "l4cfg_clkdm", + .prcm = { + .omap4 = { + .clkctrl_offs = DRA7XX_CM_L4CFG_MAILBOX10_CLKCTRL_OFFSET, + .context_offs = DRA7XX_RM_L4CFG_MAILBOX10_CONTEXT_OFFSET, + }, + }, +}; + +/* mailbox11 */ +static struct omap_hwmod dra7xx_mailbox11_hwmod = { + .name = "mailbox11", + .class = &dra7xx_mailbox_hwmod_class, + .clkdm_name = "l4cfg_clkdm", + .prcm = { + .omap4 = { + .clkctrl_offs = DRA7XX_CM_L4CFG_MAILBOX11_CLKCTRL_OFFSET, + .context_offs = DRA7XX_RM_L4CFG_MAILBOX11_CONTEXT_OFFSET, + }, + }, +}; + +/* mailbox12 */ +static struct omap_hwmod dra7xx_mailbox12_hwmod = { + .name = "mailbox12", + .class = &dra7xx_mailbox_hwmod_class, + .clkdm_name = "l4cfg_clkdm", + .prcm = { + .omap4 = { + .clkctrl_offs = DRA7XX_CM_L4CFG_MAILBOX12_CLKCTRL_OFFSET, + .context_offs = DRA7XX_RM_L4CFG_MAILBOX12_CONTEXT_OFFSET, + }, + }, +}; + +/* mailbox13 */ +static struct omap_hwmod dra7xx_mailbox13_hwmod = { + .name = "mailbox13", + .class = &dra7xx_mailbox_hwmod_class, + .clkdm_name = "l4cfg_clkdm", + .prcm = { + .omap4 = { + .clkctrl_offs = DRA7XX_CM_L4CFG_MAILBOX13_CLKCTRL_OFFSET, + .context_offs = DRA7XX_RM_L4CFG_MAILBOX13_CONTEXT_OFFSET, + }, + }, +}; + /* * 'mcspi' class * @@ -2246,6 +2434,110 @@ static struct omap_hwmod_ocp_if dra7xx_l4_per1__i2c5 = { .user = OCP_USER_MPU | OCP_USER_SDMA, }; +/* l4_cfg -> mailbox1 */ +static struct omap_hwmod_ocp_if dra7xx_l4_cfg__mailbox1 = { + .master = &dra7xx_l4_cfg_hwmod, + .slave = &dra7xx_mailbox1_hwmod, + .clk = "l3_iclk_div", + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +/* l4_per3 -> mailbox2 */ +static struct omap_hwmod_ocp_if dra7xx_l4_per3__mailbox2 = { + .master = &dra7xx_l4_per3_hwmod, + .slave = &dra7xx_mailbox2_hwmod, + .clk = "l3_iclk_div", + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +/* l4_per3 -> mailbox3 */ +static struct omap_hwmod_ocp_if dra7xx_l4_per3__mailbox3 = { + .master = &dra7xx_l4_per3_hwmod, + .slave = &dra7xx_mailbox3_hwmod, + .clk = "l3_iclk_div", + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +/* l4_per3 -> mailbox4 */ +static struct omap_hwmod_ocp_if dra7xx_l4_per3__mailbox4 = { + .master = &dra7xx_l4_per3_hwmod, + .slave = &dra7xx_mailbox4_hwmod, + .clk = "l3_iclk_div", + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +/* l4_per3 -> mailbox5 */ +static struct omap_hwmod_ocp_if dra7xx_l4_per3__mailbox5 = { + .master = &dra7xx_l4_per3_hwmod, + .slave = &dra7xx_mailbox5_hwmod, + .clk = "l3_iclk_div", + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +/* l4_per3 -> mailbox6 */ +static struct omap_hwmod_ocp_if dra7xx_l4_per3__mailbox6 = { + .master = &dra7xx_l4_per3_hwmod, + .slave = &dra7xx_mailbox6_hwmod, + .clk = "l3_iclk_div", + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +/* l4_per3 -> mailbox7 */ +static struct omap_hwmod_ocp_if dra7xx_l4_per3__mailbox7 = { + .master = &dra7xx_l4_per3_hwmod, + .slave = &dra7xx_mailbox7_hwmod, + .clk = "l3_iclk_div", + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +/* l4_per3 -> mailbox8 */ +static struct omap_hwmod_ocp_if dra7xx_l4_per3__mailbox8 = { + .master = &dra7xx_l4_per3_hwmod, + .slave = &dra7xx_mailbox8_hwmod, + .clk = "l3_iclk_div", + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +/* l4_per3 -> mailbox9 */ +static struct omap_hwmod_ocp_if dra7xx_l4_per3__mailbox9 = { + .master = &dra7xx_l4_per3_hwmod, + .slave = &dra7xx_mailbox9_hwmod, + .clk = "l3_iclk_div", + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +/* l4_per3 -> mailbox10 */ +static struct omap_hwmod_ocp_if dra7xx_l4_per3__mailbox10 = { + .master = &dra7xx_l4_per3_hwmod, + .slave = &dra7xx_mailbox10_hwmod, + .clk = "l3_iclk_div", + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +/* l4_per3 -> mailbox11 */ +static struct omap_hwmod_ocp_if dra7xx_l4_per3__mailbox11 = { + .master = &dra7xx_l4_per3_hwmod, + .slave = &dra7xx_mailbox11_hwmod, + .clk = "l3_iclk_div", + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +/* l4_per3 -> mailbox12 */ +static struct omap_hwmod_ocp_if dra7xx_l4_per3__mailbox12 = { + .master = &dra7xx_l4_per3_hwmod, + .slave = &dra7xx_mailbox12_hwmod, + .clk = "l3_iclk_div", + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + +/* l4_per3 -> mailbox13 */ +static struct omap_hwmod_ocp_if dra7xx_l4_per3__mailbox13 = { + .master = &dra7xx_l4_per3_hwmod, + .slave = &dra7xx_mailbox13_hwmod, + .clk = "l3_iclk_div", + .user = OCP_USER_MPU | OCP_USER_SDMA, +}; + /* l4_per1 -> mcspi1 */ static struct omap_hwmod_ocp_if dra7xx_l4_per1__mcspi1 = { .master = &dra7xx_l4_per1_hwmod, @@ -2662,6 +2954,19 @@ static struct omap_hwmod_ocp_if *dra7xx_hwmod_ocp_ifs[] __initdata = { &dra7xx_l4_per1__i2c3, &dra7xx_l4_per1__i2c4, &dra7xx_l4_per1__i2c5, + &dra7xx_l4_cfg__mailbox1, + &dra7xx_l4_per3__mailbox2, + &dra7xx_l4_per3__mailbox3, + &dra7xx_l4_per3__mailbox4, + &dra7xx_l4_per3__mailbox5, + &dra7xx_l4_per3__mailbox6, + &dra7xx_l4_per3__mailbox7, + &dra7xx_l4_per3__mailbox8, + &dra7xx_l4_per3__mailbox9, + &dra7xx_l4_per3__mailbox10, + &dra7xx_l4_per3__mailbox11, + &dra7xx_l4_per3__mailbox12, + &dra7xx_l4_per3__mailbox13, &dra7xx_l4_per1__mcspi1, &dra7xx_l4_per1__mcspi2, &dra7xx_l4_per1__mcspi3, From dbd5f4603e221cbbd6f206fb45e4d8b81f011a6a Mon Sep 17 00:00:00 2001 From: Suman Anna Date: Fri, 11 Jul 2014 16:44:40 -0500 Subject: [PATCH 07/10] ARM: OMAP2+: Avoid mailbox legacy device creation for DT-boot The legacy platform device for mailbox should not be created for a DT boot, so adjust the platform device initialization logic appropriately. Signed-off-by: Suman Anna Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/devices.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c index 592ba0a0ecf3..708eb7db630c 100644 --- a/arch/arm/mach-omap2/devices.c +++ b/arch/arm/mach-omap2/devices.c @@ -460,9 +460,9 @@ static int __init omap2_init_devices(void) omap_init_audio(); omap_init_camera(); omap_init_hdmi_audio(); - omap_init_mbox(); /* If dtb is there, the devices will be created dynamically */ if (!of_have_populated_dt()) { + omap_init_mbox(); omap_init_mcspi(); omap_init_sham(); omap_init_aes(); From 635b3801e0bb59ce7440588a63b4d54f320d0cbc Mon Sep 17 00:00:00 2001 From: Suman Anna Date: Fri, 11 Jul 2014 16:44:41 -0500 Subject: [PATCH 08/10] ARM: OMAP2: hwmod_data: Remove legacy mailbox data and addrs OMAP2 devices are devicetree boot only, and the legacy mode of mailbox device creation should no longer be used, so remove the mailbox attribute data and the hwmod addr space used for creating mailboxes in legacy mode. Acked-by: Paul Walmsley Signed-off-by: Suman Anna Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/omap_hwmod_2420_data.c | 14 -------------- arch/arm/mach-omap2/omap_hwmod_2430_data.c | 13 ------------- .../omap_hwmod_2xxx_3xxx_interconnect_data.c | 9 --------- arch/arm/mach-omap2/omap_hwmod_common_data.h | 1 - 4 files changed, 37 deletions(-) diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c index 2f15979c2e9c..65b1647092bd 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c @@ -16,7 +16,6 @@ #include #include #include -#include #include #include "omap_hwmod.h" @@ -163,18 +162,6 @@ static struct omap_hwmod omap2420_dma_system_hwmod = { }; /* mailbox */ -static struct omap_mbox_dev_info omap2420_mailbox_info[] = { - { .name = "dsp", .tx_id = 0, .rx_id = 1, .irq_id = 0, .usr_id = 0 }, - { .name = "iva", .tx_id = 2, .rx_id = 3, .irq_id = 1, .usr_id = 3 }, -}; - -static struct omap_mbox_pdata omap2420_mailbox_attrs = { - .num_users = 4, - .num_fifos = 6, - .info_cnt = ARRAY_SIZE(omap2420_mailbox_info), - .info = omap2420_mailbox_info, -}; - static struct omap_hwmod omap2420_mailbox_hwmod = { .name = "mailbox", .class = &omap2xxx_mailbox_hwmod_class, @@ -188,7 +175,6 @@ static struct omap_hwmod omap2420_mailbox_hwmod = { .idlest_idle_bit = OMAP24XX_ST_MAILBOXES_SHIFT, }, }, - .dev_attr = &omap2420_mailbox_attrs, }; /* diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c index 6d1b60902179..c2555cb95e71 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c @@ -17,7 +17,6 @@ #include #include #include -#include #include #include "omap_hwmod.h" @@ -161,17 +160,6 @@ static struct omap_hwmod omap2430_dma_system_hwmod = { }; /* mailbox */ -static struct omap_mbox_dev_info omap2430_mailbox_info[] = { - { .name = "dsp", .tx_id = 0, .rx_id = 1 }, -}; - -static struct omap_mbox_pdata omap2430_mailbox_attrs = { - .num_users = 4, - .num_fifos = 6, - .info_cnt = ARRAY_SIZE(omap2430_mailbox_info), - .info = omap2430_mailbox_info, -}; - static struct omap_hwmod omap2430_mailbox_hwmod = { .name = "mailbox", .class = &omap2xxx_mailbox_hwmod_class, @@ -185,7 +173,6 @@ static struct omap_hwmod omap2430_mailbox_hwmod = { .idlest_idle_bit = OMAP24XX_ST_MAILBOXES_SHIFT, }, }, - .dev_attr = &omap2430_mailbox_attrs, }; /* mcspi3 */ diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_interconnect_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_interconnect_data.c index 0413daba2dba..c1e98d589100 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_interconnect_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_interconnect_data.c @@ -152,15 +152,6 @@ struct omap_hwmod_addr_space omap2_dma_system_addrs[] = { { } }; -struct omap_hwmod_addr_space omap2_mailbox_addrs[] = { - { - .pa_start = 0x48094000, - .pa_end = 0x48094000 + SZ_512 - 1, - .flags = ADDR_TYPE_RT, - }, - { } -}; - struct omap_hwmod_addr_space omap2_mcbsp1_addrs[] = { { .name = "mpu", diff --git a/arch/arm/mach-omap2/omap_hwmod_common_data.h b/arch/arm/mach-omap2/omap_hwmod_common_data.h index 2c38c6b0ee03..11ed5a17dd77 100644 --- a/arch/arm/mach-omap2/omap_hwmod_common_data.h +++ b/arch/arm/mach-omap2/omap_hwmod_common_data.h @@ -33,7 +33,6 @@ extern struct omap_hwmod_addr_space omap2_mcspi1_addr_space[]; extern struct omap_hwmod_addr_space omap2_mcspi2_addr_space[]; extern struct omap_hwmod_addr_space omap2430_mcspi3_addr_space[]; extern struct omap_hwmod_addr_space omap2_dma_system_addrs[]; -extern struct omap_hwmod_addr_space omap2_mailbox_addrs[]; extern struct omap_hwmod_addr_space omap2_mcbsp1_addrs[]; extern struct omap_hwmod_addr_space omap2_hdq1w_addr_space[]; From 6be5da73fca9599394effac7338c4bb5cf399c7e Mon Sep 17 00:00:00 2001 From: Suman Anna Date: Fri, 11 Jul 2014 16:44:42 -0500 Subject: [PATCH 09/10] ARM: OMAP4: hwmod_data: Remove legacy mailbox addrs MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The legacy-style definition of the hwmod addr space is no longer required after the addition of the OMAP4 mailbox DT node, so clean up this data. Cc: Paul Walmsley Cc: Benoît Cousson Signed-off-by: Suman Anna Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 10 ---------- 1 file changed, 10 deletions(-) diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c index 41e54f759934..5e61b8c0944b 100644 --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c @@ -4142,21 +4142,11 @@ static struct omap_hwmod_ocp_if omap44xx_l4_wkup__kbd = { .user = OCP_USER_MPU | OCP_USER_SDMA, }; -static struct omap_hwmod_addr_space omap44xx_mailbox_addrs[] = { - { - .pa_start = 0x4a0f4000, - .pa_end = 0x4a0f41ff, - .flags = ADDR_TYPE_RT - }, - { } -}; - /* l4_cfg -> mailbox */ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__mailbox = { .master = &omap44xx_l4_cfg_hwmod, .slave = &omap44xx_mailbox_hwmod, .clk = "l4_div_ck", - .addr = omap44xx_mailbox_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; From cbf14f3ab9bd6295b345fc812f08ddd844fb183e Mon Sep 17 00:00:00 2001 From: Suman Anna Date: Fri, 11 Jul 2014 16:44:43 -0500 Subject: [PATCH 10/10] ARM: AM33xx: hwmod_data: Remove legacy mailbox addrs The legacy-style definition of the hwmod addr space is no longer required as AM33xx/AM43xx are DT-boot only, and the minimal mailbox DT nodes have been added, so clean up this data. Acked-by: Paul Walmsley Signed-off-by: Suman Anna Signed-off-by: Tony Lindgren --- .../omap_hwmod_33xx_43xx_interconnect_data.c | 10 ---------- 1 file changed, 10 deletions(-) diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_interconnect_data.c b/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_interconnect_data.c index e2db378b849e..8f5989d48a80 100644 --- a/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_interconnect_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_interconnect_data.c @@ -317,21 +317,11 @@ struct omap_hwmod_ocp_if am33xx_l4_per__i2c3 = { .user = OCP_USER_MPU, }; -static struct omap_hwmod_addr_space am33xx_mailbox_addrs[] = { - { - .pa_start = 0x480C8000, - .pa_end = 0x480C8000 + (SZ_4K - 1), - .flags = ADDR_TYPE_RT - }, - { } -}; - /* l4 ls -> mailbox */ struct omap_hwmod_ocp_if am33xx_l4_per__mailbox = { .master = &am33xx_l4_ls_hwmod, .slave = &am33xx_mailbox_hwmod, .clk = "l4ls_gclk", - .addr = am33xx_mailbox_addrs, .user = OCP_USER_MPU, };