[SCSI] mvsas: expander write performance enhancement
with 1 expander, connect 8 HDD, the write performance will be improved by 80%. Signed-off-by: Xiangliang Yu <yuxiangl@marvell.com> Signed-off-by: James Bottomley <JBottomley@Parallels.com>
This commit is contained in:
Родитель
aa117dd143
Коммит
3a4b7efe7f
|
@ -510,6 +510,15 @@ static int __devinit mvs_94xx_init(struct mvs_info *mvi)
|
|||
tmp |= CINT_PHY_MASK;
|
||||
mw32(MVS_INT_MASK, tmp);
|
||||
|
||||
/* tune STP performance */
|
||||
tmp = 0x003F003F;
|
||||
mvs_cw32(mvi, CMD_PL_TIMER, tmp);
|
||||
|
||||
/* This can improve expander large block size seq write performance */
|
||||
tmp = mvs_cr32(mvi, CMD_PORT_LAYER_TIMER1);
|
||||
tmp |= 0xFFFF007F;
|
||||
mvs_cw32(mvi, CMD_PORT_LAYER_TIMER1, tmp);
|
||||
|
||||
/* change the connection open-close behavior (bit 9)
|
||||
* set bit8 to 1 for performance tuning */
|
||||
tmp = mvs_cr32(mvi, CMD_SL_MODE0);
|
||||
|
|
|
@ -387,6 +387,7 @@ enum sas_cmd_port_registers {
|
|||
CMD_SL_MODE0 = 0x1BC, /* SL Mode 0 */
|
||||
CMD_SL_MODE1 = 0x1C0, /* SL Mode 1 */
|
||||
CMD_PND_FIFO_CTL1 = 0x1C4, /* Pending FIFO Control 1 */
|
||||
CMD_PORT_LAYER_TIMER1 = 0x1E0, /* Port Layer Timer 1 */
|
||||
};
|
||||
|
||||
enum mvs_info_flags {
|
||||
|
|
Загрузка…
Ссылка в новой задаче