i2c: imx: implement master_xfer_atomic callback
Rework the read and write code paths in the driver to support operation in atomic contexts. To achieve this, the driver must not rely on IRQs and not call schedule(), e.g. via a sleep routine, in these cases. With this patch the driver supports normal operation, DMA transfers and now the polling mode or also called sleep-free or IRQ-less operation. It makes the code not simpler or easier to read, but atomic I2C transfers are needed on some hardware configurations, e.g. to trigger reboots on an external PMIC chip. Signed-off-by: Stefan Lengfeld <contact@stefanchrist.eu> [m.felsch@pengutronix.de: integrate https://patchwork.ozlabs.org/patch/1085943/ review feedback] [m.felsch@pengutronix.de: adapt commit message] Signed-off-by: Marco Felsch <m.felsch@pengutronix.de> Acked-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-by: Stefan Agner <stefan@agner.ch> Tested-by: Stefan Lengfeld <contact@stefanchrist.eu> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
This commit is contained in:
Stefan Lengfeld
Wolfram Sang
Родитель
d3d3fdcc4c
Коммит
3a5ee18d2a
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@ -34,6 +34,7 @@
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/iopoll.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/of.h>
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@ -414,7 +415,7 @@ static void i2c_imx_dma_free(struct imx_i2c_struct *i2c_imx)
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dma->chan_using = NULL;
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}
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static int i2c_imx_bus_busy(struct imx_i2c_struct *i2c_imx, int for_busy)
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static int i2c_imx_bus_busy(struct imx_i2c_struct *i2c_imx, int for_busy, bool atomic)
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{
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unsigned long orig_jiffies = jiffies;
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unsigned int temp;
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@ -444,15 +445,37 @@ static int i2c_imx_bus_busy(struct imx_i2c_struct *i2c_imx, int for_busy)
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"<%s> I2C bus is busy\n", __func__);
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return -ETIMEDOUT;
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}
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schedule();
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if (atomic)
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udelay(100);
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else
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schedule();
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}
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return 0;
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}
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static int i2c_imx_trx_complete(struct imx_i2c_struct *i2c_imx)
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static int i2c_imx_trx_complete(struct imx_i2c_struct *i2c_imx, bool atomic)
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{
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wait_event_timeout(i2c_imx->queue, i2c_imx->i2csr & I2SR_IIF, HZ / 10);
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if (atomic) {
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void __iomem *addr = i2c_imx->base + (IMX_I2C_I2SR << i2c_imx->hwdata->regshift);
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unsigned int regval;
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/*
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* The formula for the poll timeout is documented in the RM
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* Rev.5 on page 1878:
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* T_min = 10/F_scl
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* Set the value hard as it is done for the non-atomic use-case.
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* Use 10 kHz for the calculation since this is the minimum
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* allowed SMBus frequency. Also add an offset of 100us since it
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* turned out that the I2SR_IIF bit isn't set correctly within
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* the minimum timeout in polling mode.
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*/
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readb_poll_timeout_atomic(addr, regval, regval & I2SR_IIF, 5, 1000 + 100);
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i2c_imx->i2csr = regval;
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imx_i2c_write_reg(0, i2c_imx, IMX_I2C_I2SR);
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} else {
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wait_event_timeout(i2c_imx->queue, i2c_imx->i2csr & I2SR_IIF, HZ / 10);
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}
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if (unlikely(!(i2c_imx->i2csr & I2SR_IIF))) {
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dev_dbg(&i2c_imx->adapter.dev, "<%s> Timeout\n", __func__);
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@ -530,7 +553,7 @@ static int i2c_imx_clk_notifier_call(struct notifier_block *nb,
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return NOTIFY_OK;
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}
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static int i2c_imx_start(struct imx_i2c_struct *i2c_imx)
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static int i2c_imx_start(struct imx_i2c_struct *i2c_imx, bool atomic)
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{
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unsigned int temp = 0;
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int result;
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@ -543,23 +566,29 @@ static int i2c_imx_start(struct imx_i2c_struct *i2c_imx)
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imx_i2c_write_reg(i2c_imx->hwdata->i2cr_ien_opcode, i2c_imx, IMX_I2C_I2CR);
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/* Wait controller to be stable */
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usleep_range(50, 150);
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if (atomic)
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udelay(50);
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else
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usleep_range(50, 150);
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/* Start I2C transaction */
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temp = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2CR);
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temp |= I2CR_MSTA;
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imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2CR);
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result = i2c_imx_bus_busy(i2c_imx, 1);
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result = i2c_imx_bus_busy(i2c_imx, 1, atomic);
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if (result)
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return result;
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temp |= I2CR_IIEN | I2CR_MTX | I2CR_TXAK;
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if (atomic)
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temp &= ~I2CR_IIEN; /* Disable interrupt */
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temp &= ~I2CR_DMAEN;
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imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2CR);
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return result;
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}
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static void i2c_imx_stop(struct imx_i2c_struct *i2c_imx)
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static void i2c_imx_stop(struct imx_i2c_struct *i2c_imx, bool atomic)
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{
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unsigned int temp = 0;
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@ -581,7 +610,7 @@ static void i2c_imx_stop(struct imx_i2c_struct *i2c_imx)
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}
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if (!i2c_imx->stopped)
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i2c_imx_bus_busy(i2c_imx, 0);
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i2c_imx_bus_busy(i2c_imx, 0, atomic);
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/* Disable I2C controller */
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temp = i2c_imx->hwdata->i2cr_ien_opcode ^ I2CR_IEN,
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@ -662,7 +691,7 @@ static int i2c_imx_dma_write(struct imx_i2c_struct *i2c_imx,
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/* The last data byte must be transferred by the CPU. */
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imx_i2c_write_reg(msgs->buf[msgs->len-1],
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i2c_imx, IMX_I2C_I2DR);
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result = i2c_imx_trx_complete(i2c_imx);
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result = i2c_imx_trx_complete(i2c_imx, false);
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if (result)
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return result;
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@ -721,7 +750,7 @@ static int i2c_imx_dma_read(struct imx_i2c_struct *i2c_imx,
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msgs->buf[msgs->len-2] = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2DR);
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/* read n byte data */
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result = i2c_imx_trx_complete(i2c_imx);
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result = i2c_imx_trx_complete(i2c_imx, false);
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if (result)
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return result;
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@ -734,7 +763,7 @@ static int i2c_imx_dma_read(struct imx_i2c_struct *i2c_imx,
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temp = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2CR);
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temp &= ~(I2CR_MSTA | I2CR_MTX);
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imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2CR);
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i2c_imx_bus_busy(i2c_imx, 0);
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i2c_imx_bus_busy(i2c_imx, 0, false);
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} else {
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/*
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* For i2c master receiver repeat restart operation like:
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@ -752,7 +781,8 @@ static int i2c_imx_dma_read(struct imx_i2c_struct *i2c_imx,
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return 0;
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}
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static int i2c_imx_write(struct imx_i2c_struct *i2c_imx, struct i2c_msg *msgs)
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static int i2c_imx_write(struct imx_i2c_struct *i2c_imx, struct i2c_msg *msgs,
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bool atomic)
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{
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int i, result;
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@ -761,7 +791,7 @@ static int i2c_imx_write(struct imx_i2c_struct *i2c_imx, struct i2c_msg *msgs)
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/* write slave address */
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imx_i2c_write_reg(i2c_8bit_addr_from_msg(msgs), i2c_imx, IMX_I2C_I2DR);
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result = i2c_imx_trx_complete(i2c_imx);
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result = i2c_imx_trx_complete(i2c_imx, atomic);
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if (result)
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return result;
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result = i2c_imx_acked(i2c_imx);
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@ -775,7 +805,7 @@ static int i2c_imx_write(struct imx_i2c_struct *i2c_imx, struct i2c_msg *msgs)
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"<%s> write byte: B%d=0x%X\n",
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__func__, i, msgs->buf[i]);
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imx_i2c_write_reg(msgs->buf[i], i2c_imx, IMX_I2C_I2DR);
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result = i2c_imx_trx_complete(i2c_imx);
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result = i2c_imx_trx_complete(i2c_imx, atomic);
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if (result)
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return result;
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result = i2c_imx_acked(i2c_imx);
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@ -785,7 +815,8 @@ static int i2c_imx_write(struct imx_i2c_struct *i2c_imx, struct i2c_msg *msgs)
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return 0;
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}
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static int i2c_imx_read(struct imx_i2c_struct *i2c_imx, struct i2c_msg *msgs, bool is_lastmsg)
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static int i2c_imx_read(struct imx_i2c_struct *i2c_imx, struct i2c_msg *msgs,
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bool is_lastmsg, bool atomic)
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{
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int i, result;
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unsigned int temp;
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@ -798,7 +829,7 @@ static int i2c_imx_read(struct imx_i2c_struct *i2c_imx, struct i2c_msg *msgs, bo
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/* write slave address */
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imx_i2c_write_reg(i2c_8bit_addr_from_msg(msgs), i2c_imx, IMX_I2C_I2DR);
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result = i2c_imx_trx_complete(i2c_imx);
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result = i2c_imx_trx_complete(i2c_imx, atomic);
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if (result)
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return result;
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result = i2c_imx_acked(i2c_imx);
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@ -831,7 +862,7 @@ static int i2c_imx_read(struct imx_i2c_struct *i2c_imx, struct i2c_msg *msgs, bo
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for (i = 0; i < msgs->len; i++) {
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u8 len = 0;
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result = i2c_imx_trx_complete(i2c_imx);
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result = i2c_imx_trx_complete(i2c_imx, atomic);
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if (result)
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return result;
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/*
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@ -859,7 +890,7 @@ static int i2c_imx_read(struct imx_i2c_struct *i2c_imx, struct i2c_msg *msgs, bo
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temp = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2CR);
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temp &= ~(I2CR_MSTA | I2CR_MTX);
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imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2CR);
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i2c_imx_bus_busy(i2c_imx, 0);
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i2c_imx_bus_busy(i2c_imx, 0, atomic);
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} else {
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/*
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* For i2c master receiver repeat restart operation like:
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@ -890,8 +921,8 @@ static int i2c_imx_read(struct imx_i2c_struct *i2c_imx, struct i2c_msg *msgs, bo
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return 0;
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}
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static int i2c_imx_xfer(struct i2c_adapter *adapter,
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struct i2c_msg *msgs, int num)
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static int i2c_imx_xfer_common(struct i2c_adapter *adapter,
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struct i2c_msg *msgs, int num, bool atomic)
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{
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unsigned int i, temp;
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int result;
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@ -900,16 +931,16 @@ static int i2c_imx_xfer(struct i2c_adapter *adapter,
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dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__);
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result = pm_runtime_get_sync(i2c_imx->adapter.dev.parent);
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if (result < 0)
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goto out;
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/* Start I2C transfer */
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result = i2c_imx_start(i2c_imx);
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result = i2c_imx_start(i2c_imx, atomic);
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if (result) {
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if (i2c_imx->adapter.bus_recovery_info) {
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/*
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* Bus recovery uses gpiod_get_value_cansleep() which is not
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* allowed within atomic context.
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*/
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if (!atomic && i2c_imx->adapter.bus_recovery_info) {
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i2c_recover_bus(&i2c_imx->adapter);
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result = i2c_imx_start(i2c_imx);
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result = i2c_imx_start(i2c_imx, atomic);
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}
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}
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@ -927,7 +958,7 @@ static int i2c_imx_xfer(struct i2c_adapter *adapter,
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temp = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2CR);
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temp |= I2CR_RSTA;
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imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2CR);
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result = i2c_imx_bus_busy(i2c_imx, 1);
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result = i2c_imx_bus_busy(i2c_imx, 1, atomic);
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if (result)
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goto fail0;
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}
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@ -951,13 +982,14 @@ static int i2c_imx_xfer(struct i2c_adapter *adapter,
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(temp & I2SR_SRW ? 1 : 0), (temp & I2SR_IIF ? 1 : 0),
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(temp & I2SR_RXAK ? 1 : 0));
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#endif
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if (msgs[i].flags & I2C_M_RD)
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result = i2c_imx_read(i2c_imx, &msgs[i], is_lastmsg);
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else {
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if (i2c_imx->dma && msgs[i].len >= DMA_THRESHOLD)
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if (msgs[i].flags & I2C_M_RD) {
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result = i2c_imx_read(i2c_imx, &msgs[i], is_lastmsg, atomic);
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} else {
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if (!atomic &&
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i2c_imx->dma && msgs[i].len >= DMA_THRESHOLD)
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result = i2c_imx_dma_write(i2c_imx, &msgs[i]);
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else
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result = i2c_imx_write(i2c_imx, &msgs[i]);
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result = i2c_imx_write(i2c_imx, &msgs[i], atomic);
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}
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if (result)
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goto fail0;
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@ -965,18 +997,49 @@ static int i2c_imx_xfer(struct i2c_adapter *adapter,
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fail0:
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/* Stop I2C transfer */
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i2c_imx_stop(i2c_imx);
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i2c_imx_stop(i2c_imx, atomic);
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pm_runtime_mark_last_busy(i2c_imx->adapter.dev.parent);
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pm_runtime_put_autosuspend(i2c_imx->adapter.dev.parent);
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out:
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dev_dbg(&i2c_imx->adapter.dev, "<%s> exit with: %s: %d\n", __func__,
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(result < 0) ? "error" : "success msg",
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(result < 0) ? result : num);
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return (result < 0) ? result : num;
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}
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static int i2c_imx_xfer(struct i2c_adapter *adapter,
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struct i2c_msg *msgs, int num)
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{
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struct imx_i2c_struct *i2c_imx = i2c_get_adapdata(adapter);
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int result;
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result = pm_runtime_get_sync(i2c_imx->adapter.dev.parent);
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if (result < 0)
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return result;
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result = i2c_imx_xfer_common(adapter, msgs, num, false);
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pm_runtime_mark_last_busy(i2c_imx->adapter.dev.parent);
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pm_runtime_put_autosuspend(i2c_imx->adapter.dev.parent);
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return result;
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}
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static int i2c_imx_xfer_atomic(struct i2c_adapter *adapter,
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struct i2c_msg *msgs, int num)
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{
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struct imx_i2c_struct *i2c_imx = i2c_get_adapdata(adapter);
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int result;
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result = clk_enable(i2c_imx->clk);
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if (result)
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return result;
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result = i2c_imx_xfer_common(adapter, msgs, num, true);
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clk_disable(i2c_imx->clk);
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return result;
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}
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static void i2c_imx_prepare_recovery(struct i2c_adapter *adap)
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{
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struct imx_i2c_struct *i2c_imx;
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@ -1049,8 +1112,9 @@ static u32 i2c_imx_func(struct i2c_adapter *adapter)
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}
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static const struct i2c_algorithm i2c_imx_algo = {
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.master_xfer = i2c_imx_xfer,
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.functionality = i2c_imx_func,
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.master_xfer = i2c_imx_xfer,
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.master_xfer_atomic = i2c_imx_xfer_atomic,
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.functionality = i2c_imx_func,
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};
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static int i2c_imx_probe(struct platform_device *pdev)
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