ARM: OMAP: Split plat-omap/i2c.c into mach-omap1 and mach-omap2
There's no need to keep the device related things in the common i2c.c as omap2+ is using hwmod. Split the code to mach-omap1 and mach-omap2 parts and only leave common code to plat-omap/i2c.c. Note that as omap1 only has one i2c controller, we can now remove the old device related macros. Reviewed-by: Shubhrajyoti D <shubhrajyoti@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
This commit is contained in:
Родитель
8599e7c587
Коммит
3a8761c027
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@ -28,6 +28,9 @@
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#include <plat/common.h>
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#include <linux/mtd/mtd.h>
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#include <linux/i2c-omap.h>
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#include "../plat-omap/i2c.h"
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#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
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void omap7xx_map_io(void);
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@ -19,11 +19,25 @@
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*
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*/
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#include <plat/i2c.h>
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#include <linux/i2c-omap.h>
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#include <mach/mux.h>
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#include <plat/cpu.h>
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void __init omap1_i2c_mux_pins(int bus_id)
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#include "../plat-omap/i2c.h"
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#define OMAP_I2C_SIZE 0x3f
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#define OMAP1_I2C_BASE 0xfffb3800
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#define OMAP1_INT_I2C (32 + 4)
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static const char name[] = "omap_i2c";
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static struct resource i2c_resources[2] = {
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};
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static struct platform_device omap_i2c_devices[1] = {
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};
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static void __init omap1_i2c_mux_pins(int bus_id)
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{
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if (cpu_is_omap7xx()) {
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omap_cfg_reg(I2C_7XX_SDA);
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@ -33,3 +47,44 @@ void __init omap1_i2c_mux_pins(int bus_id)
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omap_cfg_reg(I2C_SCL);
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}
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}
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int __init omap_i2c_add_bus(struct omap_i2c_bus_platform_data *pdata,
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int bus_id)
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{
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struct platform_device *pdev;
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struct resource *res;
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omap1_i2c_mux_pins(bus_id);
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pdev = &omap_i2c_devices[bus_id - 1];
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pdev->id = bus_id;
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pdev->name = name;
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pdev->num_resources = ARRAY_SIZE(i2c_resources);
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res = i2c_resources;
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res[0].start = OMAP1_I2C_BASE;
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res[0].end = res[0].start + OMAP_I2C_SIZE;
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res[0].flags = IORESOURCE_MEM;
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res[1].start = OMAP1_INT_I2C;
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res[1].flags = IORESOURCE_IRQ;
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pdev->resource = res;
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/* all OMAP1 have IP version 1 register set */
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pdata->rev = OMAP_I2C_IP_VERSION_1;
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/* all OMAP1 I2C are implemented like this */
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pdata->flags = OMAP_I2C_FLAG_NO_FIFO |
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OMAP_I2C_FLAG_SIMPLE_CLOCK |
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OMAP_I2C_FLAG_16BIT_DATA_REG |
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OMAP_I2C_FLAG_ALWAYS_ARMXOR_CLK;
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/* how the cpu bus is wired up differs for 7xx only */
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if (cpu_is_omap7xx())
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pdata->flags |= OMAP_I2C_FLAG_BUS_SHIFT_1;
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else
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pdata->flags |= OMAP_I2C_FLAG_BUS_SHIFT_2;
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pdev->dev.platform_data = pdata;
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return platform_device_register(pdev);
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}
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@ -22,7 +22,6 @@
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#include <asm/mach/arch.h>
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#include <asm/mach-types.h>
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#include <plat/i2c.h>
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#include <plat/usb.h>
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#include "gpmc.h"
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#include "common.h"
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@ -28,7 +28,9 @@
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#include <linux/irq.h>
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#include <linux/delay.h>
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#include <linux/i2c.h>
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#include <linux/i2c/twl.h>
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#include <linux/i2c-omap.h>
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#include <asm/proc-fns.h>
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@ -36,6 +38,8 @@
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#include <plat/serial.h>
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#include <plat/common.h>
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#include "i2c.h"
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#define OMAP_INTC_START NR_IRQS
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#ifdef CONFIG_SOC_OMAP2420
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@ -19,11 +19,12 @@
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*
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*/
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#include <plat/i2c.h>
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#include "common.h"
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#include <plat/omap_hwmod.h>
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#include <plat/omap_device.h>
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#include "mux.h"
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#include "i2c.h"
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/* In register I2C_CON, Bit 15 is the I2C enable bit */
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#define I2C_EN BIT(15)
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@ -33,7 +34,9 @@
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/* Maximum microseconds to wait for OMAP module to softreset */
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#define MAX_MODULE_SOFTRESET_WAIT 10000
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void __init omap2_i2c_mux_pins(int bus_id)
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#define MAX_OMAP_I2C_HWMOD_NAME_LEN 16
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static void __init omap2_i2c_mux_pins(int bus_id)
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{
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char mux_name[sizeof("i2c2_scl.i2c2_scl")];
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@ -104,3 +107,46 @@ int omap_i2c_reset(struct omap_hwmod *oh)
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return 0;
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}
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static const char name[] = "omap_i2c";
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int __init omap_i2c_add_bus(struct omap_i2c_bus_platform_data *i2c_pdata,
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int bus_id)
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{
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int l;
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struct omap_hwmod *oh;
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struct platform_device *pdev;
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char oh_name[MAX_OMAP_I2C_HWMOD_NAME_LEN];
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struct omap_i2c_bus_platform_data *pdata;
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struct omap_i2c_dev_attr *dev_attr;
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omap2_i2c_mux_pins(bus_id);
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l = snprintf(oh_name, MAX_OMAP_I2C_HWMOD_NAME_LEN, "i2c%d", bus_id);
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WARN(l >= MAX_OMAP_I2C_HWMOD_NAME_LEN,
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"String buffer overflow in I2C%d device setup\n", bus_id);
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oh = omap_hwmod_lookup(oh_name);
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if (!oh) {
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pr_err("Could not look up %s\n", oh_name);
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return -EEXIST;
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}
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pdata = i2c_pdata;
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/*
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* pass the hwmod class's CPU-specific knowledge of I2C IP revision in
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* use, and functionality implementation flags, up to the OMAP I2C
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* driver via platform data
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*/
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pdata->rev = oh->class->rev;
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dev_attr = (struct omap_i2c_dev_attr *)oh->dev_attr;
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pdata->flags = dev_attr->flags;
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pdev = omap_device_build(name, bus_id, oh, pdata,
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sizeof(struct omap_i2c_bus_platform_data),
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NULL, 0, 0);
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WARN(IS_ERR(pdev), "Could not build omap_device for %s\n", name);
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return PTR_RET(pdev);
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}
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@ -18,24 +18,11 @@
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* 02110-1301 USA
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*
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*/
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#ifndef __ASM__ARCH_OMAP_I2C_H
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#define __ASM__ARCH_OMAP_I2C_H
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#include <linux/i2c.h>
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#include <linux/i2c-omap.h>
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#include "../plat-omap/i2c.h"
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#if defined(CONFIG_I2C_OMAP) || defined(CONFIG_I2C_OMAP_MODULE)
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extern int omap_register_i2c_bus(int bus_id, u32 clkrate,
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struct i2c_board_info const *info,
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unsigned len);
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#else
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static inline int omap_register_i2c_bus(int bus_id, u32 clkrate,
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struct i2c_board_info const *info,
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unsigned len)
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{
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return 0;
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}
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#endif
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#ifndef __MACH_OMAP2_I2C_H
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#define __MACH_OMAP2_I2C_H
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/**
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* i2c_dev_attr - OMAP I2C controller device attributes for omap_hwmod
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u32 flags;
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};
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void __init omap1_i2c_mux_pins(int bus_id);
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void __init omap2_i2c_mux_pins(int bus_id);
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struct omap_hwmod;
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int omap_i2c_reset(struct omap_hwmod *oh);
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#endif /* __ASM__ARCH_OMAP_I2C_H */
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#endif /* __MACH_OMAP2_I2C_H */
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@ -12,12 +12,12 @@
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* XXX handle crossbar/shared link difference for L3?
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* XXX these should be marked initdata for multi-OMAP kernels
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*/
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#include <linux/i2c-omap.h>
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#include <linux/platform_data/spi-omap2-mcspi.h>
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#include <plat/omap_hwmod.h>
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#include <plat-omap/dma-omap.h>
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#include <plat/serial.h>
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#include <plat/i2c.h>
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#include <plat/dmtimer.h>
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#include "l3_2xxx.h"
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#include "l4_2xxx.h"
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@ -26,6 +26,7 @@
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#include "cm-regbits-24xx.h"
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#include "prm-regbits-24xx.h"
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#include "i2c.h"
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#include "mmc.h"
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#include "wd_timer.h"
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@ -12,13 +12,13 @@
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* XXX handle crossbar/shared link difference for L3?
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* XXX these should be marked initdata for multi-OMAP kernels
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*/
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#include <linux/i2c-omap.h>
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#include <linux/platform_data/asoc-ti-mcbsp.h>
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#include <linux/platform_data/spi-omap2-mcspi.h>
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#include <plat/omap_hwmod.h>
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#include <plat-omap/dma-omap.h>
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#include <plat/serial.h>
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#include <plat/i2c.h>
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#include <plat/dmtimer.h>
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#include "mmc.h"
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#include "l3_2xxx.h"
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#include "omap_hwmod_common_data.h"
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#include "prm-regbits-24xx.h"
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#include "cm-regbits-24xx.h"
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#include "i2c.h"
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#include "wd_timer.h"
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/*
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* GNU General Public License for more details.
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*/
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#include <linux/i2c-omap.h>
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#include <plat/omap_hwmod.h>
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#include <plat/cpu.h>
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#include <linux/platform_data/gpio-omap.h>
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#include <linux/platform_data/spi-omap2-mcspi.h>
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#include <plat/i2c.h>
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#include "omap_hwmod_common_data.h"
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@ -26,6 +27,7 @@
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#include "cm33xx.h"
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#include "prm33xx.h"
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#include "prm-regbits-33xx.h"
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#include "i2c.h"
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#include "mmc.h"
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/*
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@ -14,6 +14,8 @@
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*
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* XXX these should be marked initdata for multi-OMAP kernels
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*/
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#include <linux/i2c-omap.h>
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#include <linux/power/smartreflex.h>
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#include <linux/platform_data/gpio-omap.h>
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#include <plat/serial.h>
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#include "l3_3xxx.h"
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#include "l4_3xxx.h"
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#include <plat/i2c.h>
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#include <linux/platform_data/asoc-ti-mcbsp.h>
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#include <linux/platform_data/spi-omap2-mcspi.h>
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#include <plat/dmtimer.h>
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@ -36,6 +37,7 @@
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#include "cm-regbits-34xx.h"
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#include "dma.h"
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#include "i2c.h"
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#include "mmc.h"
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#include "wd_timer.h"
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@ -21,9 +21,9 @@
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#include <linux/io.h>
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#include <linux/platform_data/gpio-omap.h>
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#include <linux/power/smartreflex.h>
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#include <linux/i2c-omap.h>
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#include <plat/omap_hwmod.h>
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#include <plat/i2c.h>
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#include <plat-omap/dma-omap.h>
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#include <linux/platform_data/spi-omap2-mcspi.h>
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#include <linux/platform_data/asoc-ti-mcbsp.h>
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@ -36,6 +36,7 @@
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#include "cm2_44xx.h"
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#include "prm44xx.h"
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#include "prm-regbits-44xx.h"
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#include "i2c.h"
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#include "mmc.h"
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#include "wd_timer.h"
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@ -26,7 +26,6 @@
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#include <linux/regulator/machine.h>
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#include <linux/regulator/fixed.h>
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#include <plat/i2c.h>
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#include <plat/usb.h>
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#include "soc.h"
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@ -26,52 +26,18 @@
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#include <linux/kernel.h>
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#include <linux/platform_device.h>
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#include <linux/i2c.h>
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#include <linux/i2c-omap.h>
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#include <linux/slab.h>
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#include <linux/err.h>
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#include <linux/clk.h>
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#include <mach/irqs.h>
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#include <plat/i2c.h>
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#include <plat/omap_device.h>
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#include <plat/cpu.h>
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#define OMAP_I2C_SIZE 0x3f
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#define OMAP1_I2C_BASE 0xfffb3800
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#define OMAP1_INT_I2C (32 + 4)
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#include "i2c.h"
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static const char name[] = "omap_i2c";
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#define I2C_RESOURCE_BUILDER(base, irq) \
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{ \
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.start = (base), \
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.end = (base) + OMAP_I2C_SIZE, \
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.flags = IORESOURCE_MEM, \
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}, \
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{ \
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.start = (irq), \
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.flags = IORESOURCE_IRQ, \
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},
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static struct resource i2c_resources[][2] = {
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{ I2C_RESOURCE_BUILDER(0, 0) },
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};
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#define I2C_DEV_BUILDER(bus_id, res, data) \
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{ \
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.id = (bus_id), \
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.name = name, \
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.num_resources = ARRAY_SIZE(res), \
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.resource = (res), \
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.dev = { \
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.platform_data = (data), \
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}, \
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}
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#define MAX_OMAP_I2C_HWMOD_NAME_LEN 16
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#define OMAP_I2C_MAX_CONTROLLERS 4
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static struct omap_i2c_bus_platform_data i2c_pdata[OMAP_I2C_MAX_CONTROLLERS];
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static struct platform_device omap_i2c_devices[] = {
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I2C_DEV_BUILDER(1, i2c_resources[0], &i2c_pdata[0]),
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};
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#define OMAP_I2C_CMDLINE_SETUP (BIT(31))
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@ -91,95 +57,6 @@ static int __init omap_i2c_nr_ports(void)
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return ports;
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}
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static inline int omap1_i2c_add_bus(int bus_id)
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{
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struct platform_device *pdev;
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struct omap_i2c_bus_platform_data *pdata;
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struct resource *res;
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omap1_i2c_mux_pins(bus_id);
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pdev = &omap_i2c_devices[bus_id - 1];
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res = pdev->resource;
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res[0].start = OMAP1_I2C_BASE;
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res[0].end = res[0].start + OMAP_I2C_SIZE;
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res[1].start = OMAP1_INT_I2C;
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pdata = &i2c_pdata[bus_id - 1];
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/* all OMAP1 have IP version 1 register set */
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pdata->rev = OMAP_I2C_IP_VERSION_1;
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/* all OMAP1 I2C are implemented like this */
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pdata->flags = OMAP_I2C_FLAG_NO_FIFO |
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OMAP_I2C_FLAG_SIMPLE_CLOCK |
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OMAP_I2C_FLAG_16BIT_DATA_REG |
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OMAP_I2C_FLAG_ALWAYS_ARMXOR_CLK;
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/* how the cpu bus is wired up differs for 7xx only */
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if (cpu_is_omap7xx())
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pdata->flags |= OMAP_I2C_FLAG_BUS_SHIFT_1;
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else
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pdata->flags |= OMAP_I2C_FLAG_BUS_SHIFT_2;
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|
||||
return platform_device_register(pdev);
|
||||
}
|
||||
|
||||
|
||||
#ifdef CONFIG_ARCH_OMAP2PLUS
|
||||
static inline int omap2_i2c_add_bus(int bus_id)
|
||||
{
|
||||
int l;
|
||||
struct omap_hwmod *oh;
|
||||
struct platform_device *pdev;
|
||||
char oh_name[MAX_OMAP_I2C_HWMOD_NAME_LEN];
|
||||
struct omap_i2c_bus_platform_data *pdata;
|
||||
struct omap_i2c_dev_attr *dev_attr;
|
||||
|
||||
omap2_i2c_mux_pins(bus_id);
|
||||
|
||||
l = snprintf(oh_name, MAX_OMAP_I2C_HWMOD_NAME_LEN, "i2c%d", bus_id);
|
||||
WARN(l >= MAX_OMAP_I2C_HWMOD_NAME_LEN,
|
||||
"String buffer overflow in I2C%d device setup\n", bus_id);
|
||||
oh = omap_hwmod_lookup(oh_name);
|
||||
if (!oh) {
|
||||
pr_err("Could not look up %s\n", oh_name);
|
||||
return -EEXIST;
|
||||
}
|
||||
|
||||
pdata = &i2c_pdata[bus_id - 1];
|
||||
/*
|
||||
* pass the hwmod class's CPU-specific knowledge of I2C IP revision in
|
||||
* use, and functionality implementation flags, up to the OMAP I2C
|
||||
* driver via platform data
|
||||
*/
|
||||
pdata->rev = oh->class->rev;
|
||||
|
||||
dev_attr = (struct omap_i2c_dev_attr *)oh->dev_attr;
|
||||
pdata->flags = dev_attr->flags;
|
||||
|
||||
pdev = omap_device_build(name, bus_id, oh, pdata,
|
||||
sizeof(struct omap_i2c_bus_platform_data),
|
||||
NULL, 0, 0);
|
||||
WARN(IS_ERR(pdev), "Could not build omap_device for %s\n", name);
|
||||
|
||||
return PTR_RET(pdev);
|
||||
}
|
||||
#else
|
||||
static inline int omap2_i2c_add_bus(int bus_id)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
static int __init omap_i2c_add_bus(int bus_id)
|
||||
{
|
||||
if (cpu_class_is_omap1())
|
||||
return omap1_i2c_add_bus(bus_id);
|
||||
else
|
||||
return omap2_i2c_add_bus(bus_id);
|
||||
}
|
||||
|
||||
/**
|
||||
* omap_i2c_bus_setup - Process command line options for the I2C bus speed
|
||||
* @str: String of options
|
||||
|
@ -218,7 +95,7 @@ static int __init omap_register_i2c_bus_cmdline(void)
|
|||
for (i = 0; i < ARRAY_SIZE(i2c_pdata); i++)
|
||||
if (i2c_pdata[i].clkrate & OMAP_I2C_CMDLINE_SETUP) {
|
||||
i2c_pdata[i].clkrate &= ~OMAP_I2C_CMDLINE_SETUP;
|
||||
err = omap_i2c_add_bus(i + 1);
|
||||
err = omap_i2c_add_bus(&i2c_pdata[i], i + 1);
|
||||
if (err)
|
||||
goto out;
|
||||
}
|
||||
|
@ -256,5 +133,5 @@ int __init omap_register_i2c_bus(int bus_id, u32 clkrate,
|
|||
|
||||
i2c_pdata[bus_id - 1].clkrate &= ~OMAP_I2C_CMDLINE_SETUP;
|
||||
|
||||
return omap_i2c_add_bus(bus_id);
|
||||
return omap_i2c_add_bus(&i2c_pdata[bus_id - 1], bus_id);
|
||||
}
|
||||
|
|
|
@ -0,0 +1,47 @@
|
|||
/*
|
||||
* Helper module for board specific I2C bus registration
|
||||
*
|
||||
* Copyright (C) 2009 Nokia Corporation.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* version 2 as published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but
|
||||
* WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
* General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
|
||||
* 02110-1301 USA
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef __PLAT_OMAP_I2C_H
|
||||
#define __PLAT_OMAP_I2C_H
|
||||
|
||||
struct i2c_board_info;
|
||||
struct omap_i2c_bus_platform_data;
|
||||
|
||||
int omap_i2c_add_bus(struct omap_i2c_bus_platform_data *i2c_pdata,
|
||||
int bus_id);
|
||||
|
||||
#if defined(CONFIG_I2C_OMAP) || defined(CONFIG_I2C_OMAP_MODULE)
|
||||
extern int omap_register_i2c_bus(int bus_id, u32 clkrate,
|
||||
struct i2c_board_info const *info,
|
||||
unsigned len);
|
||||
#else
|
||||
static inline int omap_register_i2c_bus(int bus_id, u32 clkrate,
|
||||
struct i2c_board_info const *info,
|
||||
unsigned len)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
struct omap_hwmod;
|
||||
int omap_i2c_reset(struct omap_hwmod *oh);
|
||||
|
||||
#endif /* __PLAT_OMAP_I2C_H */
|
|
@ -27,7 +27,6 @@
|
|||
#ifndef __ARCH_ARM_MACH_OMAP_COMMON_H
|
||||
#define __ARCH_ARM_MACH_OMAP_COMMON_H
|
||||
|
||||
#include <plat/i2c.h>
|
||||
#include <plat/omap_hwmod.h>
|
||||
|
||||
extern int __init omap_init_clocksource_32k(void __iomem *vbase);
|
||||
|
|
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