x86/entry/64: Clear registers for exceptions/interrupts, to reduce speculation attack surface
Clear the 'extra' registers on entering the 64-bit kernel for exceptions and interrupts. The common registers are not cleared since they are likely clobbered well before they can be exploited in a speculative execution attack. Originally-From: Andi Kleen <ak@linux.intel.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com> Cc: <stable@vger.kernel.org> Cc: Andy Lutomirski <luto@kernel.org> Cc: Borislav Petkov <bp@alien8.de> Cc: Brian Gerst <brgerst@gmail.com> Cc: Denys Vlasenko <dvlasenk@redhat.com> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Josh Poimboeuf <jpoimboe@redhat.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Link: http://lkml.kernel.org/r/151787989146.7847.15749181712358213254.stgit@dwillia2-desk3.amr.corp.intel.com [ Made small improvements to the changelog and the code comments. ] Signed-off-by: Ingo Molnar <mingo@kernel.org>
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@ -147,6 +147,25 @@ For 32-bit we have the following conventions - kernel is built with
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UNWIND_HINT_REGS offset=\offset
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UNWIND_HINT_REGS offset=\offset
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.endm
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.endm
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/*
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* Sanitize registers of values that a speculation attack
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* might otherwise want to exploit. The lower registers are
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* likely clobbered well before they could be put to use in
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* a speculative execution gadget:
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*/
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.macro CLEAR_REGS_NOSPEC
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xorl %ebp, %ebp
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xorl %ebx, %ebx
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xorq %r8, %r8
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xorq %r9, %r9
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xorq %r10, %r10
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xorq %r11, %r11
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xorq %r12, %r12
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xorq %r13, %r13
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xorq %r14, %r14
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xorq %r15, %r15
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.endm
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.macro POP_EXTRA_REGS
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.macro POP_EXTRA_REGS
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popq %r15
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popq %r15
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popq %r14
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popq %r14
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@ -575,6 +575,7 @@ END(irq_entries_start)
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ALLOC_PT_GPREGS_ON_STACK
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ALLOC_PT_GPREGS_ON_STACK
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SAVE_C_REGS
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SAVE_C_REGS
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SAVE_EXTRA_REGS
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SAVE_EXTRA_REGS
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CLEAR_REGS_NOSPEC
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ENCODE_FRAME_POINTER
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ENCODE_FRAME_POINTER
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testb $3, CS(%rsp)
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testb $3, CS(%rsp)
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@ -1133,6 +1134,7 @@ ENTRY(xen_failsafe_callback)
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ALLOC_PT_GPREGS_ON_STACK
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ALLOC_PT_GPREGS_ON_STACK
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SAVE_C_REGS
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SAVE_C_REGS
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SAVE_EXTRA_REGS
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SAVE_EXTRA_REGS
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CLEAR_REGS_NOSPEC
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ENCODE_FRAME_POINTER
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ENCODE_FRAME_POINTER
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jmp error_exit
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jmp error_exit
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END(xen_failsafe_callback)
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END(xen_failsafe_callback)
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@ -1178,6 +1180,7 @@ ENTRY(paranoid_entry)
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cld
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cld
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SAVE_C_REGS 8
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SAVE_C_REGS 8
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SAVE_EXTRA_REGS 8
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SAVE_EXTRA_REGS 8
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CLEAR_REGS_NOSPEC
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ENCODE_FRAME_POINTER 8
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ENCODE_FRAME_POINTER 8
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movl $1, %ebx
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movl $1, %ebx
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movl $MSR_GS_BASE, %ecx
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movl $MSR_GS_BASE, %ecx
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@ -1230,8 +1233,8 @@ ENTRY(error_entry)
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cld
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cld
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SAVE_C_REGS 8
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SAVE_C_REGS 8
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SAVE_EXTRA_REGS 8
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SAVE_EXTRA_REGS 8
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CLEAR_REGS_NOSPEC
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ENCODE_FRAME_POINTER 8
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ENCODE_FRAME_POINTER 8
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xorl %ebx, %ebx
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testb $3, CS+8(%rsp)
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testb $3, CS+8(%rsp)
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jz .Lerror_kernelspace
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jz .Lerror_kernelspace
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@ -1428,6 +1431,7 @@ ENTRY(nmi)
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pushq %r14 /* pt_regs->r14 */
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pushq %r14 /* pt_regs->r14 */
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pushq %r15 /* pt_regs->r15 */
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pushq %r15 /* pt_regs->r15 */
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UNWIND_HINT_REGS
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UNWIND_HINT_REGS
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CLEAR_REGS_NOSPEC
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ENCODE_FRAME_POINTER
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ENCODE_FRAME_POINTER
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/*
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/*
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