ASoC: max9860: new driver
This is a driver for the MAX9860 Mono Audio Voice Codec. https://datasheets.maximintegrated.com/en/ds/MAX9860.pdf This driver does not support sidetone since the DVST register field is backwards with the mute near the maximum level instead of the minimum. Signed-off-by: Peter Rosin <peda@axentia.se> Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Peter Rosin
Mark Brown
Родитель
e1f90fc2d2
Коммит
3b2af7f799
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@ -7253,6 +7253,13 @@ F: Documentation/devicetree/bindings/i2c/max6697.txt
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F: drivers/hwmon/max6697.c
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F: include/linux/platform_data/max6697.h
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MAX9860 MONO AUDIO VOICE CODEC DRIVER
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M: Peter Rosin <peda@axentia.se>
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L: alsa-devel@alsa-project.org (moderated for non-subscribers)
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S: Maintained
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F: Documentation/devicetree/bindings/sound/max9860.txt
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F: sound/soc/codecs/max9860.*
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MAXIM MUIC CHARGER DRIVERS FOR EXYNOS BASED BOARDS
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M: Krzysztof Kozlowski <k.kozlowski@samsung.com>
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L: linux-pm@vger.kernel.org
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@ -84,6 +84,7 @@ config SND_SOC_ALL_CODECS
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select SND_SOC_MAX98925 if I2C
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select SND_SOC_MAX98926 if I2C
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select SND_SOC_MAX9850 if I2C
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select SND_SOC_MAX9860 if I2C
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select SND_SOC_MAX9768 if I2C
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select SND_SOC_MAX9877 if I2C
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select SND_SOC_MC13783 if MFD_MC13XXX
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@ -547,6 +548,11 @@ config SND_SOC_MAX98926
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config SND_SOC_MAX9850
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tristate
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config SND_SOC_MAX9860
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tristate "Maxim MAX9860 Mono Audio Voice Codec"
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depends on I2C
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select REGMAP_I2C
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config SND_SOC_PCM1681
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tristate "Texas Instruments PCM1681 CODEC"
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depends on I2C
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@ -79,6 +79,7 @@ snd-soc-max9867-objs := max9867.o
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snd-soc-max98925-objs := max98925.o
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snd-soc-max98926-objs := max98926.o
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snd-soc-max9850-objs := max9850.o
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snd-soc-max9860-objs := max9860.o
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snd-soc-mc13783-objs := mc13783.o
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snd-soc-ml26124-objs := ml26124.o
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snd-soc-nau8825-objs := nau8825.o
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@ -293,6 +294,7 @@ obj-$(CONFIG_SND_SOC_MAX9867) += snd-soc-max9867.o
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obj-$(CONFIG_SND_SOC_MAX98925) += snd-soc-max98925.o
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obj-$(CONFIG_SND_SOC_MAX98926) += snd-soc-max98926.o
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obj-$(CONFIG_SND_SOC_MAX9850) += snd-soc-max9850.o
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obj-$(CONFIG_SND_SOC_MAX9860) += snd-soc-max9860.o
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obj-$(CONFIG_SND_SOC_MC13783) += snd-soc-mc13783.o
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obj-$(CONFIG_SND_SOC_ML26124) += snd-soc-ml26124.o
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obj-$(CONFIG_SND_SOC_NAU8825) += snd-soc-nau8825.o
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@ -0,0 +1,753 @@
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/*
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* Driver for the MAX9860 Mono Audio Voice Codec
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*
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* https://datasheets.maximintegrated.com/en/ds/MAX9860.pdf
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*
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* The driver does not support sidetone since the DVST register field is
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* backwards with the mute near the maximum level instead of the minimum.
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*
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* Author: Peter Rosin <peda@axentia.s>
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* Copyright 2016 Axentia Technologies
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*/
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/clk.h>
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#include <linux/kernel.h>
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#include <linux/pm_runtime.h>
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#include <linux/regmap.h>
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#include <linux/i2c.h>
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#include <linux/regulator/consumer.h>
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#include <sound/soc.h>
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#include <sound/soc-dapm.h>
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#include <sound/pcm_params.h>
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#include <sound/tlv.h>
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#include "max9860.h"
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struct max9860_priv {
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struct regmap *regmap;
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struct regulator *dvddio;
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struct notifier_block dvddio_nb;
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u8 psclk;
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unsigned long pclk_rate;
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int fmt;
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};
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static int max9860_dvddio_event(struct notifier_block *nb,
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unsigned long event, void *data)
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{
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struct max9860_priv *max9860 = container_of(nb, struct max9860_priv,
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dvddio_nb);
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if (event & REGULATOR_EVENT_DISABLE) {
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regcache_mark_dirty(max9860->regmap);
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regcache_cache_only(max9860->regmap, true);
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}
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return 0;
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}
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static const struct reg_default max9860_reg_defaults[] = {
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{ MAX9860_PWRMAN, 0x00 },
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{ MAX9860_INTEN, 0x00 },
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{ MAX9860_SYSCLK, 0x00 },
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{ MAX9860_AUDIOCLKHIGH, 0x00 },
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{ MAX9860_AUDIOCLKLOW, 0x00 },
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{ MAX9860_IFC1A, 0x00 },
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{ MAX9860_IFC1B, 0x00 },
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{ MAX9860_VOICEFLTR, 0x00 },
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{ MAX9860_DACATTN, 0x00 },
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{ MAX9860_ADCLEVEL, 0x00 },
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{ MAX9860_DACGAIN, 0x00 },
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{ MAX9860_MICGAIN, 0x00 },
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{ MAX9860_MICADC, 0x00 },
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{ MAX9860_NOISEGATE, 0x00 },
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};
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static bool max9860_readable(struct device *dev, unsigned int reg)
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{
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switch (reg) {
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case MAX9860_INTRSTATUS ... MAX9860_MICGAIN:
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case MAX9860_MICADC ... MAX9860_PWRMAN:
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case MAX9860_REVISION:
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return true;
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}
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return false;
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}
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static bool max9860_writeable(struct device *dev, unsigned int reg)
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{
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switch (reg) {
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case MAX9860_INTEN ... MAX9860_MICGAIN:
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case MAX9860_MICADC ... MAX9860_PWRMAN:
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return true;
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}
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return false;
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}
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static bool max9860_volatile(struct device *dev, unsigned int reg)
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{
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switch (reg) {
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case MAX9860_INTRSTATUS:
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case MAX9860_MICREADBACK:
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return true;
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}
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return false;
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}
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static bool max9860_precious(struct device *dev, unsigned int reg)
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{
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switch (reg) {
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case MAX9860_INTRSTATUS:
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return true;
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}
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return false;
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}
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const struct regmap_config max9860_regmap = {
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.reg_bits = 8,
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.val_bits = 8,
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.readable_reg = max9860_readable,
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.writeable_reg = max9860_writeable,
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.volatile_reg = max9860_volatile,
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.precious_reg = max9860_precious,
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.max_register = MAX9860_MAX_REGISTER,
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.reg_defaults = max9860_reg_defaults,
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.num_reg_defaults = ARRAY_SIZE(max9860_reg_defaults),
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.cache_type = REGCACHE_RBTREE,
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};
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static const DECLARE_TLV_DB_SCALE(dva_tlv, -9100, 100, 1);
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static const DECLARE_TLV_DB_SCALE(dvg_tlv, 0, 600, 0);
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static const DECLARE_TLV_DB_SCALE(adc_tlv, -1200, 100, 0);
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static const DECLARE_TLV_DB_RANGE(pam_tlv,
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0, MAX9860_PAM_MAX - 1, TLV_DB_SCALE_ITEM(-2000, 2000, 1),
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MAX9860_PAM_MAX, MAX9860_PAM_MAX, TLV_DB_SCALE_ITEM(3000, 0, 0));
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static const DECLARE_TLV_DB_SCALE(pgam_tlv, 0, 100, 0);
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static const DECLARE_TLV_DB_SCALE(anth_tlv, -7600, 400, 1);
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static const DECLARE_TLV_DB_SCALE(agcth_tlv, -1800, 100, 0);
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static const char * const agchld_text[] = {
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"AGC Disabled", "50ms", "100ms", "400ms"
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};
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static SOC_ENUM_SINGLE_DECL(agchld_enum, MAX9860_MICADC,
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MAX9860_AGCHLD_SHIFT, agchld_text);
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static const char * const agcsrc_text[] = {
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"Left ADC", "Left/Right ADC"
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};
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static SOC_ENUM_SINGLE_DECL(agcsrc_enum, MAX9860_MICADC,
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MAX9860_AGCSRC_SHIFT, agcsrc_text);
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static const char * const agcatk_text[] = {
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"3ms", "12ms", "50ms", "200ms"
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};
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static SOC_ENUM_SINGLE_DECL(agcatk_enum, MAX9860_MICADC,
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MAX9860_AGCATK_SHIFT, agcatk_text);
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static const char * const agcrls_text[] = {
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"78ms", "156ms", "312ms", "625ms",
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"1.25s", "2.5s", "5s", "10s"
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};
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static SOC_ENUM_SINGLE_DECL(agcrls_enum, MAX9860_MICADC,
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MAX9860_AGCRLS_SHIFT, agcrls_text);
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static const char * const filter_text[] = {
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"Disabled",
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"Elliptical HP 217Hz notch (16kHz)",
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"Butterworth HP 500Hz (16kHz)",
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"Elliptical HP 217Hz notch (8kHz)",
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"Butterworth HP 500Hz (8kHz)",
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"Butterworth HP 200Hz (48kHz)"
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};
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static SOC_ENUM_SINGLE_DECL(avflt_enum, MAX9860_VOICEFLTR,
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MAX9860_AVFLT_SHIFT, filter_text);
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static SOC_ENUM_SINGLE_DECL(dvflt_enum, MAX9860_VOICEFLTR,
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MAX9860_DVFLT_SHIFT, filter_text);
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static const struct snd_kcontrol_new max9860_controls[] = {
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SOC_SINGLE_TLV("Master Playback Volume", MAX9860_DACATTN,
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MAX9860_DVA_SHIFT, MAX9860_DVA_MUTE, 1, dva_tlv),
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SOC_SINGLE_TLV("DAC Gain Volume", MAX9860_DACGAIN,
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MAX9860_DVG_SHIFT, MAX9860_DVG_MAX, 0, dvg_tlv),
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SOC_DOUBLE_TLV("Line Capture Volume", MAX9860_ADCLEVEL,
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MAX9860_ADCLL_SHIFT, MAX9860_ADCRL_SHIFT, MAX9860_ADCxL_MIN, 1,
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adc_tlv),
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SOC_ENUM("AGC Hold Time", agchld_enum),
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SOC_ENUM("AGC/Noise Gate Source", agcsrc_enum),
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SOC_ENUM("AGC Attack Time", agcatk_enum),
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SOC_ENUM("AGC Release Time", agcrls_enum),
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SOC_SINGLE_TLV("Noise Gate Threshold Volume", MAX9860_NOISEGATE,
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MAX9860_ANTH_SHIFT, MAX9860_ANTH_MAX, 0, anth_tlv),
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SOC_SINGLE_TLV("AGC Signal Threshold Volume", MAX9860_NOISEGATE,
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MAX9860_AGCTH_SHIFT, MAX9860_AGCTH_MIN, 1, agcth_tlv),
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SOC_SINGLE_TLV("Mic PGA Volume", MAX9860_MICGAIN,
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MAX9860_PGAM_SHIFT, MAX9860_PGAM_MIN, 1, pgam_tlv),
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SOC_SINGLE_TLV("Mic Preamp Volume", MAX9860_MICGAIN,
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MAX9860_PAM_SHIFT, MAX9860_PAM_MAX, 0, pam_tlv),
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SOC_ENUM("ADC Filter", avflt_enum),
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SOC_ENUM("DAC Filter", dvflt_enum),
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};
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static const struct snd_soc_dapm_widget max9860_dapm_widgets[] = {
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SND_SOC_DAPM_INPUT("MICL"),
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SND_SOC_DAPM_INPUT("MICR"),
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SND_SOC_DAPM_ADC("ADCL", NULL, MAX9860_PWRMAN, MAX9860_ADCLEN_SHIFT, 0),
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SND_SOC_DAPM_ADC("ADCR", NULL, MAX9860_PWRMAN, MAX9860_ADCREN_SHIFT, 0),
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SND_SOC_DAPM_AIF_OUT("AIFOUTL", "Capture", 0, SND_SOC_NOPM, 0, 0),
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SND_SOC_DAPM_AIF_OUT("AIFOUTR", "Capture", 1, SND_SOC_NOPM, 0, 0),
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SND_SOC_DAPM_AIF_IN("AIFINL", "Playback", 0, SND_SOC_NOPM, 0, 0),
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SND_SOC_DAPM_AIF_IN("AIFINR", "Playback", 1, SND_SOC_NOPM, 0, 0),
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SND_SOC_DAPM_DAC("DAC", NULL, MAX9860_PWRMAN, MAX9860_DACEN_SHIFT, 0),
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SND_SOC_DAPM_OUTPUT("OUT"),
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SND_SOC_DAPM_SUPPLY("Supply", SND_SOC_NOPM, 0, 0,
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NULL, SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
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SND_SOC_DAPM_REGULATOR_SUPPLY("AVDD", 0, 0),
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SND_SOC_DAPM_REGULATOR_SUPPLY("DVDD", 0, 0),
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SND_SOC_DAPM_CLOCK_SUPPLY("mclk"),
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};
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static const struct snd_soc_dapm_route max9860_dapm_routes[] = {
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{ "ADCL", NULL, "MICL" },
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{ "ADCR", NULL, "MICR" },
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{ "AIFOUTL", NULL, "ADCL" },
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{ "AIFOUTR", NULL, "ADCR" },
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{ "DAC", NULL, "AIFINL" },
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{ "DAC", NULL, "AIFINR" },
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{ "OUT", NULL, "DAC" },
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{ "Supply", NULL, "AVDD" },
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{ "Supply", NULL, "DVDD" },
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{ "Supply", NULL, "mclk" },
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{ "DAC", NULL, "Supply" },
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{ "ADCL", NULL, "Supply" },
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{ "ADCR", NULL, "Supply" },
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};
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static int max9860_hw_params(struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *params,
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struct snd_soc_dai *dai)
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{
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struct snd_soc_codec *codec = dai->codec;
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struct max9860_priv *max9860 = snd_soc_codec_get_drvdata(codec);
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u8 master;
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u8 ifc1a = 0;
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u8 ifc1b = 0;
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u8 sysclk = 0;
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unsigned long n;
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int ret;
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dev_dbg(codec->dev, "hw_params %u Hz, %u channels\n",
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params_rate(params),
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params_channels(params));
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if (params_channels(params) == 2)
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ifc1b |= MAX9860_ST;
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switch (max9860->fmt & SND_SOC_DAIFMT_MASTER_MASK) {
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case SND_SOC_DAIFMT_CBS_CFS:
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master = 0;
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break;
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case SND_SOC_DAIFMT_CBM_CFM:
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master = MAX9860_MASTER;
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break;
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default:
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return -EINVAL;
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}
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ifc1a |= master;
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if (master) {
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if (params_width(params) * params_channels(params) > 48)
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ifc1b |= MAX9860_BSEL_64X;
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else
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ifc1b |= MAX9860_BSEL_48X;
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}
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switch (max9860->fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
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case SND_SOC_DAIFMT_I2S:
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ifc1a |= MAX9860_DDLY;
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ifc1b |= MAX9860_ADLY;
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break;
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case SND_SOC_DAIFMT_LEFT_J:
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ifc1a |= MAX9860_WCI;
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break;
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case SND_SOC_DAIFMT_DSP_A:
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if (params_width(params) != 16) {
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dev_err(codec->dev,
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"DSP_A works for 16 bits per sample only.\n");
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return -EINVAL;
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}
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ifc1a |= MAX9860_DDLY | MAX9860_WCI | MAX9860_HIZ | MAX9860_TDM;
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ifc1b |= MAX9860_ADLY;
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break;
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case SND_SOC_DAIFMT_DSP_B:
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if (params_width(params) != 16) {
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dev_err(codec->dev,
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"DSP_B works for 16 bits per sample only.\n");
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return -EINVAL;
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}
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ifc1a |= MAX9860_WCI | MAX9860_HIZ | MAX9860_TDM;
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break;
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default:
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return -EINVAL;
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}
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switch (max9860->fmt & SND_SOC_DAIFMT_INV_MASK) {
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case SND_SOC_DAIFMT_NB_NF:
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break;
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case SND_SOC_DAIFMT_NB_IF:
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switch (max9860->fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
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case SND_SOC_DAIFMT_DSP_A:
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case SND_SOC_DAIFMT_DSP_B:
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return -EINVAL;
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}
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ifc1a ^= MAX9860_WCI;
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break;
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case SND_SOC_DAIFMT_IB_IF:
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switch (max9860->fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
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case SND_SOC_DAIFMT_DSP_A:
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case SND_SOC_DAIFMT_DSP_B:
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return -EINVAL;
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}
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ifc1a ^= MAX9860_WCI;
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/* fall through */
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case SND_SOC_DAIFMT_IB_NF:
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ifc1a ^= MAX9860_DBCI;
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ifc1b ^= MAX9860_ABCI;
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break;
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||||
default:
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
dev_dbg(codec->dev, "IFC1A %02x\n", ifc1a);
|
||||
ret = regmap_write(max9860->regmap, MAX9860_IFC1A, ifc1a);
|
||||
if (ret) {
|
||||
dev_err(codec->dev, "Failed to set IFC1A: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
dev_dbg(codec->dev, "IFC1B %02x\n", ifc1b);
|
||||
ret = regmap_write(max9860->regmap, MAX9860_IFC1B, ifc1b);
|
||||
if (ret) {
|
||||
dev_err(codec->dev, "Failed to set IFC1B: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
/*
|
||||
* Check if Integer Clock Mode is possible, but avoid it in slave mode
|
||||
* since we then do not know if lrclk is derived from pclk and the
|
||||
* datasheet mentions that the frequencies have to match exactly in
|
||||
* order for this to work.
|
||||
*/
|
||||
if (params_rate(params) == 8000 || params_rate(params) == 16000) {
|
||||
if (master) {
|
||||
switch (max9860->pclk_rate) {
|
||||
case 12000000:
|
||||
sysclk = MAX9860_FREQ_12MHZ;
|
||||
break;
|
||||
case 13000000:
|
||||
sysclk = MAX9860_FREQ_13MHZ;
|
||||
break;
|
||||
case 19200000:
|
||||
sysclk = MAX9860_FREQ_19_2MHZ;
|
||||
break;
|
||||
default:
|
||||
/*
|
||||
* Integer Clock Mode not possible. Leave
|
||||
* sysclk at zero and fall through to the
|
||||
* code below for PLL mode.
|
||||
*/
|
||||
break;
|
||||
}
|
||||
|
||||
if (sysclk && params_rate(params) == 16000)
|
||||
sysclk |= MAX9860_16KHZ;
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* Largest possible n:
|
||||
* 65536 * 96 * 48kHz / 10MHz -> 30199
|
||||
* Smallest possible n:
|
||||
* 65536 * 96 * 8kHz / 20MHz -> 2517
|
||||
* Both fit nicely in the available 15 bits, no need to apply any mask.
|
||||
*/
|
||||
n = DIV_ROUND_CLOSEST_ULL(65536ULL * 96 * params_rate(params),
|
||||
max9860->pclk_rate);
|
||||
|
||||
if (!sysclk) {
|
||||
/* PLL mode */
|
||||
if (params_rate(params) > 24000)
|
||||
sysclk |= MAX9860_16KHZ;
|
||||
|
||||
if (!master)
|
||||
n |= 1; /* trigger rapid pll lock mode */
|
||||
}
|
||||
|
||||
sysclk |= max9860->psclk;
|
||||
dev_dbg(codec->dev, "SYSCLK %02x\n", sysclk);
|
||||
ret = regmap_write(max9860->regmap,
|
||||
MAX9860_SYSCLK, sysclk);
|
||||
if (ret) {
|
||||
dev_err(codec->dev, "Failed to set SYSCLK: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
dev_dbg(codec->dev, "N %lu\n", n);
|
||||
ret = regmap_write(max9860->regmap,
|
||||
MAX9860_AUDIOCLKHIGH, n >> 8);
|
||||
if (ret) {
|
||||
dev_err(codec->dev, "Failed to set NHI: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
ret = regmap_write(max9860->regmap,
|
||||
MAX9860_AUDIOCLKLOW, n & 0xff);
|
||||
if (ret) {
|
||||
dev_err(codec->dev, "Failed to set NLO: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
if (!master) {
|
||||
dev_dbg(codec->dev, "Enable PLL\n");
|
||||
ret = regmap_update_bits(max9860->regmap, MAX9860_AUDIOCLKHIGH,
|
||||
MAX9860_PLL, MAX9860_PLL);
|
||||
if (ret) {
|
||||
dev_err(codec->dev, "Failed to enable PLL: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int max9860_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
|
||||
{
|
||||
struct snd_soc_codec *codec = dai->codec;
|
||||
struct max9860_priv *max9860 = snd_soc_codec_get_drvdata(codec);
|
||||
|
||||
switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
|
||||
case SND_SOC_DAIFMT_CBM_CFM:
|
||||
case SND_SOC_DAIFMT_CBS_CFS:
|
||||
max9860->fmt = fmt;
|
||||
return 0;
|
||||
|
||||
default:
|
||||
return -EINVAL;
|
||||
}
|
||||
}
|
||||
|
||||
static const struct snd_soc_dai_ops max9860_dai_ops = {
|
||||
.hw_params = max9860_hw_params,
|
||||
.set_fmt = max9860_set_fmt,
|
||||
};
|
||||
|
||||
static struct snd_soc_dai_driver max9860_dai = {
|
||||
.name = "max9860-hifi",
|
||||
.playback = {
|
||||
.stream_name = "Playback",
|
||||
.channels_min = 1,
|
||||
.channels_max = 2,
|
||||
.rates = SNDRV_PCM_RATE_CONTINUOUS,
|
||||
.rate_min = 8000,
|
||||
.rate_max = 48000,
|
||||
.formats = SNDRV_PCM_FMTBIT_S16_LE |
|
||||
SNDRV_PCM_FMTBIT_S24_LE |
|
||||
SNDRV_PCM_FMTBIT_S32_LE,
|
||||
},
|
||||
.capture = {
|
||||
.stream_name = "Capture",
|
||||
.channels_min = 1,
|
||||
.channels_max = 2,
|
||||
.rates = SNDRV_PCM_RATE_CONTINUOUS,
|
||||
.rate_min = 8000,
|
||||
.rate_max = 48000,
|
||||
.formats = SNDRV_PCM_FMTBIT_S16_LE |
|
||||
SNDRV_PCM_FMTBIT_S24_LE |
|
||||
SNDRV_PCM_FMTBIT_S32_LE,
|
||||
},
|
||||
.ops = &max9860_dai_ops,
|
||||
.symmetric_rates = 1,
|
||||
};
|
||||
|
||||
static int max9860_set_bias_level(struct snd_soc_codec *codec,
|
||||
enum snd_soc_bias_level level)
|
||||
{
|
||||
struct max9860_priv *max9860 = dev_get_drvdata(codec->dev);
|
||||
int ret;
|
||||
|
||||
switch (level) {
|
||||
case SND_SOC_BIAS_ON:
|
||||
case SND_SOC_BIAS_PREPARE:
|
||||
break;
|
||||
|
||||
case SND_SOC_BIAS_STANDBY:
|
||||
ret = regmap_update_bits(max9860->regmap, MAX9860_PWRMAN,
|
||||
MAX9860_SHDN, MAX9860_SHDN);
|
||||
if (ret) {
|
||||
dev_err(codec->dev, "Failed to remove SHDN: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
break;
|
||||
|
||||
case SND_SOC_BIAS_OFF:
|
||||
ret = regmap_update_bits(max9860->regmap, MAX9860_PWRMAN,
|
||||
MAX9860_SHDN, 0);
|
||||
if (ret) {
|
||||
dev_err(codec->dev, "Failed to request SHDN: %d\n",
|
||||
ret);
|
||||
return ret;
|
||||
}
|
||||
break;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct snd_soc_codec_driver max9860_codec_driver = {
|
||||
.set_bias_level = max9860_set_bias_level,
|
||||
.idle_bias_off = true,
|
||||
|
||||
.controls = max9860_controls,
|
||||
.num_controls = ARRAY_SIZE(max9860_controls),
|
||||
.dapm_widgets = max9860_dapm_widgets,
|
||||
.num_dapm_widgets = ARRAY_SIZE(max9860_dapm_widgets),
|
||||
.dapm_routes = max9860_dapm_routes,
|
||||
.num_dapm_routes = ARRAY_SIZE(max9860_dapm_routes),
|
||||
};
|
||||
|
||||
#ifdef CONFIG_PM
|
||||
static int max9860_suspend(struct device *dev)
|
||||
{
|
||||
struct max9860_priv *max9860 = dev_get_drvdata(dev);
|
||||
int ret;
|
||||
|
||||
ret = regmap_update_bits(max9860->regmap, MAX9860_SYSCLK,
|
||||
MAX9860_PSCLK, MAX9860_PSCLK_OFF);
|
||||
if (ret) {
|
||||
dev_err(dev, "Failed to disable clock: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
regulator_disable(max9860->dvddio);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int max9860_resume(struct device *dev)
|
||||
{
|
||||
struct max9860_priv *max9860 = dev_get_drvdata(dev);
|
||||
int ret;
|
||||
|
||||
ret = regulator_enable(max9860->dvddio);
|
||||
if (ret) {
|
||||
dev_err(dev, "Failed to enable DVDDIO: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
regcache_cache_only(max9860->regmap, false);
|
||||
ret = regcache_sync(max9860->regmap);
|
||||
if (ret) {
|
||||
dev_err(dev, "Failed to sync cache: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
ret = regmap_update_bits(max9860->regmap, MAX9860_SYSCLK,
|
||||
MAX9860_PSCLK, max9860->psclk);
|
||||
if (ret) {
|
||||
dev_err(dev, "Failed to enable clock: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
const struct dev_pm_ops max9860_pm_ops = {
|
||||
SET_RUNTIME_PM_OPS(max9860_suspend, max9860_resume, NULL)
|
||||
};
|
||||
|
||||
static int max9860_probe(struct i2c_client *i2c,
|
||||
const struct i2c_device_id *id)
|
||||
{
|
||||
struct device *dev = &i2c->dev;
|
||||
struct max9860_priv *max9860;
|
||||
int ret;
|
||||
struct clk *mclk;
|
||||
unsigned long mclk_rate;
|
||||
int i;
|
||||
int intr;
|
||||
|
||||
max9860 = devm_kzalloc(dev, sizeof(struct max9860_priv), GFP_KERNEL);
|
||||
if (!max9860)
|
||||
return -ENOMEM;
|
||||
|
||||
max9860->dvddio = devm_regulator_get(dev, "DVDDIO");
|
||||
if (IS_ERR(max9860->dvddio)) {
|
||||
ret = PTR_ERR(max9860->dvddio);
|
||||
if (ret != -EPROBE_DEFER)
|
||||
dev_err(dev, "Failed to get DVDDIO supply: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
max9860->dvddio_nb.notifier_call = max9860_dvddio_event;
|
||||
|
||||
ret = regulator_register_notifier(max9860->dvddio, &max9860->dvddio_nb);
|
||||
if (ret)
|
||||
dev_err(dev, "Failed to register DVDDIO notifier: %d\n", ret);
|
||||
|
||||
ret = regulator_enable(max9860->dvddio);
|
||||
if (ret != 0) {
|
||||
dev_err(dev, "Failed to enable DVDDIO: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
max9860->regmap = devm_regmap_init_i2c(i2c, &max9860_regmap);
|
||||
if (IS_ERR(max9860->regmap)) {
|
||||
ret = PTR_ERR(max9860->regmap);
|
||||
goto err_regulator;
|
||||
}
|
||||
|
||||
dev_set_drvdata(dev, max9860);
|
||||
|
||||
/*
|
||||
* mclk has to be in the 10MHz to 60MHz range.
|
||||
* psclk is used to scale mclk into pclk so that
|
||||
* pclk is in the 10MHz to 20MHz range.
|
||||
*/
|
||||
mclk = clk_get(dev, "mclk");
|
||||
|
||||
if (IS_ERR(mclk)) {
|
||||
ret = PTR_ERR(mclk);
|
||||
if (ret != -EPROBE_DEFER)
|
||||
dev_err(dev, "Failed to get MCLK: %d\n", ret);
|
||||
goto err_regulator;
|
||||
}
|
||||
|
||||
mclk_rate = clk_get_rate(mclk);
|
||||
clk_put(mclk);
|
||||
|
||||
if (mclk_rate > 60000000 || mclk_rate < 10000000) {
|
||||
dev_err(dev, "Bad mclk %luHz (needs 10MHz - 60MHz)\n",
|
||||
mclk_rate);
|
||||
ret = -EINVAL;
|
||||
goto err_regulator;
|
||||
}
|
||||
if (mclk_rate >= 40000000)
|
||||
max9860->psclk = 3;
|
||||
else if (mclk_rate >= 20000000)
|
||||
max9860->psclk = 2;
|
||||
else
|
||||
max9860->psclk = 1;
|
||||
max9860->pclk_rate = mclk_rate >> (max9860->psclk - 1);
|
||||
max9860->psclk <<= MAX9860_PSCLK_SHIFT;
|
||||
dev_dbg(dev, "mclk %lu pclk %lu\n", mclk_rate, max9860->pclk_rate);
|
||||
|
||||
regcache_cache_bypass(max9860->regmap, true);
|
||||
for (i = 0; i < max9860_regmap.num_reg_defaults; ++i) {
|
||||
ret = regmap_write(max9860->regmap,
|
||||
max9860_regmap.reg_defaults[i].reg,
|
||||
max9860_regmap.reg_defaults[i].def);
|
||||
if (ret) {
|
||||
dev_err(dev, "Failed to initialize register %u: %d\n",
|
||||
max9860_regmap.reg_defaults[i].reg, ret);
|
||||
goto err_regulator;
|
||||
}
|
||||
}
|
||||
regcache_cache_bypass(max9860->regmap, false);
|
||||
|
||||
ret = regmap_read(max9860->regmap, MAX9860_INTRSTATUS, &intr);
|
||||
if (ret) {
|
||||
dev_err(dev, "Failed to clear INTRSTATUS: %d\n", ret);
|
||||
goto err_regulator;
|
||||
}
|
||||
|
||||
pm_runtime_set_active(dev);
|
||||
pm_runtime_enable(dev);
|
||||
pm_runtime_idle(dev);
|
||||
|
||||
ret = snd_soc_register_codec(dev, &max9860_codec_driver,
|
||||
&max9860_dai, 1);
|
||||
if (ret) {
|
||||
dev_err(dev, "Failed to register CODEC: %d\n", ret);
|
||||
goto err_pm;
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
||||
err_pm:
|
||||
pm_runtime_disable(dev);
|
||||
err_regulator:
|
||||
regulator_disable(max9860->dvddio);
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int max9860_remove(struct i2c_client *i2c)
|
||||
{
|
||||
struct device *dev = &i2c->dev;
|
||||
struct max9860_priv *max9860 = dev_get_drvdata(dev);
|
||||
|
||||
snd_soc_unregister_codec(dev);
|
||||
pm_runtime_disable(dev);
|
||||
regulator_disable(max9860->dvddio);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct i2c_device_id max9860_i2c_id[] = {
|
||||
{ "max9860", },
|
||||
{ }
|
||||
};
|
||||
MODULE_DEVICE_TABLE(i2c, max9860_i2c_id);
|
||||
|
||||
static const struct of_device_id max9860_of_match[] = {
|
||||
{ .compatible = "maxim,max9860", },
|
||||
{ }
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, max9860_of_match);
|
||||
|
||||
static struct i2c_driver max9860_i2c_driver = {
|
||||
.probe = max9860_probe,
|
||||
.remove = max9860_remove,
|
||||
.id_table = max9860_i2c_id,
|
||||
.driver = {
|
||||
.name = "max9860",
|
||||
.of_match_table = max9860_of_match,
|
||||
.pm = &max9860_pm_ops,
|
||||
},
|
||||
};
|
||||
|
||||
module_i2c_driver(max9860_i2c_driver);
|
||||
|
||||
MODULE_DESCRIPTION("ASoC MAX9860 Mono Audio Voice Codec driver");
|
||||
MODULE_AUTHOR("Peter Rosin <peda@axentia.se>");
|
||||
MODULE_LICENSE("GPL v2");
|
||||
|
|
@ -0,0 +1,162 @@
|
|||
/*
|
||||
* Driver for the MAX9860 Mono Audio Voice Codec
|
||||
*
|
||||
* Author: Peter Rosin <peda@axentia.s>
|
||||
* Copyright 2016 Axentia Technologies
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* version 2 as published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but
|
||||
* WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
* General Public License for more details.
|
||||
*/
|
||||
|
||||
#ifndef _SND_SOC_MAX9860
|
||||
#define _SND_SOC_MAX9860
|
||||
|
||||
#define MAX9860_INTRSTATUS 0x00
|
||||
#define MAX9860_MICREADBACK 0x01
|
||||
#define MAX9860_INTEN 0x02
|
||||
#define MAX9860_SYSCLK 0x03
|
||||
#define MAX9860_AUDIOCLKHIGH 0x04
|
||||
#define MAX9860_AUDIOCLKLOW 0x05
|
||||
#define MAX9860_IFC1A 0x06
|
||||
#define MAX9860_IFC1B 0x07
|
||||
#define MAX9860_VOICEFLTR 0x08
|
||||
#define MAX9860_DACATTN 0x09
|
||||
#define MAX9860_ADCLEVEL 0x0a
|
||||
#define MAX9860_DACGAIN 0x0b
|
||||
#define MAX9860_MICGAIN 0x0c
|
||||
#define MAX9860_RESERVED 0x0d
|
||||
#define MAX9860_MICADC 0x0e
|
||||
#define MAX9860_NOISEGATE 0x0f
|
||||
#define MAX9860_PWRMAN 0x10
|
||||
#define MAX9860_REVISION 0xff
|
||||
|
||||
#define MAX9860_MAX_REGISTER 0xff
|
||||
|
||||
/* INTRSTATUS */
|
||||
#define MAX9860_CLD 0x80
|
||||
#define MAX9860_SLD 0x40
|
||||
#define MAX9860_ULK 0x20
|
||||
|
||||
/* MICREADBACK */
|
||||
#define MAX9860_NG 0xe0
|
||||
#define MAX9860_AGC 0x1f
|
||||
|
||||
/* INTEN */
|
||||
#define MAX9860_ICLD 0x80
|
||||
#define MAX9860_ISLD 0x40
|
||||
#define MAX9860_IULK 0x20
|
||||
|
||||
/* SYSCLK */
|
||||
#define MAX9860_PSCLK 0x30
|
||||
#define MAX9860_PSCLK_OFF 0x00
|
||||
#define MAX9860_PSCLK_SHIFT 4
|
||||
#define MAX9860_FREQ 0x06
|
||||
#define MAX9860_FREQ_NORMAL 0x00
|
||||
#define MAX9860_FREQ_12MHZ 0x02
|
||||
#define MAX9860_FREQ_13MHZ 0x04
|
||||
#define MAX9860_FREQ_19_2MHZ 0x06
|
||||
#define MAX9860_16KHZ 0x01
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/* AUDIOCLKHIGH */
|
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#define MAX9860_PLL 0x80
|
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#define MAX9860_NHI 0x7f
|
||||
|
||||
/* AUDIOCLKLOW */
|
||||
#define MAX9860_NLO 0xff
|
||||
|
||||
/* IFC1A */
|
||||
#define MAX9860_MASTER 0x80
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#define MAX9860_WCI 0x40
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#define MAX9860_DBCI 0x20
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#define MAX9860_DDLY 0x10
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#define MAX9860_HIZ 0x08
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#define MAX9860_TDM 0x04
|
||||
|
||||
/* IFC1B */
|
||||
#define MAX9860_ABCI 0x20
|
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#define MAX9860_ADLY 0x10
|
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#define MAX9860_ST 0x08
|
||||
#define MAX9860_BSEL 0x07
|
||||
#define MAX9860_BSEL_OFF 0x00
|
||||
#define MAX9860_BSEL_64X 0x01
|
||||
#define MAX9860_BSEL_48X 0x02
|
||||
#define MAX9860_BSEL_PCLK_2 0x04
|
||||
#define MAX9860_BSEL_PCLK_4 0x05
|
||||
#define MAX9860_BSEL_PCLK_8 0x06
|
||||
#define MAX9860_BSEL_PCLK_16 0x07
|
||||
|
||||
/* VOICEFLTR */
|
||||
#define MAX9860_AVFLT 0xf0
|
||||
#define MAX9860_AVFLT_SHIFT 4
|
||||
#define MAX9860_AVFLT_COUNT 6
|
||||
#define MAX9860_DVFLT 0x0f
|
||||
#define MAX9860_DVFLT_SHIFT 0
|
||||
#define MAX9860_DVFLT_COUNT 6
|
||||
|
||||
/* DACATTN */
|
||||
#define MAX9860_DVA 0xfe
|
||||
#define MAX9860_DVA_SHIFT 1
|
||||
#define MAX9860_DVA_MUTE 0x5e
|
||||
|
||||
/* ADCLEVEL */
|
||||
#define MAX9860_ADCRL 0xf0
|
||||
#define MAX9860_ADCRL_SHIFT 4
|
||||
#define MAX9860_ADCLL 0x0f
|
||||
#define MAX9860_ADCLL_SHIFT 0
|
||||
#define MAX9860_ADCxL_MIN 15
|
||||
|
||||
/* DACGAIN */
|
||||
#define MAX9860_DVG 0x60
|
||||
#define MAX9860_DVG_SHIFT 5
|
||||
#define MAX9860_DVG_MAX 3
|
||||
#define MAX9860_DVST 0x1f
|
||||
#define MAX9860_DVST_SHIFT 0
|
||||
#define MAX9860_DVST_MIN 31
|
||||
|
||||
/* MICGAIN */
|
||||
#define MAX9860_PAM 0x60
|
||||
#define MAX9860_PAM_SHIFT 5
|
||||
#define MAX9860_PAM_MAX 3
|
||||
#define MAX9860_PGAM 0x1f
|
||||
#define MAX9860_PGAM_SHIFT 0
|
||||
#define MAX9860_PGAM_MIN 20
|
||||
|
||||
/* MICADC */
|
||||
#define MAX9860_AGCSRC 0x80
|
||||
#define MAX9860_AGCSRC_SHIFT 7
|
||||
#define MAX9860_AGCSRC_COUNT 2
|
||||
#define MAX9860_AGCRLS 0x70
|
||||
#define MAX9860_AGCRLS_SHIFT 4
|
||||
#define MAX9860_AGCRLS_COUNT 8
|
||||
#define MAX9860_AGCATK 0x0c
|
||||
#define MAX9860_AGCATK_SHIFT 2
|
||||
#define MAX9860_AGCATK_COUNT 4
|
||||
#define MAX9860_AGCHLD 0x03
|
||||
#define MAX9860_AGCHLD_OFF 0x00
|
||||
#define MAX9860_AGCHLD_SHIFT 0
|
||||
#define MAX9860_AGCHLD_COUNT 4
|
||||
|
||||
/* NOISEGATE */
|
||||
#define MAX9860_ANTH 0xf0
|
||||
#define MAX9860_ANTH_SHIFT 4
|
||||
#define MAX9860_ANTH_MAX 15
|
||||
#define MAX9860_AGCTH 0x0f
|
||||
#define MAX9860_AGCTH_SHIFT 0
|
||||
#define MAX9860_AGCTH_MIN 15
|
||||
|
||||
/* PWRMAN */
|
||||
#define MAX9860_SHDN 0x80
|
||||
#define MAX9860_DACEN 0x08
|
||||
#define MAX9860_DACEN_SHIFT 3
|
||||
#define MAX9860_ADCLEN 0x02
|
||||
#define MAX9860_ADCLEN_SHIFT 1
|
||||
#define MAX9860_ADCREN 0x01
|
||||
#define MAX9860_ADCREN_SHIFT 0
|
||||
|
||||
#endif /* _SND_SOC_MAX9860 */
|
||||
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