STi DT updates for v4.2, round 1.
Highlights: ----------- - Add DT nodes for SSC on STiH407 family - Add DT nodes for SD/MMC on STiH407 & STiH418 - Add DT node for LPC on STiH407 - Add Sata DT nodes for STiH407 - Fix PIO3 & PIO35 pins retiming on STiH407 -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJVQjPFAAoJEMo4jShGhw+JdX0P/AmZ8/+UhflYisudIVvCH1Ok QPUno7423gjgwGNIyOI8E2ueQA80FJohpabeIRSIzMz/rQsWsCFMsc/f5rr7CKdj rFx11I9t7xabYZxgEzbfzJMXEKP1ZndBbt3p76no/ynSo515Y8t+mxsTxW8maqCZ 8l8Cr8eSp292foZujs74O6xno77NXZvf/O9zvLNcTrUOT8RBzKMyQ9L0gcMz8FKT GZB2CVDMHgUBnaQdaPKOa3adJ2IOzQcJjDhGIisLwF2Mv5Li3YPjI41t/b5g591Q Jvf5NZmz0v0cSZltfZsSuulYUeXBizzHLWMM+viRharsZf2UahiFilr8uyXtnBJI QgkCbWlaDmz+YEzJQaHy359eDw4NjGNE54AcjSE+sNImu0N4s0WUPdaXt5DQADvq Xi4KlMGfkiwpt9Lm8PoM4vY8NoNeGH0CRKdUQQhBkYn3De4VW/G0N+NOgOsTsEyQ hLqGvJnnmps3gMn/m+XSBMVNVZEwDmxMFt4hzNCwaDn0NKhzxxYrbQNK0sdbf8tR H8yWpQLtO+pVoSTrvOPqHWiGcfe+vHmynVmVHQj17/w7ho3JW0cTgXHmgSNZahnW omluWSFi5CswNYG/So6vsThXemp+omsCOUMCfaPoFz/6pE+kTsYvw245JvgtrD4w DcWnjE7MQ8NQc8lK9YX7 =fWhS -----END PGP SIGNATURE----- Merge tag 'sti-dt-for-v4.2-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mcoquelin/sti into next/dt Pull "STi DT updates for v4.2, round 1." from Maxime Coquelin: Highlights: ----------- - Add DT nodes for SSC on STiH407 family - Add DT nodes for SD/MMC on STiH407 & STiH418 - Add DT node for LPC on STiH407 - Add Sata DT nodes for STiH407 - Fix PIO3 & PIO35 pins retiming on STiH407 * tag 'sti-dt-for-v4.2-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mcoquelin/sti: ARM: DT: STi: STiH407: Add sata DT nodes. ARM: STi: DT: STiH407: Fix retime pin mask for PIO5 and PIO35 ARM: STi: DT: STiH407: Add Device Tree node for the LPC mfd: dt-bindings: Provide human readable defines for LPC mode choosing ARM: STi: DT: STiH418: Add dt nodes for sdhci and emmc. ARM: STi: DT: STiH407: Add dt nodes for sdhci and emmc. ARM: sti: Provide DT nodes for SBC SSC[0..2] ARM: sti: Provide DT nodes for SSC[0..4]
This commit is contained in:
Arnd Bergmann
Коммит
3b2cd4d08a
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@ -7,6 +7,8 @@
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* publishhed by the Free Software Foundation.
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*/
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#include "stih407-pinctrl.dtsi"
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#include <dt-bindings/mfd/st-lpc.h>
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#include <dt-bindings/phy/phy.h>
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#include <dt-bindings/reset-controller/stih407-resets.h>
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/ {
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#address-cells = <1>;
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@ -336,5 +338,183 @@
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resets = <&softreset STIH407_MIPHY2_SOFTRESET>;
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};
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};
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spi@9840000 {
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compatible = "st,comms-ssc4-spi";
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reg = <0x9840000 0x110>;
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interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>;
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clock-names = "ssc";
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pinctrl-0 = <&pinctrl_spi0_default>;
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pinctrl-names = "default";
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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spi@9841000 {
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compatible = "st,comms-ssc4-spi";
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reg = <0x9841000 0x110>;
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interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>;
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clock-names = "ssc";
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status = "disabled";
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};
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spi@9842000 {
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compatible = "st,comms-ssc4-spi";
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reg = <0x9842000 0x110>;
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interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>;
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clock-names = "ssc";
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status = "disabled";
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};
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spi@9843000 {
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compatible = "st,comms-ssc4-spi";
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reg = <0x9843000 0x110>;
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interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>;
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clock-names = "ssc";
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status = "disabled";
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};
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spi@9844000 {
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compatible = "st,comms-ssc4-spi";
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reg = <0x9844000 0x110>;
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interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clk_s_c0_flexgen CLK_EXT2F_A9>;
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clock-names = "ssc";
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status = "disabled";
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};
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/* SBC SSC */
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spi@9540000 {
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compatible = "st,comms-ssc4-spi";
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reg = <0x9540000 0x110>;
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interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clk_sysin>;
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clock-names = "ssc";
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status = "disabled";
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};
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spi@9541000 {
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compatible = "st,comms-ssc4-spi";
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reg = <0x9541000 0x110>;
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interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clk_sysin>;
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clock-names = "ssc";
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status = "disabled";
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};
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spi@9542000 {
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compatible = "st,comms-ssc4-spi";
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reg = <0x9542000 0x110>;
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interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clk_sysin>;
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clock-names = "ssc";
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status = "disabled";
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};
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mmc0: sdhci@09060000 {
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compatible = "st,sdhci-stih407", "st,sdhci";
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status = "disabled";
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reg = <0x09060000 0x7ff>, <0x9061008 0x20>;
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reg-names = "mmc", "top-mmc-delay";
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interrupts = <GIC_SPI 92 IRQ_TYPE_NONE>;
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interrupt-names = "mmcirq";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_mmc0>;
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clock-names = "mmc";
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clocks = <&clk_s_c0_flexgen CLK_MMC_0>;
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bus-width = <8>;
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non-removable;
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};
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mmc1: sdhci@09080000 {
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compatible = "st,sdhci-stih407", "st,sdhci";
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status = "disabled";
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reg = <0x09080000 0x7ff>;
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reg-names = "mmc";
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interrupts = <GIC_SPI 90 IRQ_TYPE_NONE>;
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interrupt-names = "mmcirq";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_sd1>;
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clock-names = "mmc";
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clocks = <&clk_s_c0_flexgen CLK_MMC_1>;
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resets = <&softreset STIH407_MMC1_SOFTRESET>;
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bus-width = <4>;
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};
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/* Watchdog and Real-Time Clock */
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lpc@8787000 {
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compatible = "st,stih407-lpc";
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reg = <0x8787000 0x1000>;
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interrupts = <GIC_SPI 129 IRQ_TYPE_EDGE_RISING>;
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clocks = <&clk_s_d3_flexgen CLK_LPC_0>;
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timeout-sec = <120>;
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st,syscfg = <&syscfg_core>;
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st,lpc-mode = <ST_LPC_MODE_WDT>;
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};
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lpc@8788000 {
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compatible = "st,stih407-lpc";
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reg = <0x8788000 0x1000>;
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interrupts = <GIC_SPI 130 IRQ_TYPE_EDGE_RISING>;
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clocks = <&clk_s_d3_flexgen CLK_LPC_1>;
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st,lpc-mode = <ST_LPC_MODE_RTC>;
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};
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sata0: sata@9b20000 {
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compatible = "st,ahci";
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reg = <0x9b20000 0x1000>;
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interrupts = <GIC_SPI 159 IRQ_TYPE_NONE>;
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interrupt-names = "hostc";
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phys = <&phy_port0 PHY_TYPE_SATA>;
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phy-names = "ahci_phy";
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resets = <&powerdown STIH407_SATA0_POWERDOWN>,
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<&softreset STIH407_SATA0_SOFTRESET>,
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<&softreset STIH407_SATA0_PWR_SOFTRESET>;
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reset-names = "pwr-dwn", "sw-rst", "pwr-rst";
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clock-names = "ahci_clk";
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clocks = <&clk_s_c0_flexgen CLK_ICN_REG>;
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status = "disabled";
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};
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sata1: sata@9b28000 {
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compatible = "st,ahci";
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reg = <0x9b28000 0x1000>;
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interrupts = <GIC_SPI 170 IRQ_TYPE_NONE>;
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interrupt-names = "hostc";
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phys = <&phy_port1 PHY_TYPE_SATA>;
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phy-names = "ahci_phy";
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resets = <&powerdown STIH407_SATA1_POWERDOWN>,
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<&softreset STIH407_SATA1_SOFTRESET>,
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<&softreset STIH407_SATA1_PWR_SOFTRESET>;
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reset-names = "pwr-dwn",
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"sw-rst",
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"pwr-rst";
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clock-names = "ahci_clk";
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clocks = <&clk_s_c0_flexgen CLK_ICN_REG>;
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status = "disabled";
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};
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};
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};
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@ -104,6 +104,7 @@
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#interrupt-cells = <2>;
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reg = <0x5000 0x100>;
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st,bank-name = "PIO5";
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st,retime-pin-mask = <0x3f>;
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};
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rc {
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#interrupt-cells = <2>;
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reg = <0x5000 0x100>;
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st,bank-name = "PIO35";
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st,retime-pin-mask = <0x7f>;
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};
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i2c4 {
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aliases {
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ttyAS0 = &sbc_serial0;
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};
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soc {
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mmc0: sdhci@09060000 {
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max-frequency = <200000000>;
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sd-uhs-sdr50;
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sd-uhs-sdr104;
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sd-uhs-ddr50;
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};
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};
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};
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st,i2c-min-scl-pulse-width-us = <0>;
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st,i2c-min-sda-pulse-width-us = <5>;
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};
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mmc1: sdhci@09080000 {
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status = "okay";
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};
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mmc0: sdhci@09060000 {
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status = "okay";
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max-frequency = <200000000>;
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sd-uhs-sdr50;
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sd-uhs-sdr104;
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sd-uhs-ddr50;
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};
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};
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};
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status = "okay";
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};
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mmc0: sdhci@09060000 {
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status = "okay";
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};
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mmc1: sdhci@09080000 {
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status = "okay";
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};
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/* SSC11 to HDMI */
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hdmiddc: i2c@9541000 {
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status = "okay";
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@ -0,0 +1,15 @@
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/*
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* This header provides shared DT/Driver defines for ST's LPC device
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*
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* Copyright (C) 2014 STMicroelectronics -- All Rights Reserved
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*
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* Author: Lee Jones <lee.jones@linaro.org> for STMicroelectronics
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*/
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#ifndef __DT_BINDINGS_ST_LPC_H__
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#define __DT_BINDINGS_ST_LPC_H__
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#define ST_LPC_MODE_RTC 0
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#define ST_LPC_MODE_WDT 1
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#endif /* __DT_BINDINGS_ST_LPC_H__ */
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