[AVR32] Clean up cpu identification and add features bitmap
Clean up the cpu identification code, using definitions from <asm/sysreg.h> instead of hardcoded constants. Also, add a features bitmap to struct avr32_cpuinfo to allow other code to make decisions based upon what the running cpu is actually capable of. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
This commit is contained in:
Родитель
535c806c26
Коммит
3b328c9809
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@ -209,16 +209,17 @@ static const char *mmu_types[] = {
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void __init setup_processor(void)
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{
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unsigned long config0, config1;
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unsigned long features;
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unsigned cpu_id, cpu_rev, arch_id, arch_rev, mmu_type;
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unsigned tmp;
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config0 = sysreg_read(CONFIG0); /* 0x0000013e; */
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config1 = sysreg_read(CONFIG1); /* 0x01f689a2; */
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cpu_id = config0 >> 24;
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cpu_rev = (config0 >> 16) & 0xff;
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arch_id = (config0 >> 13) & 0x07;
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arch_rev = (config0 >> 10) & 0x07;
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mmu_type = (config0 >> 7) & 0x03;
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config0 = sysreg_read(CONFIG0);
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config1 = sysreg_read(CONFIG1);
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cpu_id = SYSREG_BFEXT(PROCESSORID, config0);
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cpu_rev = SYSREG_BFEXT(PROCESSORREVISION, config0);
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arch_id = SYSREG_BFEXT(AT, config0);
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arch_rev = SYSREG_BFEXT(AR, config0);
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mmu_type = SYSREG_BFEXT(MMUT, config0);
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boot_cpu_data.arch_type = arch_id;
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boot_cpu_data.cpu_type = cpu_id;
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@ -226,16 +227,16 @@ void __init setup_processor(void)
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boot_cpu_data.cpu_revision = cpu_rev;
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boot_cpu_data.tlb_config = mmu_type;
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tmp = (config1 >> 13) & 0x07;
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tmp = SYSREG_BFEXT(ILSZ, config1);
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if (tmp) {
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boot_cpu_data.icache.ways = 1 << ((config1 >> 10) & 0x07);
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boot_cpu_data.icache.sets = 1 << ((config1 >> 16) & 0x0f);
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boot_cpu_data.icache.ways = 1 << SYSREG_BFEXT(IASS, config1);
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boot_cpu_data.icache.sets = 1 << SYSREG_BFEXT(ISET, config1);
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boot_cpu_data.icache.linesz = 1 << (tmp + 1);
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}
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tmp = (config1 >> 3) & 0x07;
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tmp = SYSREG_BFEXT(DLSZ, config1);
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if (tmp) {
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boot_cpu_data.dcache.ways = 1 << (config1 & 0x07);
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boot_cpu_data.dcache.sets = 1 << ((config1 >> 6) & 0x0f);
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boot_cpu_data.dcache.ways = 1 << SYSREG_BFEXT(DASS, config1);
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boot_cpu_data.dcache.sets = 1 << SYSREG_BFEXT(DSET, config1);
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boot_cpu_data.dcache.linesz = 1 << (tmp + 1);
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}
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@ -250,16 +251,39 @@ void __init setup_processor(void)
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cpu_names[cpu_id], cpu_id, cpu_rev,
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arch_names[arch_id], arch_rev);
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printk ("CPU: MMU configuration: %s\n", mmu_types[mmu_type]);
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printk ("CPU: features:");
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if (config0 & (1 << 6))
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printk(" fpu");
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if (config0 & (1 << 5))
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printk(" java");
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if (config0 & (1 << 4))
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printk(" perfctr");
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if (config0 & (1 << 3))
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features = 0;
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if (config0 & SYSREG_BIT(CONFIG0_R)) {
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features |= AVR32_FEATURE_RMW;
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printk(" rmw");
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}
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if (config0 & SYSREG_BIT(CONFIG0_D)) {
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features |= AVR32_FEATURE_DSP;
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printk(" dsp");
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}
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if (config0 & SYSREG_BIT(CONFIG0_S)) {
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features |= AVR32_FEATURE_SIMD;
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printk(" simd");
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}
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if (config0 & SYSREG_BIT(CONFIG0_O)) {
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features |= AVR32_FEATURE_OCD;
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printk(" ocd");
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}
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if (config0 & SYSREG_BIT(CONFIG0_P)) {
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features |= AVR32_FEATURE_PCTR;
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printk(" perfctr");
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}
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if (config0 & SYSREG_BIT(CONFIG0_J)) {
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features |= AVR32_FEATURE_JAVA;
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printk(" java");
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}
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if (config0 & SYSREG_BIT(CONFIG0_F)) {
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features |= AVR32_FEATURE_FPU;
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printk(" fpu");
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}
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printk("\n");
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boot_cpu_data.features = features;
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}
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#ifdef CONFIG_PROC_FS
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@ -40,6 +40,14 @@ enum tlb_config {
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TLB_INVALID
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};
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#define AVR32_FEATURE_RMW (1 << 0)
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#define AVR32_FEATURE_DSP (1 << 1)
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#define AVR32_FEATURE_SIMD (1 << 2)
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#define AVR32_FEATURE_OCD (1 << 3)
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#define AVR32_FEATURE_PCTR (1 << 4)
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#define AVR32_FEATURE_JAVA (1 << 5)
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#define AVR32_FEATURE_FPU (1 << 6)
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struct avr32_cpuinfo {
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struct clk *clk;
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unsigned long loops_per_jiffy;
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@ -48,6 +56,7 @@ struct avr32_cpuinfo {
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unsigned short arch_revision;
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unsigned short cpu_revision;
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enum tlb_config tlb_config;
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unsigned long features;
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struct cache_info icache;
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struct cache_info dcache;
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