drm/radeon: rework fence handling, drop fence list v7
Using 64bits fence sequence we can directly compare sequence
number to know if a fence is signaled or not. Thus the fence
list became useless, so does the fence lock that mainly
protected the fence list.
Things like ring.ready are no longer behind a lock, this should
be ok as ring.ready is initialized once and will only change
when facing lockup. Worst case is that we return an -EBUSY just
after a successfull GPU reset, or we go into wait state instead
of returning -EBUSY (thus delaying reporting -EBUSY to fence
wait caller).
v2: Remove left over comment, force using writeback on cayman and
newer, thus not having to suffer from possibly scratch reg
exhaustion
v3: Rebase on top of change to uint64 fence patch
v4: Change DCE5 test to force write back on cayman and newer but
also any APU such as PALM or SUMO family
v5: Rebase on top of new uint64 fence patch
v6: Just break if seq doesn't change any more. Use radeon_fence
prefix for all function names. Even if it's now highly optimized,
try avoiding polling to often.
v7: We should never poll the last_seq from the hardware without
waking the sleeping threads, otherwise we might lose events.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Christian König <deathsimple@vodafone.de>
Signed-off-by: Dave Airlie <airlied@redhat.com>
This commit is contained in:
Jerome Glisse
Dave Airlie
Родитель
bb63556729
Коммит
3b7a2b24ea
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@ -263,15 +263,12 @@ struct radeon_fence_driver {
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atomic64_t last_seq;
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unsigned long last_activity;
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wait_queue_head_t queue;
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struct list_head emitted;
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struct list_head signaled;
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bool initialized;
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};
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struct radeon_fence {
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struct radeon_device *rdev;
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struct kref kref;
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struct list_head list;
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/* protected by radeon_fence.lock */
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uint64_t seq;
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/* RB, DMA, etc. */
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@ -291,7 +288,7 @@ int radeon_fence_wait_next(struct radeon_device *rdev, int ring);
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int radeon_fence_wait_empty(struct radeon_device *rdev, int ring);
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struct radeon_fence *radeon_fence_ref(struct radeon_fence *fence);
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void radeon_fence_unref(struct radeon_fence **fence);
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int radeon_fence_count_emitted(struct radeon_device *rdev, int ring);
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unsigned radeon_fence_count_emitted(struct radeon_device *rdev, int ring);
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/*
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* Tiling registers
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@ -1534,7 +1531,6 @@ struct radeon_device {
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struct radeon_mode_info mode_info;
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struct radeon_scratch scratch;
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struct radeon_mman mman;
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rwlock_t fence_lock;
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struct radeon_fence_driver fence_drv[RADEON_NUM_RINGS];
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struct radeon_semaphore_driver semaphore_drv;
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struct mutex ring_lock;
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@ -225,9 +225,9 @@ int radeon_wb_init(struct radeon_device *rdev)
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/* disable event_write fences */
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rdev->wb.use_event = false;
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/* disabled via module param */
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if (radeon_no_wb == 1)
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if (radeon_no_wb == 1) {
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rdev->wb.enabled = false;
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else {
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} else {
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if (rdev->flags & RADEON_IS_AGP) {
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/* often unreliable on AGP */
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rdev->wb.enabled = false;
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@ -237,8 +237,9 @@ int radeon_wb_init(struct radeon_device *rdev)
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} else {
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rdev->wb.enabled = true;
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/* event_write fences are only available on r600+ */
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if (rdev->family >= CHIP_R600)
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if (rdev->family >= CHIP_R600) {
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rdev->wb.use_event = true;
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}
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}
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}
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/* always use writeback/events on NI, APUs */
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@ -731,7 +732,6 @@ int radeon_device_init(struct radeon_device *rdev,
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mutex_init(&rdev->gem.mutex);
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mutex_init(&rdev->pm.mutex);
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mutex_init(&rdev->vram_mutex);
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rwlock_init(&rdev->fence_lock);
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rwlock_init(&rdev->semaphore_drv.lock);
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INIT_LIST_HEAD(&rdev->gem.objects);
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init_waitqueue_head(&rdev->irq.vblank_queue);
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@ -63,30 +63,18 @@ static u32 radeon_fence_read(struct radeon_device *rdev, int ring)
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int radeon_fence_emit(struct radeon_device *rdev, struct radeon_fence *fence)
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{
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unsigned long irq_flags;
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write_lock_irqsave(&rdev->fence_lock, irq_flags);
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/* we are protected by the ring emission mutex */
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if (fence->seq && fence->seq < RADEON_FENCE_NOTEMITED_SEQ) {
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write_unlock_irqrestore(&rdev->fence_lock, irq_flags);
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return 0;
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}
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/* we are protected by the ring emission mutex */
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fence->seq = ++rdev->fence_drv[fence->ring].seq;
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radeon_fence_ring_emit(rdev, fence->ring, fence);
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trace_radeon_fence_emit(rdev->ddev, fence->seq);
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/* are we the first fence on a previusly idle ring? */
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if (list_empty(&rdev->fence_drv[fence->ring].emitted)) {
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rdev->fence_drv[fence->ring].last_activity = jiffies;
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}
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list_move_tail(&fence->list, &rdev->fence_drv[fence->ring].emitted);
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write_unlock_irqrestore(&rdev->fence_lock, irq_flags);
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return 0;
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}
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static bool radeon_fence_poll_locked(struct radeon_device *rdev, int ring)
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void radeon_fence_process(struct radeon_device *rdev, int ring)
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{
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struct radeon_fence *fence;
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struct list_head *i, *n;
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uint64_t seq, last_seq;
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unsigned count_loop = 0;
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bool wake = false;
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@ -120,14 +108,15 @@ static bool radeon_fence_poll_locked(struct radeon_device *rdev, int ring)
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seq += 0x100000000LL;
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}
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if (!wake && seq == last_seq) {
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return false;
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if (seq == last_seq) {
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break;
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}
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/* If we loop over we don't want to return without
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* checking if a fence is signaled as it means that the
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* seq we just read is different from the previous on.
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*/
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wake = true;
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last_seq = seq;
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if ((count_loop++) > 10) {
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/* We looped over too many time leave with the
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* fact that we might have set an older fence
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@ -136,46 +125,20 @@ static bool radeon_fence_poll_locked(struct radeon_device *rdev, int ring)
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*/
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break;
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}
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last_seq = seq;
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} while (atomic64_xchg(&rdev->fence_drv[ring].last_seq, seq) > seq);
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/* reset wake to false */
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wake = false;
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rdev->fence_drv[ring].last_activity = jiffies;
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n = NULL;
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list_for_each(i, &rdev->fence_drv[ring].emitted) {
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fence = list_entry(i, struct radeon_fence, list);
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if (fence->seq == seq) {
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n = i;
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break;
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}
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if (wake) {
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rdev->fence_drv[ring].last_activity = jiffies;
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wake_up_all(&rdev->fence_drv[ring].queue);
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}
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/* all fence previous to this one are considered as signaled */
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if (n) {
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i = n;
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do {
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n = i->prev;
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list_move_tail(i, &rdev->fence_drv[ring].signaled);
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fence = list_entry(i, struct radeon_fence, list);
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fence->seq = RADEON_FENCE_SIGNALED_SEQ;
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i = n;
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} while (i != &rdev->fence_drv[ring].emitted);
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wake = true;
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}
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return wake;
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}
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static void radeon_fence_destroy(struct kref *kref)
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{
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unsigned long irq_flags;
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struct radeon_fence *fence;
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struct radeon_fence *fence;
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fence = container_of(kref, struct radeon_fence, kref);
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write_lock_irqsave(&fence->rdev->fence_lock, irq_flags);
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list_del(&fence->list);
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fence->seq = RADEON_FENCE_NOTEMITED_SEQ;
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write_unlock_irqrestore(&fence->rdev->fence_lock, irq_flags);
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if (fence->semaphore)
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radeon_semaphore_free(fence->rdev, fence->semaphore);
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kfree(fence);
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@ -194,80 +157,82 @@ int radeon_fence_create(struct radeon_device *rdev,
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(*fence)->seq = RADEON_FENCE_NOTEMITED_SEQ;
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(*fence)->ring = ring;
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(*fence)->semaphore = NULL;
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INIT_LIST_HEAD(&(*fence)->list);
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return 0;
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}
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static bool radeon_fence_seq_signaled(struct radeon_device *rdev,
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u64 seq, unsigned ring)
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{
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if (atomic64_read(&rdev->fence_drv[ring].last_seq) >= seq) {
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return true;
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}
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/* poll new last sequence at least once */
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radeon_fence_process(rdev, ring);
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if (atomic64_read(&rdev->fence_drv[ring].last_seq) >= seq) {
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return true;
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}
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return false;
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}
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bool radeon_fence_signaled(struct radeon_fence *fence)
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{
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unsigned long irq_flags;
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bool signaled = false;
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if (!fence)
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if (!fence) {
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return true;
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write_lock_irqsave(&fence->rdev->fence_lock, irq_flags);
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signaled = (fence->seq == RADEON_FENCE_SIGNALED_SEQ);
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/* if we are shuting down report all fence as signaled */
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if (fence->rdev->shutdown) {
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signaled = true;
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}
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if (fence->seq == RADEON_FENCE_NOTEMITED_SEQ) {
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WARN(1, "Querying an unemitted fence : %p !\n", fence);
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signaled = true;
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return true;
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}
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if (!signaled) {
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radeon_fence_poll_locked(fence->rdev, fence->ring);
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signaled = (fence->seq == RADEON_FENCE_SIGNALED_SEQ);
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if (fence->seq == RADEON_FENCE_SIGNALED_SEQ) {
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return true;
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}
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write_unlock_irqrestore(&fence->rdev->fence_lock, irq_flags);
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return signaled;
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if (radeon_fence_seq_signaled(fence->rdev, fence->seq, fence->ring)) {
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fence->seq = RADEON_FENCE_SIGNALED_SEQ;
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return true;
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}
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return false;
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}
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int radeon_fence_wait(struct radeon_fence *fence, bool intr)
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static int radeon_fence_wait_seq(struct radeon_device *rdev, u64 target_seq,
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unsigned ring, bool intr)
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{
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struct radeon_device *rdev;
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unsigned long irq_flags, timeout, last_activity;
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unsigned long timeout, last_activity;
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uint64_t seq;
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int i, r;
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unsigned i;
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bool signaled;
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int r;
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if (fence == NULL) {
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WARN(1, "Querying an invalid fence : %p !\n", fence);
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return -EINVAL;
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}
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while (target_seq > atomic64_read(&rdev->fence_drv[ring].last_seq)) {
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if (!rdev->ring[ring].ready) {
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return -EBUSY;
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}
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rdev = fence->rdev;
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signaled = radeon_fence_signaled(fence);
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while (!signaled) {
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read_lock_irqsave(&rdev->fence_lock, irq_flags);
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timeout = jiffies - RADEON_FENCE_JIFFIES_TIMEOUT;
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if (time_after(rdev->fence_drv[fence->ring].last_activity, timeout)) {
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if (time_after(rdev->fence_drv[ring].last_activity, timeout)) {
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/* the normal case, timeout is somewhere before last_activity */
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timeout = rdev->fence_drv[fence->ring].last_activity - timeout;
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timeout = rdev->fence_drv[ring].last_activity - timeout;
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} else {
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/* either jiffies wrapped around, or no fence was signaled in the last 500ms
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* anyway we will just wait for the minimum amount and then check for a lockup */
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* anyway we will just wait for the minimum amount and then check for a lockup
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*/
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timeout = 1;
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}
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/* save current sequence value used to check for GPU lockups */
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seq = atomic64_read(&rdev->fence_drv[fence->ring].last_seq);
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seq = atomic64_read(&rdev->fence_drv[ring].last_seq);
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/* Save current last activity valuee, used to check for GPU lockups */
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last_activity = rdev->fence_drv[fence->ring].last_activity;
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read_unlock_irqrestore(&rdev->fence_lock, irq_flags);
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last_activity = rdev->fence_drv[ring].last_activity;
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trace_radeon_fence_wait_begin(rdev->ddev, seq);
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radeon_irq_kms_sw_irq_get(rdev, fence->ring);
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radeon_irq_kms_sw_irq_get(rdev, ring);
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if (intr) {
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r = wait_event_interruptible_timeout(
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rdev->fence_drv[fence->ring].queue,
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(signaled = radeon_fence_signaled(fence)), timeout);
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} else {
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r = wait_event_timeout(
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rdev->fence_drv[fence->ring].queue,
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(signaled = radeon_fence_signaled(fence)), timeout);
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r = wait_event_interruptible_timeout(rdev->fence_drv[ring].queue,
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(signaled = radeon_fence_seq_signaled(rdev, target_seq, ring)),
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timeout);
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} else {
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r = wait_event_timeout(rdev->fence_drv[ring].queue,
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(signaled = radeon_fence_seq_signaled(rdev, target_seq, ring)),
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timeout);
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}
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radeon_irq_kms_sw_irq_put(rdev, fence->ring);
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radeon_irq_kms_sw_irq_put(rdev, ring);
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if (unlikely(r < 0)) {
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return r;
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}
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@ -280,19 +245,24 @@ int radeon_fence_wait(struct radeon_fence *fence, bool intr)
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continue;
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}
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write_lock_irqsave(&rdev->fence_lock, irq_flags);
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/* check if sequence value has changed since last_activity */
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if (seq != atomic64_read(&rdev->fence_drv[ring].last_seq)) {
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continue;
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}
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/* test if somebody else has already decided that this is a lockup */
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if (last_activity != rdev->fence_drv[fence->ring].last_activity) {
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write_unlock_irqrestore(&rdev->fence_lock, irq_flags);
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if (last_activity != rdev->fence_drv[ring].last_activity) {
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continue;
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}
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write_unlock_irqrestore(&rdev->fence_lock, irq_flags);
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if (radeon_ring_is_lockup(rdev, fence->ring, &rdev->ring[fence->ring])) {
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if (radeon_ring_is_lockup(rdev, ring, &rdev->ring[ring])) {
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/* good news we believe it's a lockup */
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dev_warn(rdev->dev, "GPU lockup (waiting for 0x%016llx last fence id 0x%016llx)\n",
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fence->seq, seq);
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target_seq, seq);
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/* change last activity so nobody else think there is a lockup */
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for (i = 0; i < RADEON_NUM_RINGS; ++i) {
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rdev->fence_drv[i].last_activity = jiffies;
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}
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/* change last activity so nobody else think there is a lockup */
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for (i = 0; i < RADEON_NUM_RINGS; ++i) {
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@ -300,7 +270,7 @@ int radeon_fence_wait(struct radeon_fence *fence, bool intr)
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}
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/* mark the ring as not ready any more */
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rdev->ring[fence->ring].ready = false;
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rdev->ring[ring].ready = false;
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return -EDEADLK;
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}
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}
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@ -308,52 +278,47 @@ int radeon_fence_wait(struct radeon_fence *fence, bool intr)
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return 0;
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}
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int radeon_fence_wait_next(struct radeon_device *rdev, int ring)
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int radeon_fence_wait(struct radeon_fence *fence, bool intr)
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{
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unsigned long irq_flags;
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struct radeon_fence *fence;
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int r;
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write_lock_irqsave(&rdev->fence_lock, irq_flags);
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if (!rdev->ring[ring].ready) {
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write_unlock_irqrestore(&rdev->fence_lock, irq_flags);
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return -EBUSY;
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if (fence == NULL) {
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WARN(1, "Querying an invalid fence : %p !\n", fence);
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return -EINVAL;
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}
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if (list_empty(&rdev->fence_drv[ring].emitted)) {
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write_unlock_irqrestore(&rdev->fence_lock, irq_flags);
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return -ENOENT;
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r = radeon_fence_wait_seq(fence->rdev, fence->seq, fence->ring, intr);
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if (r) {
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return r;
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}
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fence = list_entry(rdev->fence_drv[ring].emitted.next,
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struct radeon_fence, list);
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radeon_fence_ref(fence);
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write_unlock_irqrestore(&rdev->fence_lock, irq_flags);
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r = radeon_fence_wait(fence, false);
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radeon_fence_unref(&fence);
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return r;
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fence->seq = RADEON_FENCE_SIGNALED_SEQ;
|
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return 0;
|
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}
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||||
|
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int radeon_fence_wait_next(struct radeon_device *rdev, int ring)
|
||||
{
|
||||
uint64_t seq;
|
||||
|
||||
/* We are not protected by ring lock when reading current seq but
|
||||
* it's ok as worst case is we return to early while we could have
|
||||
* wait.
|
||||
*/
|
||||
seq = atomic64_read(&rdev->fence_drv[ring].last_seq) + 1ULL;
|
||||
if (seq >= rdev->fence_drv[ring].seq) {
|
||||
/* nothing to wait for, last_seq is already the last emited fence */
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return 0;
|
||||
}
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return radeon_fence_wait_seq(rdev, seq, ring, false);
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||||
}
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||||
|
||||
int radeon_fence_wait_empty(struct radeon_device *rdev, int ring)
|
||||
{
|
||||
unsigned long irq_flags;
|
||||
struct radeon_fence *fence;
|
||||
int r;
|
||||
|
||||
write_lock_irqsave(&rdev->fence_lock, irq_flags);
|
||||
if (!rdev->ring[ring].ready) {
|
||||
write_unlock_irqrestore(&rdev->fence_lock, irq_flags);
|
||||
return -EBUSY;
|
||||
}
|
||||
if (list_empty(&rdev->fence_drv[ring].emitted)) {
|
||||
write_unlock_irqrestore(&rdev->fence_lock, irq_flags);
|
||||
return 0;
|
||||
}
|
||||
fence = list_entry(rdev->fence_drv[ring].emitted.prev,
|
||||
struct radeon_fence, list);
|
||||
radeon_fence_ref(fence);
|
||||
write_unlock_irqrestore(&rdev->fence_lock, irq_flags);
|
||||
r = radeon_fence_wait(fence, false);
|
||||
radeon_fence_unref(&fence);
|
||||
return r;
|
||||
/* We are not protected by ring lock when reading current seq
|
||||
* but it's ok as wait empty is call from place where no more
|
||||
* activity can be scheduled so there won't be concurrent access
|
||||
* to seq value.
|
||||
*/
|
||||
return radeon_fence_wait_seq(rdev, rdev->fence_drv[ring].seq, ring, false);
|
||||
}
|
||||
|
||||
struct radeon_fence *radeon_fence_ref(struct radeon_fence *fence)
|
||||
|
|
@ -372,49 +337,27 @@ void radeon_fence_unref(struct radeon_fence **fence)
|
|||
}
|
||||
}
|
||||
|
||||
void radeon_fence_process(struct radeon_device *rdev, int ring)
|
||||
unsigned radeon_fence_count_emitted(struct radeon_device *rdev, int ring)
|
||||
{
|
||||
unsigned long irq_flags;
|
||||
bool wake;
|
||||
uint64_t emitted;
|
||||
|
||||
write_lock_irqsave(&rdev->fence_lock, irq_flags);
|
||||
wake = radeon_fence_poll_locked(rdev, ring);
|
||||
write_unlock_irqrestore(&rdev->fence_lock, irq_flags);
|
||||
if (wake) {
|
||||
wake_up_all(&rdev->fence_drv[ring].queue);
|
||||
radeon_fence_process(rdev, ring);
|
||||
/* We are not protected by ring lock when reading the last sequence
|
||||
* but it's ok to report slightly wrong fence count here.
|
||||
*/
|
||||
emitted = rdev->fence_drv[ring].seq - atomic64_read(&rdev->fence_drv[ring].last_seq);
|
||||
/* to avoid 32bits warp around */
|
||||
if (emitted > 0x10000000) {
|
||||
emitted = 0x10000000;
|
||||
}
|
||||
}
|
||||
|
||||
int radeon_fence_count_emitted(struct radeon_device *rdev, int ring)
|
||||
{
|
||||
unsigned long irq_flags;
|
||||
int not_processed = 0;
|
||||
|
||||
read_lock_irqsave(&rdev->fence_lock, irq_flags);
|
||||
if (!rdev->fence_drv[ring].initialized) {
|
||||
read_unlock_irqrestore(&rdev->fence_lock, irq_flags);
|
||||
return 0;
|
||||
}
|
||||
|
||||
if (!list_empty(&rdev->fence_drv[ring].emitted)) {
|
||||
struct list_head *ptr;
|
||||
list_for_each(ptr, &rdev->fence_drv[ring].emitted) {
|
||||
/* count up to 3, that's enought info */
|
||||
if (++not_processed >= 3)
|
||||
break;
|
||||
}
|
||||
}
|
||||
read_unlock_irqrestore(&rdev->fence_lock, irq_flags);
|
||||
return not_processed;
|
||||
return (unsigned)emitted;
|
||||
}
|
||||
|
||||
int radeon_fence_driver_start_ring(struct radeon_device *rdev, int ring)
|
||||
{
|
||||
unsigned long irq_flags;
|
||||
uint64_t index;
|
||||
int r;
|
||||
|
||||
write_lock_irqsave(&rdev->fence_lock, irq_flags);
|
||||
radeon_scratch_free(rdev, rdev->fence_drv[ring].scratch_reg);
|
||||
if (rdev->wb.use_event) {
|
||||
rdev->fence_drv[ring].scratch_reg = 0;
|
||||
|
|
@ -423,7 +366,6 @@ int radeon_fence_driver_start_ring(struct radeon_device *rdev, int ring)
|
|||
r = radeon_scratch_get(rdev, &rdev->fence_drv[ring].scratch_reg);
|
||||
if (r) {
|
||||
dev_err(rdev->dev, "fence failed to get scratch register\n");
|
||||
write_unlock_irqrestore(&rdev->fence_lock, irq_flags);
|
||||
return r;
|
||||
}
|
||||
index = RADEON_WB_SCRATCH_OFFSET +
|
||||
|
|
@ -434,9 +376,8 @@ int radeon_fence_driver_start_ring(struct radeon_device *rdev, int ring)
|
|||
rdev->fence_drv[ring].gpu_addr = rdev->wb.gpu_addr + index;
|
||||
radeon_fence_write(rdev, rdev->fence_drv[ring].seq, ring);
|
||||
rdev->fence_drv[ring].initialized = true;
|
||||
DRM_INFO("fence driver on ring %d use gpu addr 0x%016llx and cpu addr 0x%p\n",
|
||||
dev_info(rdev->dev, "fence driver on ring %d use gpu addr 0x%016llx and cpu addr 0x%p\n",
|
||||
ring, rdev->fence_drv[ring].gpu_addr, rdev->fence_drv[ring].cpu_addr);
|
||||
write_unlock_irqrestore(&rdev->fence_lock, irq_flags);
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
@ -447,22 +388,18 @@ static void radeon_fence_driver_init_ring(struct radeon_device *rdev, int ring)
|
|||
rdev->fence_drv[ring].gpu_addr = 0;
|
||||
rdev->fence_drv[ring].seq = 0;
|
||||
atomic64_set(&rdev->fence_drv[ring].last_seq, 0);
|
||||
INIT_LIST_HEAD(&rdev->fence_drv[ring].emitted);
|
||||
INIT_LIST_HEAD(&rdev->fence_drv[ring].signaled);
|
||||
rdev->fence_drv[ring].last_activity = jiffies;
|
||||
init_waitqueue_head(&rdev->fence_drv[ring].queue);
|
||||
rdev->fence_drv[ring].initialized = false;
|
||||
}
|
||||
|
||||
int radeon_fence_driver_init(struct radeon_device *rdev)
|
||||
{
|
||||
unsigned long irq_flags;
|
||||
int ring;
|
||||
|
||||
write_lock_irqsave(&rdev->fence_lock, irq_flags);
|
||||
for (ring = 0; ring < RADEON_NUM_RINGS; ring++) {
|
||||
radeon_fence_driver_init_ring(rdev, ring);
|
||||
}
|
||||
write_unlock_irqrestore(&rdev->fence_lock, irq_flags);
|
||||
if (radeon_debugfs_fence_init(rdev)) {
|
||||
dev_err(rdev->dev, "fence debugfs file creation failed\n");
|
||||
}
|
||||
|
|
@ -471,7 +408,6 @@ int radeon_fence_driver_init(struct radeon_device *rdev)
|
|||
|
||||
void radeon_fence_driver_fini(struct radeon_device *rdev)
|
||||
{
|
||||
unsigned long irq_flags;
|
||||
int ring;
|
||||
|
||||
for (ring = 0; ring < RADEON_NUM_RINGS; ring++) {
|
||||
|
|
@ -479,9 +415,7 @@ void radeon_fence_driver_fini(struct radeon_device *rdev)
|
|||
continue;
|
||||
radeon_fence_wait_empty(rdev, ring);
|
||||
wake_up_all(&rdev->fence_drv[ring].queue);
|
||||
write_lock_irqsave(&rdev->fence_lock, irq_flags);
|
||||
radeon_scratch_free(rdev, rdev->fence_drv[ring].scratch_reg);
|
||||
write_unlock_irqrestore(&rdev->fence_lock, irq_flags);
|
||||
rdev->fence_drv[ring].initialized = false;
|
||||
}
|
||||
}
|
||||
|
|
@ -496,7 +430,6 @@ static int radeon_debugfs_fence_info(struct seq_file *m, void *data)
|
|||
struct drm_info_node *node = (struct drm_info_node *)m->private;
|
||||
struct drm_device *dev = node->minor->dev;
|
||||
struct radeon_device *rdev = dev->dev_private;
|
||||
struct radeon_fence *fence;
|
||||
int i;
|
||||
|
||||
for (i = 0; i < RADEON_NUM_RINGS; ++i) {
|
||||
|
|
@ -506,12 +439,8 @@ static int radeon_debugfs_fence_info(struct seq_file *m, void *data)
|
|||
seq_printf(m, "--- ring %d ---\n", i);
|
||||
seq_printf(m, "Last signaled fence 0x%016lx\n",
|
||||
atomic64_read(&rdev->fence_drv[i].last_seq));
|
||||
if (!list_empty(&rdev->fence_drv[i].emitted)) {
|
||||
fence = list_entry(rdev->fence_drv[i].emitted.prev,
|
||||
struct radeon_fence, list);
|
||||
seq_printf(m, "Last emitted fence %p with 0x%016llx\n",
|
||||
fence, fence->seq);
|
||||
}
|
||||
seq_printf(m, "Last emitted 0x%016llx\n",
|
||||
rdev->fence_drv[i].seq);
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
|
|
|||
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