perf/x86/intel/uncore: Remove SBOX support for Broadwell server
There was a report that on certain Broadwell-EP systems writing any bit of the SBOX PMU initialization MSR would #GP at boot. This did not happen on all systems. My test systems booted fine. Considering both DE and EP may have such issues, this patch removes SBOX support for all Broadwell platforms for now. Reported-and-tested-by: Mark van Dijk <mark@voidzero.net> Signed-off-by: Kan Liang <kan.liang@intel.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Jiri Olsa <jolsa@redhat.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Stephane Eranian <eranian@google.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Vince Weaver <vincent.weaver@maine.edu> Link: http://lkml.kernel.org/r/1464347540-5763-1-git-send-email-kan.liang@intel.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
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@ -2868,27 +2868,10 @@ static struct intel_uncore_type bdx_uncore_cbox = {
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.format_group = &hswep_uncore_cbox_format_group,
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.format_group = &hswep_uncore_cbox_format_group,
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};
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};
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static struct intel_uncore_type bdx_uncore_sbox = {
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.name = "sbox",
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.num_counters = 4,
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.num_boxes = 4,
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.perf_ctr_bits = 48,
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.event_ctl = HSWEP_S0_MSR_PMON_CTL0,
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.perf_ctr = HSWEP_S0_MSR_PMON_CTR0,
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.event_mask = HSWEP_S_MSR_PMON_RAW_EVENT_MASK,
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.box_ctl = HSWEP_S0_MSR_PMON_BOX_CTL,
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.msr_offset = HSWEP_SBOX_MSR_OFFSET,
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.ops = &hswep_uncore_sbox_msr_ops,
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.format_group = &hswep_uncore_sbox_format_group,
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};
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#define BDX_MSR_UNCORE_SBOX 3
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static struct intel_uncore_type *bdx_msr_uncores[] = {
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static struct intel_uncore_type *bdx_msr_uncores[] = {
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&bdx_uncore_ubox,
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&bdx_uncore_ubox,
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&bdx_uncore_cbox,
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&bdx_uncore_cbox,
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&hswep_uncore_pcu,
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&hswep_uncore_pcu,
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&bdx_uncore_sbox,
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NULL,
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NULL,
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};
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};
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@ -2897,10 +2880,6 @@ void bdx_uncore_cpu_init(void)
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if (bdx_uncore_cbox.num_boxes > boot_cpu_data.x86_max_cores)
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if (bdx_uncore_cbox.num_boxes > boot_cpu_data.x86_max_cores)
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bdx_uncore_cbox.num_boxes = boot_cpu_data.x86_max_cores;
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bdx_uncore_cbox.num_boxes = boot_cpu_data.x86_max_cores;
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uncore_msr_uncores = bdx_msr_uncores;
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uncore_msr_uncores = bdx_msr_uncores;
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/* BDX-DE doesn't have SBOX */
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if (boot_cpu_data.x86_model == 86)
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uncore_msr_uncores[BDX_MSR_UNCORE_SBOX] = NULL;
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}
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}
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static struct intel_uncore_type bdx_uncore_ha = {
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static struct intel_uncore_type bdx_uncore_ha = {
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