dma-mapping: remove dma_is_consistent API
Architectures implement dma_is_consistent() in different ways (some misinterpret the definition of API in DMA-API.txt). So it hasn't been so useful for drivers. We have only one user of the API in tree. Unlikely out-of-tree drivers use the API. Even if we fix dma_is_consistent() in some architectures, it doesn't look useful at all. It was invented long ago for some old systems that can't allocate coherent memory at all. It's better to export only APIs that are definitely necessary for drivers. Let's remove this API. Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Cc: James Bottomley <James.Bottomley@HansenPartnership.com> Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> Cc: <linux-arch@vger.kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
This commit is contained in:
FUJITA Tomonori
Linus Torvalds
Родитель
d80e0d96a3
Коммит
3b9c6c11f5
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@ -455,12 +455,6 @@ Free memory allocated by the nonconsistent API. All parameters must
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be identical to those passed in (and returned by
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dma_alloc_noncoherent()).
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int
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dma_is_consistent(struct device *dev, dma_addr_t dma_handle)
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Returns true if the device dev is performing consistent DMA on the memory
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area pointed to by the dma_handle.
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int
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dma_get_cache_alignment(void)
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@ -41,7 +41,6 @@ static inline int dma_set_mask(struct device *dev, u64 mask)
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#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
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#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
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#define dma_is_consistent(d, h) (1)
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#define dma_cache_sync(dev, va, size, dir) ((void)0)
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@ -144,11 +144,6 @@ static inline int dma_set_mask(struct device *dev, u64 dma_mask)
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return 0;
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}
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static inline int dma_is_consistent(struct device *dev, dma_addr_t handle)
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{
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return !!arch_is_coherent();
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}
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/*
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* DMA errors are defined by all-bits-set in the DMA address.
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*/
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@ -336,9 +336,4 @@ dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
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#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
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#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
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static inline int dma_is_consistent(struct device *dev, dma_addr_t dma_addr)
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{
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return 1;
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}
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#endif /* __ASM_AVR32_DMA_MAPPING_H */
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@ -21,7 +21,6 @@ void dma_free_coherent(struct device *dev, size_t size, void *vaddr,
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#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
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#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
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#define dma_supported(d, m) (1)
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#define dma_is_consistent(d, h) (1)
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static inline int
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dma_set_mask(struct device *dev, u64 dma_mask)
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@ -152,8 +152,6 @@ dma_set_mask(struct device *dev, u64 mask)
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return 0;
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}
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#define dma_is_consistent(d, h) (1)
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static inline void
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dma_cache_sync(struct device *dev, void *vaddr, size_t size,
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enum dma_data_direction direction)
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@ -125,8 +125,6 @@ int dma_set_mask(struct device *dev, u64 mask)
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return 0;
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}
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#define dma_is_consistent(d, h) (1)
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static inline
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void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
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enum dma_data_direction direction)
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@ -97,6 +97,4 @@ dma_cache_sync (struct device *dev, void *vaddr, size_t size,
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mb();
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}
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#define dma_is_consistent(d, h) (1) /* all we do is coherent memory... */
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#endif /* _ASM_IA64_DMA_MAPPING_H */
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@ -16,11 +16,6 @@ static inline int dma_set_mask(struct device *dev, u64 mask)
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return 0;
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}
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static inline int dma_is_consistent(struct device *dev, dma_addr_t dma_addr)
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{
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return 0;
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}
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extern void *dma_alloc_coherent(struct device *, size_t,
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dma_addr_t *, gfp_t);
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extern void dma_free_coherent(struct device *, size_t,
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@ -106,7 +106,6 @@ static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
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#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
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#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
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#define dma_is_consistent(d, h) (1)
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static inline void *dma_alloc_coherent(struct device *dev, size_t size,
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dma_addr_t *dma_handle, gfp_t flag)
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@ -62,8 +62,6 @@ dma_set_mask(struct device *dev, u64 mask)
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return 0;
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}
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extern int dma_is_consistent(struct device *dev, dma_addr_t dma_addr);
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extern void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
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enum dma_data_direction direction);
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@ -357,13 +357,6 @@ int dma_supported(struct device *dev, u64 mask)
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EXPORT_SYMBOL(dma_supported);
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int dma_is_consistent(struct device *dev, dma_addr_t dma_addr)
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{
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return plat_device_is_coherent(dev);
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}
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EXPORT_SYMBOL(dma_is_consistent);
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void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
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enum dma_data_direction direction)
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{
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@ -161,8 +161,6 @@ int dma_set_mask(struct device *dev, u64 mask)
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return 0;
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}
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#define dma_is_consistent(d) (1)
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static inline
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void dma_cache_sync(void *vaddr, size_t size,
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enum dma_data_direction direction)
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@ -184,12 +184,6 @@ dma_set_mask(struct device *dev, u64 mask)
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return 0;
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}
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static inline int
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dma_is_consistent(struct device *dev, dma_addr_t dma_addr)
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{
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return (hppa_dma_ops->dma_sync_single_for_cpu == NULL);
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}
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static inline void
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dma_cache_sync(struct device *dev, void *vaddr, size_t size,
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enum dma_data_direction direction)
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@ -209,11 +209,6 @@ static inline phys_addr_t dma_to_phys(struct device *dev, dma_addr_t daddr)
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#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
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#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
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#ifdef CONFIG_NOT_COHERENT_CACHE
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#define dma_is_consistent(d, h) (0)
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#else
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#define dma_is_consistent(d, h) (1)
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#endif
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static inline void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
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enum dma_data_direction direction)
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@ -42,12 +42,6 @@ void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
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#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
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#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
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#ifdef CONFIG_DMA_COHERENT
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#define dma_is_consistent(d, h) (1)
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#else
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#define dma_is_consistent(d, h) (0)
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#endif
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static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
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{
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struct dma_map_ops *ops = get_dma_ops(dev);
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@ -11,7 +11,6 @@ extern int dma_supported(struct device *dev, u64 mask);
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#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
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#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
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#define dma_is_consistent(d, h) (1)
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extern struct dma_map_ops *dma_ops, pci32_dma_ops;
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extern struct bus_type pci_bus_type;
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@ -90,6 +90,4 @@ dma_set_mask(struct device *dev, u64 mask)
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return 0;
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}
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#define dma_is_consistent(d, h) (1)
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#endif /* _ASM_TILE_DMA_MAPPING_H */
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@ -94,7 +94,6 @@ dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nelems,
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#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
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#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
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#define dma_is_consistent(d, h) (1)
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static inline int
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dma_get_cache_alignment(void)
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@ -54,7 +54,6 @@ static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
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#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
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#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
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#define dma_is_consistent(d, h) (1)
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extern int dma_supported(struct device *hwdev, u64 mask);
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extern int dma_set_mask(struct device *dev, u64 mask);
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@ -161,8 +161,6 @@ dma_set_mask(struct device *dev, u64 mask)
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return 0;
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}
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#define dma_is_consistent(d, h) (1)
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static inline void
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dma_cache_sync(struct device *dev, void *vaddr, size_t size,
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enum dma_data_direction direction)
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@ -72,9 +72,6 @@ dma_set_mask(struct device *dev, u64 mask);
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extern int
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dma_get_cache_alignment(void);
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extern int
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dma_is_consistent(struct device *dev, dma_addr_t dma_handle);
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extern void
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dma_cache_sync(struct device *dev, void *vaddr, size_t size,
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enum dma_data_direction direction);
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