Char/Misc and other driver changes for 5.17-rc1
Here is the large set of char, misc, and other "small" driver subsystem changes for 5.17-rc1. Lots of different things are in here for char/misc drivers such as: - habanalabs driver updates - mei driver updates - lkdtm driver updates - vmw_vmci driver updates - android binder driver updates - other small char/misc driver updates Also smaller driver subsystems have also been updated, including: - fpga subsystem updates - iio subsystem updates - soundwire subsystem updates - extcon subsystem updates - gnss subsystem updates - phy subsystem updates - coresight subsystem updates - firmware subsystem updates - comedi subsystem updates - mhi subsystem updates - speakup subsystem updates - rapidio subsystem updates - spmi subsystem updates - virtual driver updates - counter subsystem updates Too many individual changes to summarize, the shortlog contains the full details. All of these have been in linux-next for a while with no reported issues. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> -----BEGIN PGP SIGNATURE----- iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCYeGNAQ8cZ3JlZ0Brcm9h aC5jb20ACgkQMUfUDdst+ymoVgCg1CPjMu8/SDj3Sm3a1UMQJn9jnl8AnjQcEp3z hMr9mISG4r6g4PvjrJBj =9May -----END PGP SIGNATURE----- Merge tag 'char-misc-5.17-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc Pull char/misc and other driver updates from Greg KH: "Here is the large set of char, misc, and other "small" driver subsystem changes for 5.17-rc1. Lots of different things are in here for char/misc drivers such as: - habanalabs driver updates - mei driver updates - lkdtm driver updates - vmw_vmci driver updates - android binder driver updates - other small char/misc driver updates Also smaller driver subsystems have also been updated, including: - fpga subsystem updates - iio subsystem updates - soundwire subsystem updates - extcon subsystem updates - gnss subsystem updates - phy subsystem updates - coresight subsystem updates - firmware subsystem updates - comedi subsystem updates - mhi subsystem updates - speakup subsystem updates - rapidio subsystem updates - spmi subsystem updates - virtual driver updates - counter subsystem updates Too many individual changes to summarize, the shortlog contains the full details. All of these have been in linux-next for a while with no reported issues" * tag 'char-misc-5.17-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (406 commits) counter: 104-quad-8: Fix use-after-free by quad8_irq_handler dt-bindings: mux: Document mux-states property dt-bindings: ti-serdes-mux: Add defines for J721S2 SoC counter: remove old and now unused registration API counter: ti-eqep: Convert to new counter registration counter: stm32-lptimer-cnt: Convert to new counter registration counter: stm32-timer-cnt: Convert to new counter registration counter: microchip-tcb-capture: Convert to new counter registration counter: ftm-quaddec: Convert to new counter registration counter: intel-qep: Convert to new counter registration counter: interrupt-cnt: Convert to new counter registration counter: 104-quad-8: Convert to new counter registration counter: Update documentation for new counter registration functions counter: Provide alternative counter registration functions counter: stm32-timer-cnt: Convert to counter_priv() wrapper counter: stm32-lptimer-cnt: Convert to counter_priv() wrapper counter: ti-eqep: Convert to counter_priv() wrapper counter: ftm-quaddec: Convert to counter_priv() wrapper counter: intel-qep: Convert to counter_priv() wrapper counter: microchip-tcb-capture: Convert to counter_priv() wrapper ...
This commit is contained in:
Linus Torvalds
Коммит
3bad80dab9
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|
@ -21,11 +21,11 @@ Description: Allow the root user to disable/enable in runtime the clock
|
|||
a different engine to disable/enable its clock gating feature.
|
||||
The bitmask is composed of 20 bits:
|
||||
|
||||
======= ============
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======= ============
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0 - 7 DMA channels
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||||
8 - 11 MME engines
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||||
12 - 19 TPC engines
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======= ============
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||||
======= ============
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||||
|
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The bit's location of a specific engine can be determined
|
||||
using (1 << GAUDI_ENGINE_ID_*). GAUDI_ENGINE_ID_* values
|
||||
|
|
@ -155,6 +155,13 @@ Description: Triggers an I2C transaction that is generated by the device's
|
|||
CPU. Writing to this file generates a write transaction while
|
||||
reading from the file generates a read transaction
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||||
|
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What: /sys/kernel/debug/habanalabs/hl<n>/i2c_len
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Date: Dec 2021
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KernelVersion: 5.17
|
||||
Contact: obitton@habana.ai
|
||||
Description: Sets I2C length in bytes for I2C transaction that is generated by
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the device's CPU
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What: /sys/kernel/debug/habanalabs/hl<n>/i2c_reg
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Date: Jan 2019
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KernelVersion: 5.1
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|
@ -226,12 +233,6 @@ Description: Gets the state dump occurring on a CS timeout or failure.
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Writing an integer X discards X state dumps, so that the
|
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next read would return X+1-st newest state dump.
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What: /sys/kernel/debug/habanalabs/hl<n>/timeout_locked
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Date: Sep 2021
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KernelVersion: 5.16
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Contact: obitton@habana.ai
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Description: Sets the command submission timeout value in seconds.
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What: /sys/kernel/debug/habanalabs/hl<n>/stop_on_err
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Date: Mar 2020
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KernelVersion: 5.6
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|
@ -239,6 +240,12 @@ Contact: ogabbay@kernel.org
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Description: Sets the stop-on_error option for the device engines. Value of
|
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"0" is for disable, otherwise enable.
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|
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What: /sys/kernel/debug/habanalabs/hl<n>/timeout_locked
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Date: Sep 2021
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KernelVersion: 5.16
|
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Contact: obitton@habana.ai
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Description: Sets the command submission timeout value in seconds.
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What: /sys/kernel/debug/habanalabs/hl<n>/userptr
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Date: Jan 2019
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KernelVersion: 5.1
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|
|
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@ -0,0 +1,16 @@
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What: /sys/bus/iio/devices/iio:deviceX/filter_mode_available
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KernelVersion:
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Contact: linux-iio@vger.kernel.org
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Description:
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Reading this returns the valid values that can be written to the
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on_altvoltage0_mode attribute:
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- auto -> Adjust bandpass filter to track changes in input clock rate.
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- manual -> disable/unregister the clock rate notifier / input clock tracking.
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|
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What: /sys/bus/iio/devices/iio:deviceX/filter_mode
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KernelVersion:
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Contact: linux-iio@vger.kernel.org
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Description:
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This attribute configures the filter mode.
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Reading returns the actual mode.
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@ -0,0 +1,38 @@
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What: /sys/bus/iio/devices/iio:deviceX/in_altvoltage0-1_i_calibphase
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KernelVersion:
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Contact: linux-iio@vger.kernel.org
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Description:
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Read/write unscaled value for the Local Oscillatior path quadrature I phase shift.
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What: /sys/bus/iio/devices/iio:deviceX/in_altvoltage0-1_q_calibphase
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KernelVersion:
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Contact: linux-iio@vger.kernel.org
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Description:
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Read/write unscaled value for the Local Oscillatior path quadrature Q phase shift.
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|
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What: /sys/bus/iio/devices/iio:deviceX/in_altvoltage0_i_calibbias
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KernelVersion:
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Contact: linux-iio@vger.kernel.org
|
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Description:
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Read/write value for the Local Oscillatior Feedthrough Offset Calibration I Positive
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side.
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What: /sys/bus/iio/devices/iio:deviceX/in_altvoltage0_q_calibbias
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KernelVersion:
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Contact: linux-iio@vger.kernel.org
|
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Description:
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Read/write value for the Local Oscillatior Feedthrough Offset Calibration Q Positive side.
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What: /sys/bus/iio/devices/iio:deviceX/in_altvoltage1_i_calibbias
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KernelVersion:
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Contact: linux-iio@vger.kernel.org
|
||||
Description:
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Read/write raw value for the Local Oscillatior Feedthrough Offset Calibration I Negative
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||||
side.
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|
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What: /sys/bus/iio/devices/iio:deviceX/in_altvoltage1_q_calibbias
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||||
KernelVersion:
|
||||
Contact: linux-iio@vger.kernel.org
|
||||
Description:
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||||
Read/write raw value for the Local Oscillatior Feedthrough Offset Calibration Q Negative
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||||
side.
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||||
|
|
@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
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|||
title: ADC found on Freescale vf610 and similar SoCs
|
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|
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maintainers:
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- Fugang Duan <fugang.duan@nxp.com>
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- Haibo Chen <haibo.chen@nxp.com>
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|
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description:
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ADCs found on vf610/i.MX6slx and upward SoCs from Freescale.
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|
|
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|
@ -27,6 +27,7 @@ description: |
|
|||
8 | batt_v
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9 | batt_chrg_i
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||||
10 | batt_dischrg_i
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||||
11 | ts_v
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||||
|
||||
AXP22x
|
||||
------
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|
|
@ -34,6 +35,7 @@ description: |
|
|||
1 | batt_v
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||||
2 | batt_chrg_i
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||||
3 | batt_dischrg_i
|
||||
4 | ts_v
|
||||
|
||||
AXP813
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||||
------
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||||
|
|
@ -42,6 +44,7 @@ description: |
|
|||
2 | batt_v
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3 | batt_chrg_i
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||||
4 | batt_dischrg_i
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||||
5 | ts_v
|
||||
|
||||
|
||||
properties:
|
||||
|
|
|
|||
|
|
@ -0,0 +1,227 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/iio/adc/xlnx,zynqmp-ams.yaml#
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||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Xilinx Zynq Ultrascale AMS controller
|
||||
|
||||
maintainers:
|
||||
- Anand Ashok Dumbre <anand.ashok.dumbre@xilinx.com>
|
||||
|
||||
description: |
|
||||
The AMS (Analog Monitoring System) includes an ADC as well as on-chip sensors
|
||||
that can be used to sample external voltages and monitor on-die operating
|
||||
conditions, such as temperature and supply voltage levels.
|
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The AMS has two SYSMON blocks which are PL (Programmable Logic) SYSMON and
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PS (Processing System) SYSMON.
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||||
All designs should have AMS registers, but PS and PL are optional. The
|
||||
AMS controller can work with only PS, only PL and both PS and PL
|
||||
configurations. Please specify registers according to your design. Devicetree
|
||||
should always have AMS module property. Providing PS & PL module is optional.
|
||||
|
||||
AMS Channel Details
|
||||
```````````````````
|
||||
Sysmon Block |Channel| Details |Measurement
|
||||
|Number | |Type
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||||
---------------------------------------------------------------------------------------------------------
|
||||
AMS CTRL |0 |System PLLs voltage measurement, VCC_PSPLL. |Voltage
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||||
|1 |Battery voltage measurement, VCC_PSBATT. |Voltage
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||||
|2 |PL Internal voltage measurement, VCCINT. |Voltage
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||||
|3 |Block RAM voltage measurement, VCCBRAM. |Voltage
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||||
|4 |PL Aux voltage measurement, VCCAUX. |Voltage
|
||||
|5 |Voltage measurement for six DDR I/O PLLs, VCC_PSDDR_PLL. |Voltage
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||||
|6 |VCC_PSINTFP_DDR voltage measurement. |Voltage
|
||||
---------------------------------------------------------------------------------------------------------
|
||||
PS Sysmon |7 |LPD temperature measurement. |Temperature
|
||||
|8 |FPD temperature measurement (REMOTE). |Temperature
|
||||
|9 |VCC PS LPD voltage measurement (supply1). |Voltage
|
||||
|10 |VCC PS FPD voltage measurement (supply2). |Voltage
|
||||
|11 |PS Aux voltage reference (supply3). |Voltage
|
||||
|12 |DDR I/O VCC voltage measurement. |Voltage
|
||||
|13 |PS IO Bank 503 voltage measurement (supply5). |Voltage
|
||||
|14 |PS IO Bank 500 voltage measurement (supply6). |Voltage
|
||||
|15 |VCCO_PSIO1 voltage measurement. |Voltage
|
||||
|16 |VCCO_PSIO2 voltage measurement. |Voltage
|
||||
|17 |VCC_PS_GTR voltage measurement (VPS_MGTRAVCC). |Voltage
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||||
|18 |VTT_PS_GTR voltage measurement (VPS_MGTRAVTT). |Voltage
|
||||
|19 |VCC_PSADC voltage measurement. |Voltage
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||||
---------------------------------------------------------------------------------------------------------
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PL Sysmon |20 |PL temperature measurement. |Temperature
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|21 |PL Internal voltage measurement, VCCINT. |Voltage
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||||
|22 |PL Auxiliary voltage measurement, VCCAUX. |Voltage
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||||
|23 |ADC Reference P+ voltage measurement. |Voltage
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||||
|24 |ADC Reference N- voltage measurement. |Voltage
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||||
|25 |PL Block RAM voltage measurement, VCCBRAM. |Voltage
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||||
|26 |LPD Internal voltage measurement, VCC_PSINTLP (supply4). |Voltage
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||||
|27 |FPD Internal voltage measurement, VCC_PSINTFP (supply5). |Voltage
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||||
|28 |PS Auxiliary voltage measurement (supply6). |Voltage
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||||
|29 |PL VCCADC voltage measurement (vccams). |Voltage
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|30 |Differential analog input signal voltage measurment. |Voltage
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|31 |VUser0 voltage measurement (supply7). |Voltage
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|32 |VUser1 voltage measurement (supply8). |Voltage
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|33 |VUser2 voltage measurement (supply9). |Voltage
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|34 |VUser3 voltage measurement (supply10). |Voltage
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||||
|35 |Auxiliary ch 0 voltage measurement (VAux0). |Voltage
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|36 |Auxiliary ch 1 voltage measurement (VAux1). |Voltage
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||||
|37 |Auxiliary ch 2 voltage measurement (VAux2). |Voltage
|
||||
|38 |Auxiliary ch 3 voltage measurement (VAux3). |Voltage
|
||||
|39 |Auxiliary ch 4 voltage measurement (VAux4). |Voltage
|
||||
|40 |Auxiliary ch 5 voltage measurement (VAux5). |Voltage
|
||||
|41 |Auxiliary ch 6 voltage measurement (VAux6). |Voltage
|
||||
|42 |Auxiliary ch 7 voltage measurement (VAux7). |Voltage
|
||||
|43 |Auxiliary ch 8 voltage measurement (VAux8). |Voltage
|
||||
|44 |Auxiliary ch 9 voltage measurement (VAux9). |Voltage
|
||||
|45 |Auxiliary ch 10 voltage measurement (VAux10). |Voltage
|
||||
|46 |Auxiliary ch 11 voltage measurement (VAux11). |Voltage
|
||||
|47 |Auxiliary ch 12 voltage measurement (VAux12). |Voltage
|
||||
|48 |Auxiliary ch 13 voltage measurement (VAux13). |Voltage
|
||||
|49 |Auxiliary ch 14 voltage measurement (VAux14). |Voltage
|
||||
|50 |Auxiliary ch 15 voltage measurement (VAux15). |Voltage
|
||||
--------------------------------------------------------------------------------------------------------
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||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- xlnx,zynqmp-ams
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
reg:
|
||||
description: AMS Controller register space
|
||||
maxItems: 1
|
||||
|
||||
ranges:
|
||||
description:
|
||||
Maps the child address space for PS and/or PL.
|
||||
maxItems: 1
|
||||
|
||||
'#address-cells':
|
||||
const: 1
|
||||
|
||||
'#size-cells':
|
||||
const: 1
|
||||
|
||||
'#io-channel-cells':
|
||||
const: 1
|
||||
|
||||
ams-ps@0:
|
||||
type: object
|
||||
description: |
|
||||
PS (Processing System) SYSMON is memory mapped to PS. This block has
|
||||
built-in alarm generation logic that is used to interrupt the processor
|
||||
based on condition set.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- xlnx,zynqmp-ams-ps
|
||||
|
||||
reg:
|
||||
description: Register Space for PS-SYSMON
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
ams-pl@400:
|
||||
type: object
|
||||
description:
|
||||
PL-SYSMON is capable of monitoring off chip voltage and temperature.
|
||||
PL-SYSMON block has DRP, JTAG and I2C interface to enable monitoring
|
||||
from external master. Out of this interface currently only DRP is
|
||||
supported. This block has alarm generation logic that is used to
|
||||
interrupt the processor based on condition set.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- enum:
|
||||
- xlnx,zynqmp-ams-pl
|
||||
|
||||
reg:
|
||||
description: Register Space for PL-SYSMON.
|
||||
maxItems: 1
|
||||
|
||||
'#address-cells':
|
||||
const: 1
|
||||
|
||||
'#size-cells':
|
||||
const: 0
|
||||
|
||||
patternProperties:
|
||||
"^channel@([2-4][0-9]|50)$":
|
||||
type: object
|
||||
description:
|
||||
Describes the external channels connected.
|
||||
|
||||
properties:
|
||||
reg:
|
||||
description:
|
||||
Pair of pins the channel is connected to. This value is
|
||||
same as Channel Number for a particular channel.
|
||||
minimum: 20
|
||||
maximum: 50
|
||||
|
||||
xlnx,bipolar:
|
||||
$ref: /schemas/types.yaml#/definitions/flag
|
||||
type: boolean
|
||||
description:
|
||||
If the set channel is used in bipolar mode.
|
||||
|
||||
required:
|
||||
- reg
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- ranges
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
bus {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
|
||||
xilinx_ams: ams@ffa50000 {
|
||||
compatible = "xlnx,zynqmp-ams";
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <0 56 4>;
|
||||
reg = <0x0 0xffa50000 0x0 0x800>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
#io-channel-cells = <1>;
|
||||
ranges = <0 0 0xffa50800 0x800>;
|
||||
|
||||
ams_ps: ams-ps@0 {
|
||||
compatible = "xlnx,zynqmp-ams-ps";
|
||||
reg = <0 0x400>;
|
||||
};
|
||||
|
||||
ams_pl: ams-pl@400 {
|
||||
compatible = "xlnx,zynqmp-ams-pl";
|
||||
reg = <0x400 0x400>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
channel@30 {
|
||||
reg = <30>;
|
||||
xlnx,bipolar;
|
||||
};
|
||||
channel@31 {
|
||||
reg = <31>;
|
||||
};
|
||||
channel@38 {
|
||||
reg = <38>;
|
||||
xlnx,bipolar;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -0,0 +1,158 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/iio/addac/adi,ad74413r.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Analog Devices AD74412R/AD74413R device
|
||||
|
||||
maintainers:
|
||||
- Cosmin Tanislav <cosmin.tanislav@analog.com>
|
||||
|
||||
description: |
|
||||
The AD74412R and AD74413R are quad-channel software configurable input/output
|
||||
solutions for building and process control applications. They contain
|
||||
functionality for analog output, analog input, digital input, resistance
|
||||
temperature detector, and thermocouple measurements integrated
|
||||
into a single chip solution with an SPI interface.
|
||||
The devices feature a 16-bit ADC and four configurable 13-bit DACs to provide
|
||||
four configurable input/output channels and a suite of diagnostic functions.
|
||||
The AD74413R differentiates itself from the AD74412R by being HART-compatible.
|
||||
https://www.analog.com/en/products/ad74412r.html
|
||||
https://www.analog.com/en/products/ad74413r.html
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- adi,ad74412r
|
||||
- adi,ad74413r
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
'#address-cells':
|
||||
const: 1
|
||||
|
||||
'#size-cells':
|
||||
const: 0
|
||||
|
||||
spi-max-frequency:
|
||||
maximum: 1000000
|
||||
|
||||
spi-cpol: true
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
refin-supply: true
|
||||
|
||||
shunt-resistor-micro-ohms:
|
||||
description:
|
||||
Shunt (sense) resistor value in micro-Ohms.
|
||||
default: 100000000
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- spi-max-frequency
|
||||
- spi-cpol
|
||||
- refin-supply
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
patternProperties:
|
||||
"^channel@[0-3]$":
|
||||
type: object
|
||||
description: Represents the external channels which are connected to the device.
|
||||
|
||||
properties:
|
||||
reg:
|
||||
description: |
|
||||
The channel number. It can have up to 4 channels numbered from 0 to 3.
|
||||
minimum: 0
|
||||
maximum: 3
|
||||
|
||||
adi,ch-func:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
description: |
|
||||
Channel function.
|
||||
HART functions are not supported on AD74412R.
|
||||
0 - CH_FUNC_HIGH_IMPEDANCE
|
||||
1 - CH_FUNC_VOLTAGE_OUTPUT
|
||||
2 - CH_FUNC_CURRENT_OUTPUT
|
||||
3 - CH_FUNC_VOLTAGE_INPUT
|
||||
4 - CH_FUNC_CURRENT_INPUT_EXT_POWER
|
||||
5 - CH_FUNC_CURRENT_INPUT_LOOP_POWER
|
||||
6 - CH_FUNC_RESISTANCE_INPUT
|
||||
7 - CH_FUNC_DIGITAL_INPUT_LOGIC
|
||||
8 - CH_FUNC_DIGITAL_INPUT_LOOP_POWER
|
||||
9 - CH_FUNC_CURRENT_INPUT_EXT_POWER_HART
|
||||
10 - CH_FUNC_CURRENT_INPUT_LOOP_POWER_HART
|
||||
minimum: 0
|
||||
maximum: 10
|
||||
default: 0
|
||||
|
||||
adi,gpo-comparator:
|
||||
type: boolean
|
||||
description: |
|
||||
Whether to configure GPO as a comparator or not.
|
||||
When not configured as a comparator, the GPO will be treated as an
|
||||
output-only GPIO.
|
||||
|
||||
required:
|
||||
- reg
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/iio/addac/adi,ad74413r.h>
|
||||
|
||||
spi {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
cs-gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
|
||||
status = "okay";
|
||||
|
||||
ad74413r@0 {
|
||||
compatible = "adi,ad74413r";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <1000000>;
|
||||
spi-cpol;
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
interrupt-parent = <&gpio>;
|
||||
interrupts = <26 IRQ_TYPE_EDGE_FALLING>;
|
||||
|
||||
refin-supply = <&ad74413r_refin>;
|
||||
|
||||
channel@0 {
|
||||
reg = <0>;
|
||||
|
||||
adi,ch-func = <CH_FUNC_VOLTAGE_OUTPUT>;
|
||||
};
|
||||
|
||||
channel@1 {
|
||||
reg = <1>;
|
||||
|
||||
adi,ch-func = <CH_FUNC_CURRENT_OUTPUT>;
|
||||
};
|
||||
|
||||
channel@2 {
|
||||
reg = <2>;
|
||||
|
||||
adi,ch-func = <CH_FUNC_DIGITAL_INPUT_LOGIC>;
|
||||
adi,gpo-comparator;
|
||||
};
|
||||
|
||||
channel@3 {
|
||||
reg = <3>;
|
||||
|
||||
adi,ch-func = <CH_FUNC_CURRENT_INPUT_EXT_POWER>;
|
||||
};
|
||||
};
|
||||
};
|
||||
...
|
||||
|
|
@ -0,0 +1,217 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
# Copyright 2020 Analog Devices Inc.
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/iio/dac/adi,ad3552r.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Analog Devices AD2552R DAC device driver
|
||||
|
||||
maintainers:
|
||||
- Mihail Chindris <mihail.chindris@analog.com>
|
||||
|
||||
description: |
|
||||
Bindings for the Analog Devices AD3552R DAC device and similar.
|
||||
Datasheet can be found here:
|
||||
https://www.analog.com/media/en/technical-documentation/data-sheets/ad3542r.pdf
|
||||
https://www.analog.com/media/en/technical-documentation/data-sheets/ad3552r.pdf
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- adi,ad3542r
|
||||
- adi,ad3552r
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
spi-max-frequency:
|
||||
maximum: 30000000
|
||||
|
||||
reset-gpios:
|
||||
maxItems: 1
|
||||
|
||||
ldac-gpios:
|
||||
description: |
|
||||
LDAC pin to be used as a hardware trigger to update the DAC channels.
|
||||
maxItems: 1
|
||||
|
||||
vref-supply:
|
||||
description:
|
||||
The regulator to use as an external reference. If it does not exists the
|
||||
internal reference will be used. External reference must be 2.5V
|
||||
|
||||
adi,vref-out-en:
|
||||
description: Vref I/O driven by internal vref to 2.5V. If not set, Vref pin
|
||||
will be floating.
|
||||
type: boolean
|
||||
|
||||
adi,sdo-drive-strength:
|
||||
description: |
|
||||
Configure SDIO0 and SDIO1 strength levels:
|
||||
- 0: low SDO drive strength.
|
||||
- 1: medium low SDO drive strength.
|
||||
- 2: medium high SDO drive strength.
|
||||
- 3: high SDO drive strength
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
enum: [0, 1, 2, 3]
|
||||
|
||||
'#address-cells':
|
||||
const: 1
|
||||
|
||||
'#size-cells':
|
||||
const: 0
|
||||
|
||||
patternProperties:
|
||||
"^channel@([0-1])$":
|
||||
type: object
|
||||
description: Configurations of the DAC Channels
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
properties:
|
||||
reg:
|
||||
description: Channel number
|
||||
enum: [0, 1]
|
||||
|
||||
adi,output-range-microvolt: true
|
||||
|
||||
custom-output-range-config:
|
||||
type: object
|
||||
description: Configuration of custom range when
|
||||
adi,output-range-microvolt is not present.
|
||||
The formulas for calculation the output voltages are
|
||||
Vout_fs = 2.5 + [(GainN + Offset/1024) * 2.5 * Rfbx * 1.03]
|
||||
Vout_zs = 2.5 - [(GainP + Offset/1024) * 2.5 * Rfbx * 1.03]
|
||||
|
||||
properties:
|
||||
adi,gain-offset:
|
||||
description: Gain offset used in the above formula
|
||||
$ref: /schemas/types.yaml#/definitions/int32
|
||||
maximum: 511
|
||||
minimum: -511
|
||||
|
||||
adi,gain-scaling-p-inv-log2:
|
||||
description: GainP = 1 / ( 2 ^ adi,gain-scaling-p-inv-log2)
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
enum: [0, 1, 2, 3]
|
||||
|
||||
adi,gain-scaling-n-inv-log2:
|
||||
description: GainN = 1 / ( 2 ^ adi,gain-scaling-n-inv-log2)
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
enum: [0, 1, 2, 3]
|
||||
|
||||
adi,rfb-ohms:
|
||||
description: Feedback Resistor
|
||||
|
||||
required:
|
||||
- adi,gain-offset
|
||||
- adi,gain-scaling-p-inv-log2
|
||||
- adi,gain-scaling-n-inv-log2
|
||||
- adi,rfb-ohms
|
||||
|
||||
required:
|
||||
- reg
|
||||
|
||||
oneOf:
|
||||
# If adi,output-range-microvolt is missing,
|
||||
# custom-output-range-config must be used
|
||||
- required:
|
||||
- adi,output-range-microvolt
|
||||
|
||||
- required:
|
||||
- custom-output-range-config
|
||||
|
||||
allOf:
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: adi,ad3542r
|
||||
then:
|
||||
patternProperties:
|
||||
"^channel@([0-1])$":
|
||||
type: object
|
||||
properties:
|
||||
adi,output-range-microvolt:
|
||||
description: |
|
||||
Voltage output range of the channel as <minimum, maximum>
|
||||
Required connections:
|
||||
Rfb1x for: 0 to 2.5 V; 0 to 3V; 0 to 5 V;
|
||||
Rfb2x for: 0 to 10 V; 2.5 to 7.5V; -5 to 5 V;
|
||||
oneOf:
|
||||
- items:
|
||||
- const: 0
|
||||
- enum: [2500000, 3000000, 5000000, 10000000]
|
||||
- items:
|
||||
- const: -2500000
|
||||
- const: 7500000
|
||||
- items:
|
||||
- const: -5000000
|
||||
- const: 5000000
|
||||
|
||||
required:
|
||||
- adi,output-range-microvolt
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: adi,ad3552r
|
||||
then:
|
||||
patternProperties:
|
||||
"^channel@([0-1])$":
|
||||
type: object
|
||||
properties:
|
||||
adi,output-range-microvolt:
|
||||
description: |
|
||||
Voltage output range of the channel as <minimum, maximum>
|
||||
Required connections:
|
||||
Rfb1x for: 0 to 2.5 V; 0 to 5 V;
|
||||
Rfb2x for: 0 to 10 V; -5 to 5 V;
|
||||
Rfb4x for: -10 to 10V
|
||||
oneOf:
|
||||
- items:
|
||||
- const: 0
|
||||
- enum: [2500000, 5000000, 10000000]
|
||||
- items:
|
||||
- const: -5000000
|
||||
- const: 5000000
|
||||
- items:
|
||||
- const: -10000000
|
||||
- const: 10000000
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- spi-max-frequency
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
spi {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
ad3552r@0 {
|
||||
compatible = "adi,ad3552r";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <20000000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
channel@0 {
|
||||
reg = <0>;
|
||||
adi,output-range-microvolt = <0 10000000>;
|
||||
};
|
||||
channel@1 {
|
||||
reg = <1>;
|
||||
custom-output-range-config {
|
||||
adi,gain-offset = <5>;
|
||||
adi,gain-scaling-p-inv-log2 = <1>;
|
||||
adi,gain-scaling-n-inv-log2 = <2>;
|
||||
adi,rfb-ohms = <1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
...
|
||||
|
|
@ -125,7 +125,6 @@ oneOf:
|
|||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/iio/adi,ad5592r.h>
|
||||
spi {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
|
|
|||
|
|
@ -0,0 +1,61 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/iio/dac/adi,ad7293.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: AD7293 12-Bit Power Amplifier Current Controller with ADC,
|
||||
DACs, Temperature and Current Sensors
|
||||
|
||||
maintainers:
|
||||
- Antoniu Miclaus <antoniu.miclaus@analog.com>
|
||||
|
||||
description: |
|
||||
Power Amplifier drain current controller containing functionality
|
||||
for general-purpose monitoring and control of current, voltage,
|
||||
and temperature, integrated into a single chip solution with an
|
||||
SPI-compatible interface.
|
||||
|
||||
https://www.analog.com/en/products/ad7293.html
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- adi,ad7293
|
||||
|
||||
avdd-supply: true
|
||||
|
||||
vdrive-supply: true
|
||||
|
||||
reset-gpios:
|
||||
maxItems: 1
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
spi-max-frequency:
|
||||
maximum: 1000000
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- avdd-supply
|
||||
- vdrive-supply
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
spi {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
ad7293@0 {
|
||||
compatible = "adi,ad7293";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <1000000>;
|
||||
avdd-supply = <&avdd>;
|
||||
vdrive-supply = <&vdrive>;
|
||||
reset-gpios = <&gpio 10 0>;
|
||||
};
|
||||
};
|
||||
...
|
||||
|
|
@ -0,0 +1,66 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/iio/filter/adi,admv8818.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: ADMV8818 Digitally Tunable, High-Pass and Low-Pass Filter
|
||||
|
||||
maintainers:
|
||||
- Antoniu Miclaus <antoniu.miclaus@analog.com>
|
||||
|
||||
description: |
|
||||
Fully monolithic microwave integrated circuit (MMIC) that
|
||||
features a digitally selectable frequency of operation.
|
||||
The device features four independently controlled high-pass
|
||||
filters (HPFs) and four independently controlled low-pass filters
|
||||
(LPFs) that span the 2 GHz to 18 GHz frequency range.
|
||||
|
||||
https://www.analog.com/en/products/admv8818.html
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- adi,admv8818
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
spi-max-frequency:
|
||||
maximum: 10000000
|
||||
|
||||
clocks:
|
||||
description:
|
||||
Definition of the external clock.
|
||||
minItems: 1
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: rf_in
|
||||
|
||||
clock-output-names:
|
||||
maxItems: 1
|
||||
|
||||
'#clock-cells':
|
||||
const: 0
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
spi {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
admv8818@0 {
|
||||
compatible = "adi,admv8818";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <10000000>;
|
||||
clocks = <&admv8818_rfin>;
|
||||
clock-names = "rf_in";
|
||||
};
|
||||
};
|
||||
...
|
||||
|
|
@ -0,0 +1,91 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/iio/frequency/adi,admv1013.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: ADMV1013 Microwave Upconverter
|
||||
|
||||
maintainers:
|
||||
- Antoniu Miclaus <antoniu.miclaus@analog.com>
|
||||
|
||||
description: |
|
||||
Wideband, microwave upconverter optimized for point to point microwave
|
||||
radio designs operating in the 24 GHz to 44 GHz frequency range.
|
||||
|
||||
https://www.analog.com/en/products/admv1013.html
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- adi,admv1013
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
spi-max-frequency:
|
||||
maximum: 1000000
|
||||
|
||||
clocks:
|
||||
description:
|
||||
Definition of the external clock.
|
||||
minItems: 1
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: lo_in
|
||||
|
||||
vcm-supply:
|
||||
description:
|
||||
Analog voltage regulator.
|
||||
|
||||
adi,detector-enable:
|
||||
description:
|
||||
Enable the Envelope Detector available at output pins VENV_P and
|
||||
VENV_N. Disable to reduce power consumption.
|
||||
type: boolean
|
||||
|
||||
adi,input-mode:
|
||||
description:
|
||||
Select the input mode.
|
||||
iq - in-phase quadrature (I/Q) input
|
||||
if - complex intermediate frequency (IF) input
|
||||
enum: [iq, if]
|
||||
|
||||
adi,quad-se-mode:
|
||||
description:
|
||||
Switch the LO path from differential to single-ended operation.
|
||||
se-neg - Single-Ended Mode, Negative Side Disabled.
|
||||
se-pos - Single-Ended Mode, Positive Side Disabled.
|
||||
diff - Differential Mode.
|
||||
enum: [se-neg, se-pos, diff]
|
||||
|
||||
'#clock-cells':
|
||||
const: 0
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- clocks
|
||||
- clock-names
|
||||
- vcm-supply
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
spi {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
admv1013@0{
|
||||
compatible = "adi,admv1013";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <1000000>;
|
||||
clocks = <&admv1013_lo>;
|
||||
clock-names = "lo_in";
|
||||
vcm-supply = <&vcm>;
|
||||
adi,quad-se-mode = "diff";
|
||||
adi,detector-enable;
|
||||
};
|
||||
};
|
||||
...
|
||||
|
|
@ -61,6 +61,13 @@ properties:
|
|||
type: boolean
|
||||
description: enable/disable internal i2c controller pullup resistors.
|
||||
|
||||
st,disable-sensor-hub:
|
||||
type: boolean
|
||||
description:
|
||||
Enable/disable internal i2c controller slave autoprobing at bootstrap.
|
||||
Disable sensor-hub is useful if i2c controller clock/data lines are
|
||||
connected through a pull-up with other chip lines (e.g. SDO/SA0).
|
||||
|
||||
drive-open-drain:
|
||||
type: boolean
|
||||
description:
|
||||
|
|
|
|||
|
|
@ -9,6 +9,9 @@ title: LiteON LTR501 I2C Proximity and Light sensor
|
|||
maintainers:
|
||||
- Nikita Travkin <nikita@trvn.ru>
|
||||
|
||||
allOf:
|
||||
- $ref: ../common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
|
|
@ -25,6 +28,8 @@ properties:
|
|||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
proximity-near-level: true
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
required:
|
||||
|
|
@ -42,6 +47,8 @@ examples:
|
|||
light-sensor@23 {
|
||||
compatible = "liteon,ltr559";
|
||||
reg = <0x23>;
|
||||
proximity-near-level = <75>;
|
||||
|
||||
vdd-supply = <&pm8916_l17>;
|
||||
vddio-supply = <&pm8916_l6>;
|
||||
|
||||
|
|
|
|||
|
|
@ -18,6 +18,7 @@ properties:
|
|||
compatible:
|
||||
enum:
|
||||
- qcom,sc7180-osm-l3
|
||||
- qcom,sc7280-epss-l3
|
||||
- qcom,sc8180x-osm-l3
|
||||
- qcom,sdm845-osm-l3
|
||||
- qcom,sm8150-osm-l3
|
||||
|
|
|
|||
|
|
@ -0,0 +1,137 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/interconnect/qcom,qcm2290.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Qualcomm QCM2290 Network-On-Chip interconnect
|
||||
|
||||
maintainers:
|
||||
- Shawn Guo <shawn.guo@linaro.org>
|
||||
|
||||
description: |
|
||||
The Qualcomm QCM2290 interconnect providers support adjusting the
|
||||
bandwidth requirements between the various NoC fabrics.
|
||||
|
||||
properties:
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
compatible:
|
||||
enum:
|
||||
- qcom,qcm2290-bimc
|
||||
- qcom,qcm2290-cnoc
|
||||
- qcom,qcm2290-snoc
|
||||
|
||||
'#interconnect-cells':
|
||||
const: 1
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: bus
|
||||
- const: bus_a
|
||||
|
||||
clocks:
|
||||
items:
|
||||
- description: Bus Clock
|
||||
- description: Bus A Clock
|
||||
|
||||
# Child node's properties
|
||||
patternProperties:
|
||||
'^interconnect-[a-z0-9]+$':
|
||||
type: object
|
||||
description:
|
||||
The interconnect providers do not have a separate QoS register space,
|
||||
but share parent's space.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- qcom,qcm2290-qup-virt
|
||||
- qcom,qcm2290-mmrt-virt
|
||||
- qcom,qcm2290-mmnrt-virt
|
||||
|
||||
'#interconnect-cells':
|
||||
const: 1
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: bus
|
||||
- const: bus_a
|
||||
|
||||
clocks:
|
||||
items:
|
||||
- description: Bus Clock
|
||||
- description: Bus A Clock
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- '#interconnect-cells'
|
||||
- clock-names
|
||||
- clocks
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- '#interconnect-cells'
|
||||
- clock-names
|
||||
- clocks
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/qcom,rpmcc.h>
|
||||
|
||||
snoc: interconnect@1880000 {
|
||||
compatible = "qcom,qcm2290-snoc";
|
||||
reg = <0x01880000 0x60200>;
|
||||
#interconnect-cells = <1>;
|
||||
clock-names = "bus", "bus_a";
|
||||
clocks = <&rpmcc RPM_SMD_SNOC_CLK>,
|
||||
<&rpmcc RPM_SMD_SNOC_A_CLK>;
|
||||
|
||||
qup_virt: interconnect-qup {
|
||||
compatible = "qcom,qcm2290-qup-virt";
|
||||
#interconnect-cells = <1>;
|
||||
clock-names = "bus", "bus_a";
|
||||
clocks = <&rpmcc RPM_SMD_QUP_CLK>,
|
||||
<&rpmcc RPM_SMD_QUP_A_CLK>;
|
||||
};
|
||||
|
||||
mmnrt_virt: interconnect-mmnrt {
|
||||
compatible = "qcom,qcm2290-mmnrt-virt";
|
||||
#interconnect-cells = <1>;
|
||||
clock-names = "bus", "bus_a";
|
||||
clocks = <&rpmcc RPM_SMD_MMNRT_CLK>,
|
||||
<&rpmcc RPM_SMD_MMNRT_A_CLK>;
|
||||
};
|
||||
|
||||
mmrt_virt: interconnect-mmrt {
|
||||
compatible = "qcom,qcm2290-mmrt-virt";
|
||||
#interconnect-cells = <1>;
|
||||
clock-names = "bus", "bus_a";
|
||||
clocks = <&rpmcc RPM_SMD_MMRT_CLK>,
|
||||
<&rpmcc RPM_SMD_MMRT_A_CLK>;
|
||||
};
|
||||
};
|
||||
|
||||
cnoc: interconnect@1900000 {
|
||||
compatible = "qcom,qcm2290-cnoc";
|
||||
reg = <0x01900000 0x8200>;
|
||||
#interconnect-cells = <1>;
|
||||
clock-names = "bus", "bus_a";
|
||||
clocks = <&rpmcc RPM_SMD_CNOC_CLK>,
|
||||
<&rpmcc RPM_SMD_CNOC_A_CLK>;
|
||||
};
|
||||
|
||||
bimc: interconnect@4480000 {
|
||||
compatible = "qcom,qcm2290-bimc";
|
||||
reg = <0x04480000 0x80000>;
|
||||
#interconnect-cells = <1>;
|
||||
clock-names = "bus", "bus_a";
|
||||
clocks = <&rpmcc RPM_SMD_BIMC_CLK>,
|
||||
<&rpmcc RPM_SMD_BIMC_A_CLK>;
|
||||
};
|
||||
|
|
@ -27,22 +27,37 @@ properties:
|
|||
- qcom,msm8939-pcnoc
|
||||
- qcom,msm8939-snoc
|
||||
- qcom,msm8939-snoc-mm
|
||||
- qcom,msm8996-a0noc
|
||||
- qcom,msm8996-a1noc
|
||||
- qcom,msm8996-a2noc
|
||||
- qcom,msm8996-bimc
|
||||
- qcom,msm8996-cnoc
|
||||
- qcom,msm8996-mnoc
|
||||
- qcom,msm8996-pnoc
|
||||
- qcom,msm8996-snoc
|
||||
- qcom,qcs404-bimc
|
||||
- qcom,qcs404-pcnoc
|
||||
- qcom,qcs404-snoc
|
||||
- qcom,sdm660-a2noc
|
||||
- qcom,sdm660-bimc
|
||||
- qcom,sdm660-cnoc
|
||||
- qcom,sdm660-gnoc
|
||||
- qcom,sdm660-mnoc
|
||||
- qcom,sdm660-snoc
|
||||
|
||||
'#interconnect-cells':
|
||||
const: 1
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: bus
|
||||
- const: bus_a
|
||||
|
||||
clocks:
|
||||
items:
|
||||
- description: Bus Clock
|
||||
- description: Bus A Clock
|
||||
minItems: 2
|
||||
maxItems: 7
|
||||
|
||||
clock-names:
|
||||
minItems: 2
|
||||
maxItems: 7
|
||||
|
||||
power-domains:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
|
@ -53,6 +68,120 @@ required:
|
|||
|
||||
additionalProperties: false
|
||||
|
||||
allOf:
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,msm8916-bimc
|
||||
- qcom,msm8916-pcnoc
|
||||
- qcom,msm8916-snoc
|
||||
- qcom,msm8939-bimc
|
||||
- qcom,msm8939-pcnoc
|
||||
- qcom,msm8939-snoc
|
||||
- qcom,msm8939-snoc-mm
|
||||
- qcom,msm8996-a1noc
|
||||
- qcom,msm8996-a2noc
|
||||
- qcom,msm8996-bimc
|
||||
- qcom,msm8996-cnoc
|
||||
- qcom,msm8996-pnoc
|
||||
- qcom,msm8996-snoc
|
||||
- qcom,qcs404-bimc
|
||||
- qcom,qcs404-pcnoc
|
||||
- qcom,qcs404-snoc
|
||||
- qcom,sdm660-bimc
|
||||
- qcom,sdm660-cnoc
|
||||
- qcom,sdm660-gnoc
|
||||
- qcom,sdm660-snoc
|
||||
|
||||
then:
|
||||
properties:
|
||||
clock-names:
|
||||
items:
|
||||
- const: bus
|
||||
- const: bus_a
|
||||
|
||||
clocks:
|
||||
items:
|
||||
- description: Bus Clock
|
||||
- description: Bus A Clock
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,msm8996-mnoc
|
||||
- qcom,sdm660-mnoc
|
||||
|
||||
then:
|
||||
properties:
|
||||
clock-names:
|
||||
items:
|
||||
- const: bus
|
||||
- const: bus_a
|
||||
- const: iface
|
||||
|
||||
clocks:
|
||||
items:
|
||||
- description: Bus Clock.
|
||||
- description: Bus A Clock.
|
||||
- description: CPU-NoC High-performance Bus Clock.
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,msm8996-a0noc
|
||||
|
||||
then:
|
||||
properties:
|
||||
clock-names:
|
||||
items:
|
||||
- const: aggre0_snoc_axi
|
||||
- const: aggre0_cnoc_ahb
|
||||
- const: aggre0_noc_mpu_cfg
|
||||
|
||||
clocks:
|
||||
items:
|
||||
- description: Aggregate0 System NoC AXI Clock.
|
||||
- description: Aggregate0 Config NoC AHB Clock.
|
||||
- description: Aggregate0 NoC MPU Clock.
|
||||
|
||||
required:
|
||||
- power-domains
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,sdm660-a2noc
|
||||
|
||||
then:
|
||||
properties:
|
||||
clock-names:
|
||||
items:
|
||||
- const: bus
|
||||
- const: bus_a
|
||||
- const: ipa
|
||||
- const: ufs_axi
|
||||
- const: aggre2_ufs_axi
|
||||
- const: aggre2_usb3_axi
|
||||
- const: cfg_noc_usb2_axi
|
||||
|
||||
clocks:
|
||||
items:
|
||||
- description: Bus Clock.
|
||||
- description: Bus A Clock.
|
||||
- description: IPA Clock.
|
||||
- description: UFS AXI Clock.
|
||||
- description: Aggregate2 UFS AXI Clock.
|
||||
- description: Aggregate2 USB3 AXI Clock.
|
||||
- description: Config NoC USB2 AXI Clock.
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/qcom,rpmcc.h>
|
||||
|
|
|
|||
|
|
@ -104,6 +104,17 @@ properties:
|
|||
- qcom,sm8350-mmss-noc
|
||||
- qcom,sm8350-compute-noc
|
||||
- qcom,sm8350-system-noc
|
||||
- qcom,sm8450-aggre1-noc
|
||||
- qcom,sm8450-aggre2-noc
|
||||
- qcom,sm8450-clk-virt
|
||||
- qcom,sm8450-config-noc
|
||||
- qcom,sm8450-gem-noc
|
||||
- qcom,sm8450-lpass-ag-noc
|
||||
- qcom,sm8450-mc-virt
|
||||
- qcom,sm8450-mmss-noc
|
||||
- qcom,sm8450-nsp-noc
|
||||
- qcom,sm8450-pcie-anoc
|
||||
- qcom,sm8450-system-noc
|
||||
|
||||
'#interconnect-cells':
|
||||
enum: [ 1, 2 ]
|
||||
|
|
|
|||
|
|
@ -1,185 +0,0 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/interconnect/qcom,sdm660.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Qualcomm SDM660 Network-On-Chip interconnect
|
||||
|
||||
maintainers:
|
||||
- AngeloGioacchino Del Regno <kholk11@gmail.com>
|
||||
|
||||
description: |
|
||||
The Qualcomm SDM660 interconnect providers support adjusting the
|
||||
bandwidth requirements between the various NoC fabrics.
|
||||
|
||||
properties:
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
compatible:
|
||||
enum:
|
||||
- qcom,sdm660-a2noc
|
||||
- qcom,sdm660-bimc
|
||||
- qcom,sdm660-cnoc
|
||||
- qcom,sdm660-gnoc
|
||||
- qcom,sdm660-mnoc
|
||||
- qcom,sdm660-snoc
|
||||
|
||||
'#interconnect-cells':
|
||||
const: 1
|
||||
|
||||
clocks:
|
||||
minItems: 1
|
||||
maxItems: 7
|
||||
|
||||
clock-names:
|
||||
minItems: 1
|
||||
maxItems: 7
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- '#interconnect-cells'
|
||||
- clock-names
|
||||
- clocks
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
allOf:
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,sdm660-mnoc
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
items:
|
||||
- description: Bus Clock.
|
||||
- description: Bus A Clock.
|
||||
- description: CPU-NoC High-performance Bus Clock.
|
||||
clock-names:
|
||||
items:
|
||||
- const: bus
|
||||
- const: bus_a
|
||||
- const: iface
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,sdm660-a2noc
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
items:
|
||||
- description: Bus Clock.
|
||||
- description: Bus A Clock.
|
||||
- description: IPA Clock.
|
||||
- description: UFS AXI Clock.
|
||||
- description: Aggregate2 UFS AXI Clock.
|
||||
- description: Aggregate2 USB3 AXI Clock.
|
||||
- description: Config NoC USB2 AXI Clock.
|
||||
clock-names:
|
||||
items:
|
||||
- const: bus
|
||||
- const: bus_a
|
||||
- const: ipa
|
||||
- const: ufs_axi
|
||||
- const: aggre2_ufs_axi
|
||||
- const: aggre2_usb3_axi
|
||||
- const: cfg_noc_usb2_axi
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,sdm660-bimc
|
||||
- qcom,sdm660-cnoc
|
||||
- qcom,sdm660-gnoc
|
||||
- qcom,sdm660-snoc
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
items:
|
||||
- description: Bus Clock.
|
||||
- description: Bus A Clock.
|
||||
clock-names:
|
||||
items:
|
||||
- const: bus
|
||||
- const: bus_a
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/qcom,rpmcc.h>
|
||||
#include <dt-bindings/clock/qcom,mmcc-sdm660.h>
|
||||
#include <dt-bindings/clock/qcom,gcc-sdm660.h>
|
||||
|
||||
bimc: interconnect@1008000 {
|
||||
compatible = "qcom,sdm660-bimc";
|
||||
reg = <0x01008000 0x78000>;
|
||||
#interconnect-cells = <1>;
|
||||
clock-names = "bus", "bus_a";
|
||||
clocks = <&rpmcc RPM_SMD_BIMC_CLK>,
|
||||
<&rpmcc RPM_SMD_BIMC_A_CLK>;
|
||||
};
|
||||
|
||||
cnoc: interconnect@1500000 {
|
||||
compatible = "qcom,sdm660-cnoc";
|
||||
reg = <0x01500000 0x10000>;
|
||||
#interconnect-cells = <1>;
|
||||
clock-names = "bus", "bus_a";
|
||||
clocks = <&rpmcc RPM_SMD_CNOC_CLK>,
|
||||
<&rpmcc RPM_SMD_CNOC_A_CLK>;
|
||||
};
|
||||
|
||||
snoc: interconnect@1626000 {
|
||||
compatible = "qcom,sdm660-snoc";
|
||||
reg = <0x01626000 0x7090>;
|
||||
#interconnect-cells = <1>;
|
||||
clock-names = "bus", "bus_a";
|
||||
clocks = <&rpmcc RPM_SMD_SNOC_CLK>,
|
||||
<&rpmcc RPM_SMD_SNOC_A_CLK>;
|
||||
};
|
||||
|
||||
a2noc: interconnect@1704000 {
|
||||
compatible = "qcom,sdm660-a2noc";
|
||||
reg = <0x01704000 0xc100>;
|
||||
#interconnect-cells = <1>;
|
||||
clock-names = "bus",
|
||||
"bus_a",
|
||||
"ipa",
|
||||
"ufs_axi",
|
||||
"aggre2_ufs_axi",
|
||||
"aggre2_usb3_axi",
|
||||
"cfg_noc_usb2_axi";
|
||||
clocks = <&rpmcc RPM_SMD_AGGR2_NOC_CLK>,
|
||||
<&rpmcc RPM_SMD_AGGR2_NOC_A_CLK>,
|
||||
<&rpmcc RPM_SMD_IPA_CLK>,
|
||||
<&gcc GCC_UFS_AXI_CLK>,
|
||||
<&gcc GCC_AGGRE2_UFS_AXI_CLK>,
|
||||
<&gcc GCC_AGGRE2_USB3_AXI_CLK>,
|
||||
<&gcc GCC_CFG_NOC_USB2_AXI_CLK>;
|
||||
};
|
||||
|
||||
mnoc: interconnect@1745000 {
|
||||
compatible = "qcom,sdm660-mnoc";
|
||||
reg = <0x01745000 0xa010>;
|
||||
#interconnect-cells = <1>;
|
||||
clock-names = "bus", "bus_a", "iface";
|
||||
clocks = <&rpmcc RPM_SMD_MMSSNOC_AXI_CLK>,
|
||||
<&rpmcc RPM_SMD_MMSSNOC_AXI_CLK_A>,
|
||||
<&mmcc AHB_CLK_SRC>;
|
||||
};
|
||||
|
||||
gnoc: interconnect@17900000 {
|
||||
compatible = "qcom,sdm660-gnoc";
|
||||
reg = <0x17900000 0xe000>;
|
||||
#interconnect-cells = <1>;
|
||||
clock-names = "bus", "bus_a";
|
||||
clocks = <&xo_board>, <&xo_board>;
|
||||
};
|
||||
|
|
@ -26,7 +26,10 @@ properties:
|
|||
List of gpios used to control the multiplexer, least significant bit first.
|
||||
|
||||
'#mux-control-cells':
|
||||
const: 0
|
||||
enum: [ 0, 1 ]
|
||||
|
||||
'#mux-state-cells':
|
||||
enum: [ 1, 2 ]
|
||||
|
||||
idle-state:
|
||||
default: -1
|
||||
|
|
@ -34,7 +37,11 @@ properties:
|
|||
required:
|
||||
- compatible
|
||||
- mux-gpios
|
||||
- "#mux-control-cells"
|
||||
anyOf:
|
||||
- required:
|
||||
- "#mux-control-cells"
|
||||
- required:
|
||||
- "#mux-state-cells"
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
|
|
|
|||
|
|
@ -25,6 +25,17 @@ description: |
|
|||
strings to label each of the mux controllers listed in the "mux-controls"
|
||||
property.
|
||||
|
||||
If it is required to provide the state that the mux controller needs to
|
||||
be set to, the property "mux-states" must be used. An optional property
|
||||
"mux-state-names" can be used to provide a list of strings, to label
|
||||
each of the multiplixer states listed in the "mux-states" property.
|
||||
|
||||
Properties "mux-controls" and "mux-states" can be used depending on how
|
||||
the consumers want to control the mux controller. If the consumer needs
|
||||
needs to set multiple states in a mux controller, then property
|
||||
"mux-controls" can be used. If the consumer needs to set the mux
|
||||
controller to a given state then property "mux-states" can be used.
|
||||
|
||||
mux-ctrl-specifier typically encodes the chip-relative mux controller number.
|
||||
If the mux controller chip only provides a single mux controller, the
|
||||
mux-ctrl-specifier can typically be left out.
|
||||
|
|
@ -35,12 +46,22 @@ properties:
|
|||
mux-controls:
|
||||
$ref: /schemas/types.yaml#/definitions/phandle-array
|
||||
|
||||
mux-states:
|
||||
$ref: /schemas/types.yaml#/definitions/phandle-array
|
||||
|
||||
mux-control-names:
|
||||
description:
|
||||
Devices that use more than a single mux controller can use the
|
||||
"mux-control-names" property to map the name of the requested mux
|
||||
controller to an index into the list given by the "mux-controls" property.
|
||||
|
||||
mux-state-names:
|
||||
description:
|
||||
Devices that use more than a single multiplexer state can use the
|
||||
"mux-state-names" property to map the name of the requested mux
|
||||
controller to an index into the list given by the "mux-states"
|
||||
property.
|
||||
|
||||
additionalProperties: true
|
||||
|
||||
...
|
||||
|
|
|
|||
|
|
@ -25,7 +25,9 @@ description: |
|
|||
--------------------
|
||||
|
||||
Mux controller nodes must specify the number of cells used for the
|
||||
specifier using the '#mux-control-cells' property.
|
||||
specifier using the '#mux-control-cells' or '#mux-state-cells' property.
|
||||
The value of '#mux-state-cells' will always be one greater than the value
|
||||
of '#mux-control-cells'.
|
||||
|
||||
Optionally, mux controller nodes can also specify the state the mux should
|
||||
have when it is idle. The idle-state property is used for this. If the
|
||||
|
|
@ -67,6 +69,8 @@ select:
|
|||
pattern: '^mux-controller'
|
||||
- required:
|
||||
- '#mux-control-cells'
|
||||
- required:
|
||||
- '#mux-state-cells'
|
||||
|
||||
properties:
|
||||
$nodename:
|
||||
|
|
@ -75,6 +79,9 @@ properties:
|
|||
'#mux-control-cells':
|
||||
enum: [ 0, 1 ]
|
||||
|
||||
'#mux-state-cells':
|
||||
enum: [ 1, 2 ]
|
||||
|
||||
idle-state:
|
||||
$ref: /schemas/types.yaml#/definitions/int32
|
||||
minimum: -2
|
||||
|
|
@ -179,4 +186,21 @@ examples:
|
|||
};
|
||||
};
|
||||
};
|
||||
|
||||
- |
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
|
||||
mux1: mux-controller {
|
||||
compatible = "gpio-mux";
|
||||
#mux-state-cells = <1>;
|
||||
mux-gpios = <&exp_som 2 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
transceiver4: can-phy4 {
|
||||
compatible = "ti,tcan1042";
|
||||
#phy-cells = <0>;
|
||||
max-bitrate = <5000000>;
|
||||
standby-gpios = <&exp_som 7 GPIO_ACTIVE_HIGH>;
|
||||
mux-states = <&mux1 1>;
|
||||
};
|
||||
...
|
||||
|
|
|
|||
|
|
@ -24,6 +24,9 @@ properties:
|
|||
compatible:
|
||||
const: brcm,nvram
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
|
|
|
|||
|
|
@ -8,8 +8,10 @@ Required properties:
|
|||
"mediatek,mt7623-efuse", "mediatek,efuse": for MT7623
|
||||
"mediatek,mt8173-efuse" or "mediatek,efuse": for MT8173
|
||||
"mediatek,mt8192-efuse", "mediatek,efuse": for MT8192
|
||||
"mediatek,mt8195-efuse", "mediatek,efuse": for MT8195
|
||||
"mediatek,mt8516-efuse", "mediatek,efuse": for MT8516
|
||||
- reg: Should contain registers location and length
|
||||
- bits: contain the bits range by offset and size
|
||||
|
||||
= Data cells =
|
||||
Are child nodes of MTK-EFUSE, bindings of which as described in
|
||||
|
|
|
|||
|
|
@ -19,6 +19,9 @@ properties:
|
|||
- raspberrypi,bootloader-config
|
||||
- const: nvmem-rmem
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
no-map:
|
||||
$ref: /schemas/types.yaml#/definitions/flag
|
||||
description:
|
||||
|
|
|
|||
|
|
@ -24,6 +24,9 @@ properties:
|
|||
- st,stm32f4-otp
|
||||
- st,stm32mp15-bsec
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
patternProperties:
|
||||
"^.*@[0-9a-f]+$":
|
||||
type: object
|
||||
|
|
|
|||
|
|
@ -0,0 +1,65 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: "http://devicetree.org/schemas/phy/amlogic,meson8-hdmi-tx-phy.yaml#"
|
||||
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
||||
|
||||
title: Amlogic Meson8, Meson8b and Meson8m2 HDMI TX PHY
|
||||
|
||||
maintainers:
|
||||
- Martin Blumenstingl <martin.blumenstingl@googlemail.com>
|
||||
|
||||
description: |+
|
||||
The HDMI TX PHY node should be the child of a syscon node with the
|
||||
required property:
|
||||
|
||||
compatible = "amlogic,meson-hhi-sysctrl", "simple-mfd", "syscon"
|
||||
|
||||
Refer to the bindings described in
|
||||
Documentation/devicetree/bindings/mfd/syscon.yaml
|
||||
|
||||
properties:
|
||||
$nodename:
|
||||
pattern: "^hdmi-phy@[0-9a-f]+$"
|
||||
|
||||
compatible:
|
||||
oneOf:
|
||||
- items:
|
||||
- enum:
|
||||
- amlogic,meson8b-hdmi-tx-phy
|
||||
- amlogic,meson8m2-hdmi-tx-phy
|
||||
- const: amlogic,meson8-hdmi-tx-phy
|
||||
- const: amlogic,meson8-hdmi-tx-phy
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
minItems: 1
|
||||
description:
|
||||
HDMI TMDS clock
|
||||
|
||||
"#phy-cells":
|
||||
const: 0
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- "#phy-cells"
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
hdmi-phy@3a0 {
|
||||
compatible = "amlogic,meson8-hdmi-tx-phy";
|
||||
reg = <0x3a0 0xc>;
|
||||
clocks = <&tmds_clock>;
|
||||
#phy-cells = <0>;
|
||||
};
|
||||
- |
|
||||
hdmi-phy@3a0 {
|
||||
compatible = "amlogic,meson8b-hdmi-tx-phy", "amlogic,meson8-hdmi-tx-phy";
|
||||
reg = <0x3a0 0xc>;
|
||||
clocks = <&tmds_clock>;
|
||||
#phy-cells = <0>;
|
||||
};
|
||||
|
|
@ -0,0 +1,92 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/phy/fsl,imx8-pcie-phy.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Freescale i.MX8 SoC series PCIe PHY Device Tree Bindings
|
||||
|
||||
maintainers:
|
||||
- Richard Zhu <hongxing.zhu@nxp.com>
|
||||
|
||||
properties:
|
||||
"#phy-cells":
|
||||
const: 0
|
||||
|
||||
compatible:
|
||||
enum:
|
||||
- fsl,imx8mm-pcie-phy
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: ref
|
||||
|
||||
resets:
|
||||
maxItems: 1
|
||||
|
||||
reset-names:
|
||||
items:
|
||||
- const: pciephy
|
||||
|
||||
fsl,refclk-pad-mode:
|
||||
description: |
|
||||
Specifies the mode of the refclk pad used. It can be UNUSED(PHY
|
||||
refclock is derived from SoC internal source), INPUT(PHY refclock
|
||||
is provided externally via the refclk pad) or OUTPUT(PHY refclock
|
||||
is derived from SoC internal source and provided on the refclk pad).
|
||||
Refer include/dt-bindings/phy/phy-imx8-pcie.h for the constants
|
||||
to be used.
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
enum: [ 0, 1, 2 ]
|
||||
|
||||
fsl,tx-deemph-gen1:
|
||||
description: Gen1 De-emphasis value (optional).
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
default: 0
|
||||
|
||||
fsl,tx-deemph-gen2:
|
||||
description: Gen2 De-emphasis value (optional).
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
default: 0
|
||||
|
||||
fsl,clkreq-unsupported:
|
||||
type: boolean
|
||||
description: A boolean property indicating the CLKREQ# signal is
|
||||
not supported in the board design (optional)
|
||||
|
||||
required:
|
||||
- "#phy-cells"
|
||||
- compatible
|
||||
- reg
|
||||
- clocks
|
||||
- clock-names
|
||||
- fsl,refclk-pad-mode
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/imx8mm-clock.h>
|
||||
#include <dt-bindings/phy/phy-imx8-pcie.h>
|
||||
#include <dt-bindings/reset/imx8mq-reset.h>
|
||||
|
||||
pcie_phy: pcie-phy@32f00000 {
|
||||
compatible = "fsl,imx8mm-pcie-phy";
|
||||
reg = <0x32f00000 0x10000>;
|
||||
clocks = <&clk IMX8MM_CLK_PCIE1_PHY>;
|
||||
clock-names = "ref";
|
||||
assigned-clocks = <&clk IMX8MM_CLK_PCIE1_PHY>;
|
||||
assigned-clock-rates = <100000000>;
|
||||
assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_100M>;
|
||||
resets = <&src IMX8MQ_RESET_PCIEPHY>;
|
||||
reset-names = "pciephy";
|
||||
fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>;
|
||||
#phy-cells = <0>;
|
||||
};
|
||||
...
|
||||
|
|
@ -0,0 +1,46 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/phy/intel,phy-thunderbay-emmc.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Intel Thunder Bay eMMC PHY bindings
|
||||
|
||||
maintainers:
|
||||
- Srikandan Nandhini <nandhini.srikandan@intel.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: intel,thunderbay-emmc-phy
|
||||
|
||||
"#phy-cells":
|
||||
const: 0
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: emmcclk
|
||||
|
||||
required:
|
||||
- "#phy-cells"
|
||||
- compatible
|
||||
- reg
|
||||
- clocks
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
mmc_phy@80440800 {
|
||||
#phy-cells = <0x0>;
|
||||
compatible = "intel,thunderbay-emmc-phy";
|
||||
status = "okay";
|
||||
reg = <0x80440800 0x100>;
|
||||
clocks = <&emmc>;
|
||||
clock-names = "emmcclk";
|
||||
};
|
||||
|
|
@ -160,6 +160,24 @@ patternProperties:
|
|||
- PHY_TYPE_PCIE
|
||||
- PHY_TYPE_SATA
|
||||
|
||||
nvmem-cells:
|
||||
items:
|
||||
- description: internal R efuse for U2 PHY or U3/PCIe PHY
|
||||
- description: rx_imp_sel efuse for U3/PCIe PHY
|
||||
- description: tx_imp_sel efuse for U3/PCIe PHY
|
||||
description: |
|
||||
Phandles to nvmem cell that contains the efuse data;
|
||||
Available only for U2 PHY or U3/PCIe PHY of version 2/3, these
|
||||
three items should be provided at the same time for U3/PCIe PHY,
|
||||
when use software to load efuse;
|
||||
If unspecified, will use hardware auto-load efuse.
|
||||
|
||||
nvmem-cell-names:
|
||||
items:
|
||||
- const: intr
|
||||
- const: rx_imp
|
||||
- const: tx_imp
|
||||
|
||||
# The following optional vendor properties are only for debug or HQA test
|
||||
mediatek,eye-src:
|
||||
description:
|
||||
|
|
|
|||
|
|
@ -0,0 +1,59 @@
|
|||
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/phy/microchip,lan966x-serdes.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Microchip Lan966x Serdes controller
|
||||
|
||||
maintainers:
|
||||
- Horatiu Vultur <horatiu.vultur@microchip.com>
|
||||
|
||||
description: |
|
||||
Lan966x has 7 interfaces, consisting of 2 copper transceivers(CU),
|
||||
3 SERDES6G and 2 RGMII interfaces. Two of the SERDES6G support QSGMII.
|
||||
Also it has 8 logical Ethernet ports which can be connected to these
|
||||
interfaces. The Serdes controller will allow to configure these interfaces
|
||||
and allows to "mux" the interfaces to different ports.
|
||||
|
||||
For simple selection of the interface that is used with a port, the
|
||||
following macros are defined CU(X), SERDES6G(X), RGMII(X). Where X is a
|
||||
number that represents the index of that interface type. For example
|
||||
CU(1) means use interface copper transceivers 1. SERDES6G(2) means use
|
||||
interface SerDes 2.
|
||||
|
||||
properties:
|
||||
$nodename:
|
||||
pattern: "^serdes@[0-9a-f]+$"
|
||||
|
||||
compatible:
|
||||
const: microchip,lan966x-serdes
|
||||
|
||||
reg:
|
||||
items:
|
||||
- description: HSIO registers
|
||||
- description: HW_STAT register
|
||||
|
||||
'#phy-cells':
|
||||
const: 2
|
||||
description: |
|
||||
- Input port to use for a given macro.
|
||||
- The macro to be used. The macros are defined in
|
||||
dt-bindings/phy/phy-lan966x-serdes.
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- '#phy-cells'
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
serdes: serdes@e2004010 {
|
||||
compatible = "microchip,lan966x-serdes";
|
||||
reg = <0xe202c000 0x9c>, <0xe2004010 0x4>;
|
||||
#phy-cells = <2>;
|
||||
};
|
||||
|
||||
...
|
||||
|
|
@ -113,6 +113,15 @@ patternProperties:
|
|||
minimum: 1
|
||||
maximum: 16
|
||||
|
||||
cdns,ssc-mode:
|
||||
description:
|
||||
Specifies the Spread Spectrum Clocking mode used. It can be NO_SSC,
|
||||
EXTERNAL_SSC or INTERNAL_SSC.
|
||||
Refer include/dt-bindings/phy/phy-cadence.h for the constants to be used.
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
enum: [0, 1, 2]
|
||||
default: 1
|
||||
|
||||
required:
|
||||
- reg
|
||||
- resets
|
||||
|
|
|
|||
|
|
@ -202,7 +202,7 @@ examples:
|
|||
#phy-cells = <0>;
|
||||
cdns,phy-type = <PHY_TYPE_PCIE>;
|
||||
cdns,num-lanes = <2>;
|
||||
cdns,ssc-mode = <TORRENT_SERDES_NO_SSC>;
|
||||
cdns,ssc-mode = <CDNS_SERDES_NO_SSC>;
|
||||
};
|
||||
|
||||
phy@2 {
|
||||
|
|
@ -211,7 +211,7 @@ examples:
|
|||
#phy-cells = <0>;
|
||||
cdns,phy-type = <PHY_TYPE_SGMII>;
|
||||
cdns,num-lanes = <1>;
|
||||
cdns,ssc-mode = <TORRENT_SERDES_NO_SSC>;
|
||||
cdns,ssc-mode = <CDNS_SERDES_NO_SSC>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -18,6 +18,7 @@ properties:
|
|||
- rockchip,rk3328-usb2phy
|
||||
- rockchip,rk3366-usb2phy
|
||||
- rockchip,rk3399-usb2phy
|
||||
- rockchip,rk3568-usb2phy
|
||||
- rockchip,rv1108-usb2phy
|
||||
|
||||
reg:
|
||||
|
|
@ -50,6 +51,10 @@ properties:
|
|||
description:
|
||||
Phandle to the extcon device providing the cable state for the otg phy.
|
||||
|
||||
interrupts:
|
||||
description: Muxed interrupt for both ports
|
||||
maxItems: 1
|
||||
|
||||
rockchip,usbgrf:
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
description:
|
||||
|
|
@ -67,6 +72,7 @@ properties:
|
|||
|
||||
interrupts:
|
||||
description: host linestate interrupt
|
||||
maxItems: 1
|
||||
|
||||
interrupt-names:
|
||||
const: linestate
|
||||
|
|
@ -78,8 +84,6 @@ properties:
|
|||
|
||||
required:
|
||||
- "#phy-cells"
|
||||
- interrupts
|
||||
- interrupt-names
|
||||
|
||||
otg-port:
|
||||
type: object
|
||||
|
|
@ -109,8 +113,6 @@ properties:
|
|||
|
||||
required:
|
||||
- "#phy-cells"
|
||||
- interrupts
|
||||
- interrupt-names
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
|
@ -120,6 +122,40 @@ required:
|
|||
- host-port
|
||||
- otg-port
|
||||
|
||||
allOf:
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: rockchip,rk3568-usb2phy
|
||||
|
||||
then:
|
||||
properties:
|
||||
host-port:
|
||||
properties:
|
||||
interrupts: false
|
||||
|
||||
otg-port:
|
||||
properties:
|
||||
interrupts: false
|
||||
|
||||
required:
|
||||
- interrupts
|
||||
|
||||
else:
|
||||
properties:
|
||||
interrupts: false
|
||||
|
||||
host-port:
|
||||
required:
|
||||
- interrupts
|
||||
- interrupt-names
|
||||
|
||||
otg-port:
|
||||
required:
|
||||
- interrupts
|
||||
- interrupt-names
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
|
|
|
|||
|
|
@ -1,28 +0,0 @@
|
|||
NVIDIA Tegra194 P2U binding
|
||||
|
||||
Tegra194 has two PHY bricks namely HSIO (High Speed IO) and NVHS (NVIDIA High
|
||||
Speed) each interfacing with 12 and 8 P2U instances respectively.
|
||||
A P2U instance is a glue logic between Synopsys DesignWare Core PCIe IP's PIPE
|
||||
interface and PHY of HSIO/NVHS bricks. Each P2U instance represents one PCIe
|
||||
lane.
|
||||
|
||||
Required properties:
|
||||
- compatible: For Tegra19x, must contain "nvidia,tegra194-p2u".
|
||||
- reg: Should be the physical address space and length of respective each P2U
|
||||
instance.
|
||||
- reg-names: Must include the entry "ctl".
|
||||
|
||||
Required properties for PHY port node:
|
||||
- #phy-cells: Defined by generic PHY bindings. Must be 0.
|
||||
|
||||
Refer to phy/phy-bindings.txt for the generic PHY binding properties.
|
||||
|
||||
Example:
|
||||
|
||||
p2u_hsio_0: phy@3e10000 {
|
||||
compatible = "nvidia,tegra194-p2u";
|
||||
reg = <0x03e10000 0x10000>;
|
||||
reg-names = "ctl";
|
||||
|
||||
#phy-cells = <0>;
|
||||
};
|
||||
|
|
@ -0,0 +1,44 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: "http://devicetree.org/schemas/phy/phy-tegra194-p2u.yaml#"
|
||||
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
||||
|
||||
title: NVIDIA Tegra194 P2U binding
|
||||
|
||||
maintainers:
|
||||
- Thierry Reding <treding@nvidia.com>
|
||||
|
||||
description: >
|
||||
Tegra194 has two PHY bricks namely HSIO (High Speed IO) and NVHS (NVIDIA High
|
||||
Speed) each interfacing with 12 and 8 P2U instances respectively.
|
||||
A P2U instance is a glue logic between Synopsys DesignWare Core PCIe IP's PIPE
|
||||
interface and PHY of HSIO/NVHS bricks. Each P2U instance represents one PCIe
|
||||
lane.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: nvidia,tegra194-p2u
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
description: Should be the physical address space and length of respective each P2U instance.
|
||||
|
||||
reg-names:
|
||||
items:
|
||||
- const: ctl
|
||||
|
||||
'#phy-cells':
|
||||
const: 0
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
p2u_hsio_0: phy@3e10000 {
|
||||
compatible = "nvidia,tegra194-p2u";
|
||||
reg = <0x03e10000 0x10000>;
|
||||
reg-names = "ctl";
|
||||
|
||||
#phy-cells = <0>;
|
||||
};
|
||||
|
|
@ -0,0 +1,67 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: "http://devicetree.org/schemas/phy/qcom,edp-phy.yaml#"
|
||||
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
||||
|
||||
title: Qualcomm eDP PHY
|
||||
|
||||
maintainers:
|
||||
- Bjorn Andersson <bjorn.andersson@linaro.org>
|
||||
|
||||
description:
|
||||
The Qualcomm eDP PHY is found in a number of Qualcomm platform and provides
|
||||
the physical interface for Embedded Display Port.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: qcom,sc8180x-edp-phy
|
||||
|
||||
reg:
|
||||
items:
|
||||
- description: PHY base register block
|
||||
- description: tx0 register block
|
||||
- description: tx1 register block
|
||||
- description: PLL register block
|
||||
|
||||
clocks:
|
||||
maxItems: 2
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: aux
|
||||
- const: cfg_ahb
|
||||
|
||||
"#clock-cells":
|
||||
const: 1
|
||||
|
||||
"#phy-cells":
|
||||
const: 0
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- clocks
|
||||
- clock-names
|
||||
- "#clock-cells"
|
||||
- "#phy-cells"
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
phy@aec2a00 {
|
||||
compatible = "qcom,sc8180x-edp-phy";
|
||||
reg = <0x0aec2a00 0x1c0>,
|
||||
<0x0aec2200 0xa0>,
|
||||
<0x0aec2600 0xa0>,
|
||||
<0x0aec2000 0x19c>;
|
||||
|
||||
clocks = <&dispcc 0>, <&dispcc 1>;
|
||||
clock-names = "aux", "cfg_ahb";
|
||||
|
||||
#clock-cells = <1>;
|
||||
#phy-cells = <0>;
|
||||
};
|
||||
...
|
||||
|
|
@ -50,6 +50,10 @@ properties:
|
|||
- qcom,sm8350-qmp-ufs-phy
|
||||
- qcom,sm8350-qmp-usb3-phy
|
||||
- qcom,sm8350-qmp-usb3-uni-phy
|
||||
- qcom,sm8450-qmp-gen3x1-pcie-phy
|
||||
- qcom,sm8450-qmp-gen4x2-pcie-phy
|
||||
- qcom,sm8450-qmp-ufs-phy
|
||||
- qcom,sm8450-qmp-usb3-phy
|
||||
- qcom,sdx55-qmp-pcie-phy
|
||||
- qcom,sdx55-qmp-usb3-uni-phy
|
||||
|
||||
|
|
@ -332,6 +336,8 @@ allOf:
|
|||
- qcom,sm8250-qmp-gen3x1-pcie-phy
|
||||
- qcom,sm8250-qmp-gen3x2-pcie-phy
|
||||
- qcom,sm8250-qmp-modem-pcie-phy
|
||||
- qcom,sm8450-qmp-gen3x1-pcie-phy
|
||||
- qcom,sm8450-qmp-gen4x2-pcie-phy
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
|
|
|
|||
|
|
@ -30,6 +30,7 @@ properties:
|
|||
- enum:
|
||||
- qcom,sc7180-qusb2-phy
|
||||
- qcom,sdm845-qusb2-phy
|
||||
- qcom,sm6350-qusb2-phy
|
||||
- const: qcom,qusb2-v2-phy
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
|
|
|||
|
|
@ -20,6 +20,7 @@ properties:
|
|||
- qcom,sm8150-usb-hs-phy
|
||||
- qcom,sm8250-usb-hs-phy
|
||||
- qcom,sm8350-usb-hs-phy
|
||||
- qcom,sm8450-usb-hs-phy
|
||||
- qcom,usb-snps-femto-v2-phy
|
||||
|
||||
reg:
|
||||
|
|
|
|||
|
|
@ -16,6 +16,7 @@ maintainers:
|
|||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- socionext,uniphier-pro4-ahci-phy
|
||||
- socionext,uniphier-pxs2-ahci-phy
|
||||
- socionext,uniphier-pxs3-ahci-phy
|
||||
|
||||
|
|
@ -26,23 +27,35 @@ properties:
|
|||
const: 0
|
||||
|
||||
clocks:
|
||||
minItems: 1
|
||||
maxItems: 2
|
||||
|
||||
clock-names:
|
||||
oneOf:
|
||||
- items: # for PXs2
|
||||
- const: link
|
||||
- items: # for Pro4
|
||||
- const: link
|
||||
- const: gio
|
||||
- items: # for others
|
||||
- const: link
|
||||
- const: phy
|
||||
|
||||
resets:
|
||||
maxItems: 2
|
||||
minItems: 2
|
||||
maxItems: 5
|
||||
|
||||
reset-names:
|
||||
items:
|
||||
- const: link
|
||||
- const: phy
|
||||
oneOf:
|
||||
- items: # for Pro4
|
||||
- const: link
|
||||
- const: gio
|
||||
- const: pm
|
||||
- const: tx
|
||||
- const: rx
|
||||
- items: # for others
|
||||
- const: link
|
||||
- const: phy
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
|
|
|||
|
|
@ -19,6 +19,7 @@ properties:
|
|||
- socionext,uniphier-pro5-pcie-phy
|
||||
- socionext,uniphier-ld20-pcie-phy
|
||||
- socionext,uniphier-pxs3-pcie-phy
|
||||
- socionext,uniphier-nx1-pcie-phy
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
|
|
|||
|
|
@ -22,6 +22,7 @@ properties:
|
|||
- socionext,uniphier-pxs2-usb3-hsphy
|
||||
- socionext,uniphier-ld20-usb3-hsphy
|
||||
- socionext,uniphier-pxs3-usb3-hsphy
|
||||
- socionext,uniphier-nx1-usb3-hsphy
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
|
|
|||
|
|
@ -23,6 +23,7 @@ properties:
|
|||
- socionext,uniphier-pxs2-usb3-ssphy
|
||||
- socionext,uniphier-ld20-usb3-ssphy
|
||||
- socionext,uniphier-pxs3-usb3-ssphy
|
||||
- socionext,uniphier-nx1-usb3-ssphy
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
|
|
|||
|
|
@ -0,0 +1,76 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/spmi/mtk,spmi-mtk-pmif.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Mediatek SPMI Controller Device Tree Bindings
|
||||
|
||||
maintainers:
|
||||
- Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>
|
||||
|
||||
description: |+
|
||||
On MediaTek SoCs the PMIC is connected via SPMI and the controller allows
|
||||
for multiple SoCs to control a single SPMI master.
|
||||
|
||||
allOf:
|
||||
- $ref: "spmi.yaml"
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- mediatek,mt6873-spmi
|
||||
- mediatek,mt8195-spmi
|
||||
|
||||
reg:
|
||||
maxItems: 2
|
||||
|
||||
reg-names:
|
||||
items:
|
||||
- const: pmif
|
||||
- const: spmimst
|
||||
|
||||
clocks:
|
||||
minItems: 3
|
||||
maxItems: 3
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: pmif_sys_ck
|
||||
- const: pmif_tmr_ck
|
||||
- const: spmimst_clk_mux
|
||||
|
||||
assigned-clocks:
|
||||
maxItems: 1
|
||||
|
||||
assigned-clock-parents:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- reg-names
|
||||
- clocks
|
||||
- clock-names
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/mt8192-clk.h>
|
||||
|
||||
spmi: spmi@10027000 {
|
||||
compatible = "mediatek,mt6873-spmi";
|
||||
reg = <0x10027000 0xe00>,
|
||||
<0x10029000 0x100>;
|
||||
reg-names = "pmif", "spmimst";
|
||||
clocks = <&infracfg CLK_INFRA_PMIC_AP>,
|
||||
<&infracfg CLK_INFRA_PMIC_TMR>,
|
||||
<&topckgen CLK_TOP_SPMI_MST_SEL>;
|
||||
clock-names = "pmif_sys_ck",
|
||||
"pmif_tmr_ck",
|
||||
"spmimst_clk_mux";
|
||||
assigned-clocks = <&topckgen CLK_TOP_PWRAP_ULPOSC_SEL>;
|
||||
assigned-clock-parents = <&topckgen CLK_TOP_OSC_D10>;
|
||||
};
|
||||
...
|
||||
|
|
@ -24,9 +24,6 @@ properties:
|
|||
$nodename:
|
||||
pattern: "^spmi@.*"
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
"#address-cells":
|
||||
const: 2
|
||||
|
||||
|
|
|
|||
|
|
@ -16,6 +16,7 @@ Required properties:
|
|||
"qcom,sm8150-ufshc", "qcom,ufshc", "jedec,ufs-2.0"
|
||||
"qcom,sm8250-ufshc", "qcom,ufshc", "jedec,ufs-2.0"
|
||||
"qcom,sm8350-ufshc", "qcom,ufshc", "jedec,ufs-2.0"
|
||||
"qcom,sm8450-ufshc", "qcom,ufshc", "jedec,ufs-2.0"
|
||||
- interrupts : <interrupt mapping for UFS host controller IRQ>
|
||||
- reg : <registers mapping>
|
||||
|
||||
|
|
|
|||
|
|
@ -6,8 +6,7 @@ API to implement a new FPGA bridge
|
|||
|
||||
* struct fpga_bridge - The FPGA Bridge structure
|
||||
* struct fpga_bridge_ops - Low level Bridge driver ops
|
||||
* devm_fpga_bridge_create() - Allocate and init a bridge struct
|
||||
* fpga_bridge_register() - Register a bridge
|
||||
* fpga_bridge_register() - Create and register a bridge
|
||||
* fpga_bridge_unregister() - Unregister a bridge
|
||||
|
||||
.. kernel-doc:: include/linux/fpga/fpga-bridge.h
|
||||
|
|
@ -16,9 +15,6 @@ API to implement a new FPGA bridge
|
|||
.. kernel-doc:: include/linux/fpga/fpga-bridge.h
|
||||
:functions: fpga_bridge_ops
|
||||
|
||||
.. kernel-doc:: drivers/fpga/fpga-bridge.c
|
||||
:functions: devm_fpga_bridge_create
|
||||
|
||||
.. kernel-doc:: drivers/fpga/fpga-bridge.c
|
||||
:functions: fpga_bridge_register
|
||||
|
||||
|
|
|
|||
|
|
@ -24,7 +24,7 @@ How to support a new FPGA device
|
|||
--------------------------------
|
||||
|
||||
To add another FPGA manager, write a driver that implements a set of ops. The
|
||||
probe function calls fpga_mgr_register(), such as::
|
||||
probe function calls fpga_mgr_register() or fpga_mgr_register_full(), such as::
|
||||
|
||||
static const struct fpga_manager_ops socfpga_fpga_ops = {
|
||||
.write_init = socfpga_fpga_ops_configure_init,
|
||||
|
|
@ -49,14 +49,14 @@ probe function calls fpga_mgr_register(), such as::
|
|||
* them in priv
|
||||
*/
|
||||
|
||||
mgr = devm_fpga_mgr_create(dev, "Altera SOCFPGA FPGA Manager",
|
||||
&socfpga_fpga_ops, priv);
|
||||
if (!mgr)
|
||||
return -ENOMEM;
|
||||
mgr = fpga_mgr_register(dev, "Altera SOCFPGA FPGA Manager",
|
||||
&socfpga_fpga_ops, priv);
|
||||
if (IS_ERR(mgr))
|
||||
return PTR_ERR(mgr);
|
||||
|
||||
platform_set_drvdata(pdev, mgr);
|
||||
|
||||
return fpga_mgr_register(mgr);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int socfpga_fpga_remove(struct platform_device *pdev)
|
||||
|
|
@ -68,6 +68,11 @@ probe function calls fpga_mgr_register(), such as::
|
|||
return 0;
|
||||
}
|
||||
|
||||
Alternatively, the probe function could call one of the resource managed
|
||||
register functions, devm_fpga_mgr_register() or devm_fpga_mgr_register_full().
|
||||
When these functions are used, the parameter syntax is the same, but the call
|
||||
to fpga_mgr_unregister() should be removed. In the above example, the
|
||||
socfpga_fpga_remove() function would not be required.
|
||||
|
||||
The ops will implement whatever device specific register writes are needed to
|
||||
do the programming sequence for this particular FPGA. These ops return 0 for
|
||||
|
|
@ -104,8 +109,14 @@ API for implementing a new FPGA Manager driver
|
|||
* ``fpga_mgr_states`` - Values for :c:expr:`fpga_manager->state`.
|
||||
* struct fpga_manager - the FPGA manager struct
|
||||
* struct fpga_manager_ops - Low level FPGA manager driver ops
|
||||
* devm_fpga_mgr_create() - Allocate and init a manager struct
|
||||
* fpga_mgr_register() - Register an FPGA manager
|
||||
* struct fpga_manager_info - Parameter structure for fpga_mgr_register_full()
|
||||
* fpga_mgr_register_full() - Create and register an FPGA manager using the
|
||||
fpga_mgr_info structure to provide the full flexibility of options
|
||||
* fpga_mgr_register() - Create and register an FPGA manager using standard
|
||||
arguments
|
||||
* devm_fpga_mgr_register_full() - Resource managed version of
|
||||
fpga_mgr_register_full()
|
||||
* devm_fpga_mgr_register() - Resource managed version of fpga_mgr_register()
|
||||
* fpga_mgr_unregister() - Unregister an FPGA manager
|
||||
|
||||
.. kernel-doc:: include/linux/fpga/fpga-mgr.h
|
||||
|
|
@ -117,11 +128,20 @@ API for implementing a new FPGA Manager driver
|
|||
.. kernel-doc:: include/linux/fpga/fpga-mgr.h
|
||||
:functions: fpga_manager_ops
|
||||
|
||||
.. kernel-doc:: include/linux/fpga/fpga-mgr.h
|
||||
:functions: fpga_manager_info
|
||||
|
||||
.. kernel-doc:: drivers/fpga/fpga-mgr.c
|
||||
:functions: devm_fpga_mgr_create
|
||||
:functions: fpga_mgr_register_full
|
||||
|
||||
.. kernel-doc:: drivers/fpga/fpga-mgr.c
|
||||
:functions: fpga_mgr_register
|
||||
|
||||
.. kernel-doc:: drivers/fpga/fpga-mgr.c
|
||||
:functions: devm_fpga_mgr_register_full
|
||||
|
||||
.. kernel-doc:: drivers/fpga/fpga-mgr.c
|
||||
:functions: devm_fpga_mgr_register
|
||||
|
||||
.. kernel-doc:: drivers/fpga/fpga-mgr.c
|
||||
:functions: fpga_mgr_unregister
|
||||
|
|
|
|||
|
|
@ -46,8 +46,11 @@ API to add a new FPGA region
|
|||
----------------------------
|
||||
|
||||
* struct fpga_region - The FPGA region struct
|
||||
* devm_fpga_region_create() - Allocate and init a region struct
|
||||
* fpga_region_register() - Register an FPGA region
|
||||
* struct fpga_region_info - Parameter structure for fpga_region_register_full()
|
||||
* fpga_region_register_full() - Create and register an FPGA region using the
|
||||
fpga_region_info structure to provide the full flexibility of options
|
||||
* fpga_region_register() - Create and register an FPGA region using standard
|
||||
arguments
|
||||
* fpga_region_unregister() - Unregister an FPGA region
|
||||
|
||||
The FPGA region's probe function will need to get a reference to the FPGA
|
||||
|
|
@ -75,8 +78,11 @@ following APIs to handle building or tearing down that list.
|
|||
.. kernel-doc:: include/linux/fpga/fpga-region.h
|
||||
:functions: fpga_region
|
||||
|
||||
.. kernel-doc:: include/linux/fpga/fpga-region.h
|
||||
:functions: fpga_region_info
|
||||
|
||||
.. kernel-doc:: drivers/fpga/fpga-region.c
|
||||
:functions: devm_fpga_region_create
|
||||
:functions: fpga_region_register_full
|
||||
|
||||
.. kernel-doc:: drivers/fpga/fpga-region.c
|
||||
:functions: fpga_region_register
|
||||
|
|
|
|||
|
|
@ -262,11 +262,11 @@ order to communicate with the device: to read and write various Signals
|
|||
and Counts, and to set and get the "action mode" and "function mode" for
|
||||
various Synapses and Counts respectively.
|
||||
|
||||
A defined counter_device structure may be registered to the system by
|
||||
passing it to the counter_register function, and unregistered by passing
|
||||
it to the counter_unregister function. Similarly, the
|
||||
devm_counter_register function may be used if device memory-managed
|
||||
registration is desired.
|
||||
A counter_device structure is allocated using counter_alloc() and then
|
||||
registered to the system by passing it to the counter_add() function, and
|
||||
unregistered by passing it to the counter_unregister function. There are
|
||||
device managed variants of these functions: devm_counter_alloc() and
|
||||
devm_counter_add().
|
||||
|
||||
The struct counter_comp structure is used to define counter extensions
|
||||
for Signals, Synapses, and Counts.
|
||||
|
|
|
|||
|
|
@ -155,14 +155,14 @@ follows::
|
|||
autofdo
|
||||
$ cd autofdo/
|
||||
$ ls
|
||||
description preset1 preset3 preset5 preset7 preset9
|
||||
feature_refs preset2 preset4 preset6 preset8
|
||||
description feature_refs preset1 preset3 preset5 preset7 preset9
|
||||
enable preset preset2 preset4 preset6 preset8
|
||||
$ cat description
|
||||
Setup ETMs with strobing for autofdo
|
||||
$ cat feature_refs
|
||||
strobing
|
||||
|
||||
Each preset declared has a preset<n> subdirectory declared. The values for
|
||||
Each preset declared has a 'preset<n>' subdirectory declared. The values for
|
||||
the preset can be examined::
|
||||
|
||||
$ cat preset1/values
|
||||
|
|
@ -170,6 +170,9 @@ the preset can be examined::
|
|||
$ cat preset2/values
|
||||
strobing.window = 0x1388 strobing.period = 0x4
|
||||
|
||||
The 'enable' and 'preset' files allow the control of a configuration when
|
||||
using CoreSight with sysfs.
|
||||
|
||||
The features referenced by the configuration can be examined in the features
|
||||
directory::
|
||||
|
||||
|
|
@ -211,19 +214,13 @@ also declared in the perf 'cs_etm' event infrastructure so that they can
|
|||
be selected when running trace under perf::
|
||||
|
||||
$ ls /sys/devices/cs_etm
|
||||
configurations format perf_event_mux_interval_ms sinks type
|
||||
events nr_addr_filters power
|
||||
cpu0 cpu2 events nr_addr_filters power subsystem uevent
|
||||
cpu1 cpu3 format perf_event_mux_interval_ms sinks type
|
||||
|
||||
Key directories here are 'configurations' - which lists the loaded
|
||||
configurations, and 'events' - a generic perf directory which allows
|
||||
selection on the perf command line.::
|
||||
The key directory here is 'events' - a generic perf directory which allows
|
||||
selection on the perf command line. As with the sinks entries, this provides
|
||||
a hash of the configuration name.
|
||||
|
||||
$ ls configurations/
|
||||
autofdo
|
||||
$ cat configurations/autofdo
|
||||
0xa7c3dddd
|
||||
|
||||
As with the sinks entries, this provides a hash of the configuration name.
|
||||
The entry in the 'events' directory uses perfs built in syntax generator
|
||||
to substitute the syntax for the name when evaluating the command::
|
||||
|
||||
|
|
@ -242,3 +239,56 @@ A preset to override the current parameter values can also be selected::
|
|||
|
||||
When configurations are selected in this way, then the trace sink used is
|
||||
automatically selected.
|
||||
|
||||
Using Configurations in sysfs
|
||||
=============================
|
||||
|
||||
Coresight can be controlled using sysfs. When this is in use then a configuration
|
||||
can be made active for the devices that are used in the sysfs session.
|
||||
|
||||
In a configuration there are 'enable' and 'preset' files.
|
||||
|
||||
To enable a configuration for use with sysfs::
|
||||
|
||||
$ cd configurations/autofdo
|
||||
$ echo 1 > enable
|
||||
|
||||
This will then use any default parameter values in the features - which can be
|
||||
adjusted as described above.
|
||||
|
||||
To use a preset<n> set of parameter values::
|
||||
|
||||
$ echo 3 > preset
|
||||
|
||||
This will select preset3 for the configuration.
|
||||
The valid values for preset are 0 - to deselect presets, and any value of
|
||||
<n> where a preset<n> sub-directory is present.
|
||||
|
||||
Note that the active sysfs configuration is a global parameter, therefore
|
||||
only a single configuration can be active for sysfs at any one time.
|
||||
Attempting to enable a second configuration will result in an error.
|
||||
Additionally, attempting to disable the configuration while in use will
|
||||
also result in an error.
|
||||
|
||||
The use of the active configuration by sysfs is independent of the configuration
|
||||
used in perf.
|
||||
|
||||
|
||||
Creating and Loading Custom Configurations
|
||||
==========================================
|
||||
|
||||
Custom configurations and / or features can be dynamically loaded into the
|
||||
system by using a loadable module.
|
||||
|
||||
An example of a custom configuration is found in ./samples/coresight.
|
||||
|
||||
This creates a new configuration that uses the existing built in
|
||||
strobing feature, but provides a different set of presets.
|
||||
|
||||
When the module is loaded, then the configuration appears in the configfs
|
||||
file system and is selectable in the same way as the built in configuration
|
||||
described above.
|
||||
|
||||
Configurations can use previously loaded features. The system will ensure
|
||||
that it is not possible to unload a feature that is currently in use, by
|
||||
enforcing the unload order as the strict reverse of the load order.
|
||||
|
|
|
|||
48
MAINTAINERS
48
MAINTAINERS
|
|
@ -1077,6 +1077,15 @@ W: http://ez.analog.com/community/linux-device-drivers
|
|||
F: Documentation/devicetree/bindings/iio/adc/adi,ad7780.yaml
|
||||
F: drivers/iio/adc/ad7780.c
|
||||
|
||||
ANALOG DEVICES INC AD74413R DRIVER
|
||||
M: Cosmin Tanislav <cosmin.tanislav@analog.com>
|
||||
L: linux-iio@vger.kernel.org
|
||||
S: Supported
|
||||
W: http://ez.analog.com/community/linux-device-drivers
|
||||
F: Documentation/devicetree/bindings/iio/addac/adi,ad74413r.yaml
|
||||
F: drivers/iio/addac/ad74413r.c
|
||||
F: include/dt-bindings/iio/addac/adi,ad74413r.h
|
||||
|
||||
ANALOG DEVICES INC AD9389B DRIVER
|
||||
M: Hans Verkuil <hverkuil-cisco@xs4all.nl>
|
||||
L: linux-media@vger.kernel.org
|
||||
|
|
@ -1903,6 +1912,7 @@ F: Documentation/trace/coresight/*
|
|||
F: drivers/hwtracing/coresight/*
|
||||
F: include/dt-bindings/arm/coresight-cti-dt.h
|
||||
F: include/linux/coresight*
|
||||
F: samples/coresight/*
|
||||
F: tools/perf/arch/arm/util/auxtrace.c
|
||||
F: tools/perf/arch/arm/util/cs-etm.c
|
||||
F: tools/perf/arch/arm/util/cs-etm.h
|
||||
|
|
@ -4773,6 +4783,8 @@ M: Ian Abbott <abbotti@mev.co.uk>
|
|||
M: H Hartley Sweeten <hsweeten@visionengravers.com>
|
||||
S: Odd Fixes
|
||||
F: drivers/comedi/
|
||||
F: include/linux/comedi/
|
||||
F: include/uapi/linux/comedi.h
|
||||
|
||||
COMMON CLK FRAMEWORK
|
||||
M: Michael Turquette <mturquette@baylibre.com>
|
||||
|
|
@ -9770,6 +9782,13 @@ F: drivers/crypto/keembay/keembay-ocs-hcu-core.c
|
|||
F: drivers/crypto/keembay/ocs-hcu.c
|
||||
F: drivers/crypto/keembay/ocs-hcu.h
|
||||
|
||||
INTEL THUNDER BAY EMMC PHY DRIVER
|
||||
M: Nandhini Srikandan <nandhini.srikandan@intel.com>
|
||||
M: Rashmi A <rashmi.a@intel.com>
|
||||
S: Maintained
|
||||
F: Documentation/devicetree/bindings/phy/intel,phy-thunderbay-emmc.yaml
|
||||
F: drivers/phy/intel/phy-intel-thunderbay-emmc.c
|
||||
|
||||
INTEL MANAGEMENT ENGINE (mei)
|
||||
M: Tomas Winkler <tomas.winkler@intel.com>
|
||||
L: linux-kernel@vger.kernel.org
|
||||
|
|
@ -13817,12 +13836,24 @@ F: Documentation/devicetree/bindings/display/imx/nxp,imx8mq-dcss.yaml
|
|||
F: drivers/gpu/drm/imx/dcss/
|
||||
|
||||
NXP i.MX 8QXP ADC DRIVER
|
||||
M: Cai Huoqing <caihuoqing@baidu.com>
|
||||
M: Cai Huoqing <cai.huoqing@linux.dev>
|
||||
M: Haibo Chen <haibo.chen@nxp.com>
|
||||
L: linux-imx@nxp.com
|
||||
L: linux-iio@vger.kernel.org
|
||||
S: Supported
|
||||
S: Maintained
|
||||
F: Documentation/devicetree/bindings/iio/adc/nxp,imx8qxp-adc.yaml
|
||||
F: drivers/iio/adc/imx8qxp-adc.c
|
||||
|
||||
NXP i.MX 7D/6SX/6UL AND VF610 ADC DRIVER
|
||||
M: Haibo Chen <haibo.chen@nxp.com>
|
||||
L: linux-iio@vger.kernel.org
|
||||
L: linux-imx@nxp.com
|
||||
S: Maintained
|
||||
F: Documentation/devicetree/bindings/iio/adc/fsl,imx7d-adc.yaml
|
||||
F: Documentation/devicetree/bindings/iio/adc/fsl,vf610-adc.yaml
|
||||
F: drivers/iio/adc/imx7d_adc.c
|
||||
F: drivers/iio/adc/vf610_adc.c
|
||||
|
||||
NXP PF8100/PF8121A/PF8200 PMIC REGULATOR DEVICE DRIVER
|
||||
M: Jagan Teki <jagan@amarulasolutions.com>
|
||||
S: Maintained
|
||||
|
|
@ -21094,6 +21125,13 @@ F: fs/xfs/
|
|||
F: include/uapi/linux/dqblk_xfs.h
|
||||
F: include/uapi/linux/fsmap.h
|
||||
|
||||
XILINX AMS DRIVER
|
||||
M: Anand Ashok Dumbre <anand.ashok.dumbre@xilinx.com>
|
||||
L: linux-iio@vger.kernel.org
|
||||
S: Maintained
|
||||
F: Documentation/devicetree/bindings/iio/adc/xlnx,zynqmp-ams.yaml
|
||||
F: drivers/iio/adc/xilinx-ams.c
|
||||
|
||||
XILINX AXI ETHERNET DRIVER
|
||||
M: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>
|
||||
S: Maintained
|
||||
|
|
@ -21162,6 +21200,12 @@ T: git https://github.com/Xilinx/linux-xlnx.git
|
|||
F: Documentation/devicetree/bindings/phy/xlnx,zynqmp-psgtr.yaml
|
||||
F: drivers/phy/xilinx/phy-zynqmp.c
|
||||
|
||||
XILINX EVENT MANAGEMENT DRIVER
|
||||
M: Abhyuday Godhasara <abhyuday.godhasara@xilinx.com>
|
||||
S: Maintained
|
||||
F: drivers/soc/xilinx/xlnx_event_manager.c
|
||||
F: include/linux/firmware/xlnx-event-manager.h
|
||||
|
||||
XILLYBUS DRIVER
|
||||
M: Eli Billauer <eli.billauer@gmail.com>
|
||||
L: linux-kernel@vger.kernel.org
|
||||
|
|
|
|||
|
|
@ -247,7 +247,7 @@ static void synth_flush(struct spk_synth *synth)
|
|||
static int synth_probe(struct spk_synth *synth)
|
||||
{
|
||||
unsigned int port_val = 0;
|
||||
int i = 0;
|
||||
int i;
|
||||
|
||||
pr_info("Probing for %s.\n", synth->long_name);
|
||||
if (port_forced) {
|
||||
|
|
|
|||
|
|
@ -316,7 +316,7 @@ static struct synth_settings *synth_interrogate(struct spk_synth *synth)
|
|||
static int synth_probe(struct spk_synth *synth)
|
||||
{
|
||||
unsigned int port_val = 0;
|
||||
int i = 0;
|
||||
int i;
|
||||
struct synth_settings *sp;
|
||||
|
||||
pr_info("Probing for DoubleTalk.\n");
|
||||
|
|
|
|||
|
|
@ -254,7 +254,7 @@ static void synth_flush(struct spk_synth *synth)
|
|||
static int synth_probe(struct spk_synth *synth)
|
||||
{
|
||||
unsigned int port_val = 0;
|
||||
int i = 0;
|
||||
int i;
|
||||
|
||||
pr_info("Probing for %s.\n", synth->long_name);
|
||||
if (port_forced) {
|
||||
|
|
|
|||
|
|
@ -69,7 +69,7 @@
|
|||
|
||||
#include <uapi/linux/android/binder.h>
|
||||
|
||||
#include <asm/cacheflush.h>
|
||||
#include <linux/cacheflush.h>
|
||||
|
||||
#include "binder_internal.h"
|
||||
#include "binder_trace.h"
|
||||
|
|
@ -1608,15 +1608,21 @@ static void binder_cleanup_transaction(struct binder_transaction *t,
|
|||
/**
|
||||
* binder_get_object() - gets object and checks for valid metadata
|
||||
* @proc: binder_proc owning the buffer
|
||||
* @u: sender's user pointer to base of buffer
|
||||
* @buffer: binder_buffer that we're parsing.
|
||||
* @offset: offset in the @buffer at which to validate an object.
|
||||
* @object: struct binder_object to read into
|
||||
*
|
||||
* Return: If there's a valid metadata object at @offset in @buffer, the
|
||||
* Copy the binder object at the given offset into @object. If @u is
|
||||
* provided then the copy is from the sender's buffer. If not, then
|
||||
* it is copied from the target's @buffer.
|
||||
*
|
||||
* Return: If there's a valid metadata object at @offset, the
|
||||
* size of that object. Otherwise, it returns zero. The object
|
||||
* is read into the struct binder_object pointed to by @object.
|
||||
*/
|
||||
static size_t binder_get_object(struct binder_proc *proc,
|
||||
const void __user *u,
|
||||
struct binder_buffer *buffer,
|
||||
unsigned long offset,
|
||||
struct binder_object *object)
|
||||
|
|
@ -1626,10 +1632,16 @@ static size_t binder_get_object(struct binder_proc *proc,
|
|||
size_t object_size = 0;
|
||||
|
||||
read_size = min_t(size_t, sizeof(*object), buffer->data_size - offset);
|
||||
if (offset > buffer->data_size || read_size < sizeof(*hdr) ||
|
||||
binder_alloc_copy_from_buffer(&proc->alloc, object, buffer,
|
||||
offset, read_size))
|
||||
if (offset > buffer->data_size || read_size < sizeof(*hdr))
|
||||
return 0;
|
||||
if (u) {
|
||||
if (copy_from_user(object, u + offset, read_size))
|
||||
return 0;
|
||||
} else {
|
||||
if (binder_alloc_copy_from_buffer(&proc->alloc, object, buffer,
|
||||
offset, read_size))
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* Ok, now see if we read a complete object. */
|
||||
hdr = &object->hdr;
|
||||
|
|
@ -1702,7 +1714,7 @@ static struct binder_buffer_object *binder_validate_ptr(
|
|||
b, buffer_offset,
|
||||
sizeof(object_offset)))
|
||||
return NULL;
|
||||
object_size = binder_get_object(proc, b, object_offset, object);
|
||||
object_size = binder_get_object(proc, NULL, b, object_offset, object);
|
||||
if (!object_size || object->hdr.type != BINDER_TYPE_PTR)
|
||||
return NULL;
|
||||
if (object_offsetp)
|
||||
|
|
@ -1767,7 +1779,8 @@ static bool binder_validate_fixup(struct binder_proc *proc,
|
|||
unsigned long buffer_offset;
|
||||
struct binder_object last_object;
|
||||
struct binder_buffer_object *last_bbo;
|
||||
size_t object_size = binder_get_object(proc, b, last_obj_offset,
|
||||
size_t object_size = binder_get_object(proc, NULL, b,
|
||||
last_obj_offset,
|
||||
&last_object);
|
||||
if (object_size != sizeof(*last_bbo))
|
||||
return false;
|
||||
|
|
@ -1882,7 +1895,7 @@ static void binder_transaction_buffer_release(struct binder_proc *proc,
|
|||
if (!binder_alloc_copy_from_buffer(&proc->alloc, &object_offset,
|
||||
buffer, buffer_offset,
|
||||
sizeof(object_offset)))
|
||||
object_size = binder_get_object(proc, buffer,
|
||||
object_size = binder_get_object(proc, NULL, buffer,
|
||||
object_offset, &object);
|
||||
if (object_size == 0) {
|
||||
pr_err("transaction release %d bad object at offset %lld, size %zd\n",
|
||||
|
|
@ -1933,7 +1946,7 @@ static void binder_transaction_buffer_release(struct binder_proc *proc,
|
|||
case BINDER_TYPE_FD: {
|
||||
/*
|
||||
* No need to close the file here since user-space
|
||||
* closes it for for successfully delivered
|
||||
* closes it for successfully delivered
|
||||
* transactions. For transactions that weren't
|
||||
* delivered, the new fd was never allocated so
|
||||
* there is no need to close and the fput on the
|
||||
|
|
@ -2220,16 +2233,258 @@ err_fd_not_accepted:
|
|||
return ret;
|
||||
}
|
||||
|
||||
static int binder_translate_fd_array(struct binder_fd_array_object *fda,
|
||||
/**
|
||||
* struct binder_ptr_fixup - data to be fixed-up in target buffer
|
||||
* @offset offset in target buffer to fixup
|
||||
* @skip_size bytes to skip in copy (fixup will be written later)
|
||||
* @fixup_data data to write at fixup offset
|
||||
* @node list node
|
||||
*
|
||||
* This is used for the pointer fixup list (pf) which is created and consumed
|
||||
* during binder_transaction() and is only accessed locally. No
|
||||
* locking is necessary.
|
||||
*
|
||||
* The list is ordered by @offset.
|
||||
*/
|
||||
struct binder_ptr_fixup {
|
||||
binder_size_t offset;
|
||||
size_t skip_size;
|
||||
binder_uintptr_t fixup_data;
|
||||
struct list_head node;
|
||||
};
|
||||
|
||||
/**
|
||||
* struct binder_sg_copy - scatter-gather data to be copied
|
||||
* @offset offset in target buffer
|
||||
* @sender_uaddr user address in source buffer
|
||||
* @length bytes to copy
|
||||
* @node list node
|
||||
*
|
||||
* This is used for the sg copy list (sgc) which is created and consumed
|
||||
* during binder_transaction() and is only accessed locally. No
|
||||
* locking is necessary.
|
||||
*
|
||||
* The list is ordered by @offset.
|
||||
*/
|
||||
struct binder_sg_copy {
|
||||
binder_size_t offset;
|
||||
const void __user *sender_uaddr;
|
||||
size_t length;
|
||||
struct list_head node;
|
||||
};
|
||||
|
||||
/**
|
||||
* binder_do_deferred_txn_copies() - copy and fixup scatter-gather data
|
||||
* @alloc: binder_alloc associated with @buffer
|
||||
* @buffer: binder buffer in target process
|
||||
* @sgc_head: list_head of scatter-gather copy list
|
||||
* @pf_head: list_head of pointer fixup list
|
||||
*
|
||||
* Processes all elements of @sgc_head, applying fixups from @pf_head
|
||||
* and copying the scatter-gather data from the source process' user
|
||||
* buffer to the target's buffer. It is expected that the list creation
|
||||
* and processing all occurs during binder_transaction() so these lists
|
||||
* are only accessed in local context.
|
||||
*
|
||||
* Return: 0=success, else -errno
|
||||
*/
|
||||
static int binder_do_deferred_txn_copies(struct binder_alloc *alloc,
|
||||
struct binder_buffer *buffer,
|
||||
struct list_head *sgc_head,
|
||||
struct list_head *pf_head)
|
||||
{
|
||||
int ret = 0;
|
||||
struct binder_sg_copy *sgc, *tmpsgc;
|
||||
struct binder_ptr_fixup *pf =
|
||||
list_first_entry_or_null(pf_head, struct binder_ptr_fixup,
|
||||
node);
|
||||
|
||||
list_for_each_entry_safe(sgc, tmpsgc, sgc_head, node) {
|
||||
size_t bytes_copied = 0;
|
||||
|
||||
while (bytes_copied < sgc->length) {
|
||||
size_t copy_size;
|
||||
size_t bytes_left = sgc->length - bytes_copied;
|
||||
size_t offset = sgc->offset + bytes_copied;
|
||||
|
||||
/*
|
||||
* We copy up to the fixup (pointed to by pf)
|
||||
*/
|
||||
copy_size = pf ? min(bytes_left, (size_t)pf->offset - offset)
|
||||
: bytes_left;
|
||||
if (!ret && copy_size)
|
||||
ret = binder_alloc_copy_user_to_buffer(
|
||||
alloc, buffer,
|
||||
offset,
|
||||
sgc->sender_uaddr + bytes_copied,
|
||||
copy_size);
|
||||
bytes_copied += copy_size;
|
||||
if (copy_size != bytes_left) {
|
||||
BUG_ON(!pf);
|
||||
/* we stopped at a fixup offset */
|
||||
if (pf->skip_size) {
|
||||
/*
|
||||
* we are just skipping. This is for
|
||||
* BINDER_TYPE_FDA where the translated
|
||||
* fds will be fixed up when we get
|
||||
* to target context.
|
||||
*/
|
||||
bytes_copied += pf->skip_size;
|
||||
} else {
|
||||
/* apply the fixup indicated by pf */
|
||||
if (!ret)
|
||||
ret = binder_alloc_copy_to_buffer(
|
||||
alloc, buffer,
|
||||
pf->offset,
|
||||
&pf->fixup_data,
|
||||
sizeof(pf->fixup_data));
|
||||
bytes_copied += sizeof(pf->fixup_data);
|
||||
}
|
||||
list_del(&pf->node);
|
||||
kfree(pf);
|
||||
pf = list_first_entry_or_null(pf_head,
|
||||
struct binder_ptr_fixup, node);
|
||||
}
|
||||
}
|
||||
list_del(&sgc->node);
|
||||
kfree(sgc);
|
||||
}
|
||||
BUG_ON(!list_empty(pf_head));
|
||||
BUG_ON(!list_empty(sgc_head));
|
||||
|
||||
return ret > 0 ? -EINVAL : ret;
|
||||
}
|
||||
|
||||
/**
|
||||
* binder_cleanup_deferred_txn_lists() - free specified lists
|
||||
* @sgc_head: list_head of scatter-gather copy list
|
||||
* @pf_head: list_head of pointer fixup list
|
||||
*
|
||||
* Called to clean up @sgc_head and @pf_head if there is an
|
||||
* error.
|
||||
*/
|
||||
static void binder_cleanup_deferred_txn_lists(struct list_head *sgc_head,
|
||||
struct list_head *pf_head)
|
||||
{
|
||||
struct binder_sg_copy *sgc, *tmpsgc;
|
||||
struct binder_ptr_fixup *pf, *tmppf;
|
||||
|
||||
list_for_each_entry_safe(sgc, tmpsgc, sgc_head, node) {
|
||||
list_del(&sgc->node);
|
||||
kfree(sgc);
|
||||
}
|
||||
list_for_each_entry_safe(pf, tmppf, pf_head, node) {
|
||||
list_del(&pf->node);
|
||||
kfree(pf);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* binder_defer_copy() - queue a scatter-gather buffer for copy
|
||||
* @sgc_head: list_head of scatter-gather copy list
|
||||
* @offset: binder buffer offset in target process
|
||||
* @sender_uaddr: user address in source process
|
||||
* @length: bytes to copy
|
||||
*
|
||||
* Specify a scatter-gather block to be copied. The actual copy must
|
||||
* be deferred until all the needed fixups are identified and queued.
|
||||
* Then the copy and fixups are done together so un-translated values
|
||||
* from the source are never visible in the target buffer.
|
||||
*
|
||||
* We are guaranteed that repeated calls to this function will have
|
||||
* monotonically increasing @offset values so the list will naturally
|
||||
* be ordered.
|
||||
*
|
||||
* Return: 0=success, else -errno
|
||||
*/
|
||||
static int binder_defer_copy(struct list_head *sgc_head, binder_size_t offset,
|
||||
const void __user *sender_uaddr, size_t length)
|
||||
{
|
||||
struct binder_sg_copy *bc = kzalloc(sizeof(*bc), GFP_KERNEL);
|
||||
|
||||
if (!bc)
|
||||
return -ENOMEM;
|
||||
|
||||
bc->offset = offset;
|
||||
bc->sender_uaddr = sender_uaddr;
|
||||
bc->length = length;
|
||||
INIT_LIST_HEAD(&bc->node);
|
||||
|
||||
/*
|
||||
* We are guaranteed that the deferred copies are in-order
|
||||
* so just add to the tail.
|
||||
*/
|
||||
list_add_tail(&bc->node, sgc_head);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* binder_add_fixup() - queue a fixup to be applied to sg copy
|
||||
* @pf_head: list_head of binder ptr fixup list
|
||||
* @offset: binder buffer offset in target process
|
||||
* @fixup: bytes to be copied for fixup
|
||||
* @skip_size: bytes to skip when copying (fixup will be applied later)
|
||||
*
|
||||
* Add the specified fixup to a list ordered by @offset. When copying
|
||||
* the scatter-gather buffers, the fixup will be copied instead of
|
||||
* data from the source buffer. For BINDER_TYPE_FDA fixups, the fixup
|
||||
* will be applied later (in target process context), so we just skip
|
||||
* the bytes specified by @skip_size. If @skip_size is 0, we copy the
|
||||
* value in @fixup.
|
||||
*
|
||||
* This function is called *mostly* in @offset order, but there are
|
||||
* exceptions. Since out-of-order inserts are relatively uncommon,
|
||||
* we insert the new element by searching backward from the tail of
|
||||
* the list.
|
||||
*
|
||||
* Return: 0=success, else -errno
|
||||
*/
|
||||
static int binder_add_fixup(struct list_head *pf_head, binder_size_t offset,
|
||||
binder_uintptr_t fixup, size_t skip_size)
|
||||
{
|
||||
struct binder_ptr_fixup *pf = kzalloc(sizeof(*pf), GFP_KERNEL);
|
||||
struct binder_ptr_fixup *tmppf;
|
||||
|
||||
if (!pf)
|
||||
return -ENOMEM;
|
||||
|
||||
pf->offset = offset;
|
||||
pf->fixup_data = fixup;
|
||||
pf->skip_size = skip_size;
|
||||
INIT_LIST_HEAD(&pf->node);
|
||||
|
||||
/* Fixups are *mostly* added in-order, but there are some
|
||||
* exceptions. Look backwards through list for insertion point.
|
||||
*/
|
||||
list_for_each_entry_reverse(tmppf, pf_head, node) {
|
||||
if (tmppf->offset < pf->offset) {
|
||||
list_add(&pf->node, &tmppf->node);
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
/*
|
||||
* if we get here, then the new offset is the lowest so
|
||||
* insert at the head
|
||||
*/
|
||||
list_add(&pf->node, pf_head);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int binder_translate_fd_array(struct list_head *pf_head,
|
||||
struct binder_fd_array_object *fda,
|
||||
const void __user *sender_ubuffer,
|
||||
struct binder_buffer_object *parent,
|
||||
struct binder_buffer_object *sender_uparent,
|
||||
struct binder_transaction *t,
|
||||
struct binder_thread *thread,
|
||||
struct binder_transaction *in_reply_to)
|
||||
{
|
||||
binder_size_t fdi, fd_buf_size;
|
||||
binder_size_t fda_offset;
|
||||
const void __user *sender_ufda_base;
|
||||
struct binder_proc *proc = thread->proc;
|
||||
struct binder_proc *target_proc = t->to_proc;
|
||||
int ret;
|
||||
|
||||
fd_buf_size = sizeof(u32) * fda->num_fds;
|
||||
if (fda->num_fds >= SIZE_MAX / sizeof(u32)) {
|
||||
|
|
@ -2253,29 +2508,36 @@ static int binder_translate_fd_array(struct binder_fd_array_object *fda,
|
|||
*/
|
||||
fda_offset = (parent->buffer - (uintptr_t)t->buffer->user_data) +
|
||||
fda->parent_offset;
|
||||
if (!IS_ALIGNED((unsigned long)fda_offset, sizeof(u32))) {
|
||||
sender_ufda_base = (void __user *)(uintptr_t)sender_uparent->buffer +
|
||||
fda->parent_offset;
|
||||
|
||||
if (!IS_ALIGNED((unsigned long)fda_offset, sizeof(u32)) ||
|
||||
!IS_ALIGNED((unsigned long)sender_ufda_base, sizeof(u32))) {
|
||||
binder_user_error("%d:%d parent offset not aligned correctly.\n",
|
||||
proc->pid, thread->pid);
|
||||
return -EINVAL;
|
||||
}
|
||||
ret = binder_add_fixup(pf_head, fda_offset, 0, fda->num_fds * sizeof(u32));
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
for (fdi = 0; fdi < fda->num_fds; fdi++) {
|
||||
u32 fd;
|
||||
int ret;
|
||||
binder_size_t offset = fda_offset + fdi * sizeof(fd);
|
||||
binder_size_t sender_uoffset = fdi * sizeof(fd);
|
||||
|
||||
ret = binder_alloc_copy_from_buffer(&target_proc->alloc,
|
||||
&fd, t->buffer,
|
||||
offset, sizeof(fd));
|
||||
ret = copy_from_user(&fd, sender_ufda_base + sender_uoffset, sizeof(fd));
|
||||
if (!ret)
|
||||
ret = binder_translate_fd(fd, offset, t, thread,
|
||||
in_reply_to);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
if (ret)
|
||||
return ret > 0 ? -EINVAL : ret;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int binder_fixup_parent(struct binder_transaction *t,
|
||||
static int binder_fixup_parent(struct list_head *pf_head,
|
||||
struct binder_transaction *t,
|
||||
struct binder_thread *thread,
|
||||
struct binder_buffer_object *bp,
|
||||
binder_size_t off_start_offset,
|
||||
|
|
@ -2321,14 +2583,7 @@ static int binder_fixup_parent(struct binder_transaction *t,
|
|||
}
|
||||
buffer_offset = bp->parent_offset +
|
||||
(uintptr_t)parent->buffer - (uintptr_t)b->user_data;
|
||||
if (binder_alloc_copy_to_buffer(&target_proc->alloc, b, buffer_offset,
|
||||
&bp->buffer, sizeof(bp->buffer))) {
|
||||
binder_user_error("%d:%d got transaction with invalid parent offset\n",
|
||||
proc->pid, thread->pid);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
return 0;
|
||||
return binder_add_fixup(pf_head, buffer_offset, bp->buffer, 0);
|
||||
}
|
||||
|
||||
/**
|
||||
|
|
@ -2455,6 +2710,7 @@ static void binder_transaction(struct binder_proc *proc,
|
|||
binder_size_t off_start_offset, off_end_offset;
|
||||
binder_size_t off_min;
|
||||
binder_size_t sg_buf_offset, sg_buf_end_offset;
|
||||
binder_size_t user_offset = 0;
|
||||
struct binder_proc *target_proc = NULL;
|
||||
struct binder_thread *target_thread = NULL;
|
||||
struct binder_node *target_node = NULL;
|
||||
|
|
@ -2469,6 +2725,12 @@ static void binder_transaction(struct binder_proc *proc,
|
|||
int t_debug_id = atomic_inc_return(&binder_last_id);
|
||||
char *secctx = NULL;
|
||||
u32 secctx_sz = 0;
|
||||
struct list_head sgc_head;
|
||||
struct list_head pf_head;
|
||||
const void __user *user_buffer = (const void __user *)
|
||||
(uintptr_t)tr->data.ptr.buffer;
|
||||
INIT_LIST_HEAD(&sgc_head);
|
||||
INIT_LIST_HEAD(&pf_head);
|
||||
|
||||
e = binder_transaction_log_add(&binder_transaction_log);
|
||||
e->debug_id = t_debug_id;
|
||||
|
|
@ -2780,19 +3042,6 @@ static void binder_transaction(struct binder_proc *proc,
|
|||
t->buffer->clear_on_free = !!(t->flags & TF_CLEAR_BUF);
|
||||
trace_binder_transaction_alloc_buf(t->buffer);
|
||||
|
||||
if (binder_alloc_copy_user_to_buffer(
|
||||
&target_proc->alloc,
|
||||
t->buffer, 0,
|
||||
(const void __user *)
|
||||
(uintptr_t)tr->data.ptr.buffer,
|
||||
tr->data_size)) {
|
||||
binder_user_error("%d:%d got transaction with invalid data ptr\n",
|
||||
proc->pid, thread->pid);
|
||||
return_error = BR_FAILED_REPLY;
|
||||
return_error_param = -EFAULT;
|
||||
return_error_line = __LINE__;
|
||||
goto err_copy_data_failed;
|
||||
}
|
||||
if (binder_alloc_copy_user_to_buffer(
|
||||
&target_proc->alloc,
|
||||
t->buffer,
|
||||
|
|
@ -2837,6 +3086,7 @@ static void binder_transaction(struct binder_proc *proc,
|
|||
size_t object_size;
|
||||
struct binder_object object;
|
||||
binder_size_t object_offset;
|
||||
binder_size_t copy_size;
|
||||
|
||||
if (binder_alloc_copy_from_buffer(&target_proc->alloc,
|
||||
&object_offset,
|
||||
|
|
@ -2848,8 +3098,27 @@ static void binder_transaction(struct binder_proc *proc,
|
|||
return_error_line = __LINE__;
|
||||
goto err_bad_offset;
|
||||
}
|
||||
object_size = binder_get_object(target_proc, t->buffer,
|
||||
object_offset, &object);
|
||||
|
||||
/*
|
||||
* Copy the source user buffer up to the next object
|
||||
* that will be processed.
|
||||
*/
|
||||
copy_size = object_offset - user_offset;
|
||||
if (copy_size && (user_offset > object_offset ||
|
||||
binder_alloc_copy_user_to_buffer(
|
||||
&target_proc->alloc,
|
||||
t->buffer, user_offset,
|
||||
user_buffer + user_offset,
|
||||
copy_size))) {
|
||||
binder_user_error("%d:%d got transaction with invalid data ptr\n",
|
||||
proc->pid, thread->pid);
|
||||
return_error = BR_FAILED_REPLY;
|
||||
return_error_param = -EFAULT;
|
||||
return_error_line = __LINE__;
|
||||
goto err_copy_data_failed;
|
||||
}
|
||||
object_size = binder_get_object(target_proc, user_buffer,
|
||||
t->buffer, object_offset, &object);
|
||||
if (object_size == 0 || object_offset < off_min) {
|
||||
binder_user_error("%d:%d got transaction with invalid offset (%lld, min %lld max %lld) or object.\n",
|
||||
proc->pid, thread->pid,
|
||||
|
|
@ -2861,6 +3130,11 @@ static void binder_transaction(struct binder_proc *proc,
|
|||
return_error_line = __LINE__;
|
||||
goto err_bad_offset;
|
||||
}
|
||||
/*
|
||||
* Set offset to the next buffer fragment to be
|
||||
* copied
|
||||
*/
|
||||
user_offset = object_offset + object_size;
|
||||
|
||||
hdr = &object.hdr;
|
||||
off_min = object_offset + object_size;
|
||||
|
|
@ -2923,6 +3197,8 @@ static void binder_transaction(struct binder_proc *proc,
|
|||
case BINDER_TYPE_FDA: {
|
||||
struct binder_object ptr_object;
|
||||
binder_size_t parent_offset;
|
||||
struct binder_object user_object;
|
||||
size_t user_parent_size;
|
||||
struct binder_fd_array_object *fda =
|
||||
to_binder_fd_array_object(hdr);
|
||||
size_t num_valid = (buffer_offset - off_start_offset) /
|
||||
|
|
@ -2954,11 +3230,35 @@ static void binder_transaction(struct binder_proc *proc,
|
|||
return_error_line = __LINE__;
|
||||
goto err_bad_parent;
|
||||
}
|
||||
ret = binder_translate_fd_array(fda, parent, t, thread,
|
||||
in_reply_to);
|
||||
if (ret < 0) {
|
||||
/*
|
||||
* We need to read the user version of the parent
|
||||
* object to get the original user offset
|
||||
*/
|
||||
user_parent_size =
|
||||
binder_get_object(proc, user_buffer, t->buffer,
|
||||
parent_offset, &user_object);
|
||||
if (user_parent_size != sizeof(user_object.bbo)) {
|
||||
binder_user_error("%d:%d invalid ptr object size: %zd vs %zd\n",
|
||||
proc->pid, thread->pid,
|
||||
user_parent_size,
|
||||
sizeof(user_object.bbo));
|
||||
return_error = BR_FAILED_REPLY;
|
||||
return_error_param = ret;
|
||||
return_error_param = -EINVAL;
|
||||
return_error_line = __LINE__;
|
||||
goto err_bad_parent;
|
||||
}
|
||||
ret = binder_translate_fd_array(&pf_head, fda,
|
||||
user_buffer, parent,
|
||||
&user_object.bbo, t,
|
||||
thread, in_reply_to);
|
||||
if (!ret)
|
||||
ret = binder_alloc_copy_to_buffer(&target_proc->alloc,
|
||||
t->buffer,
|
||||
object_offset,
|
||||
fda, sizeof(*fda));
|
||||
if (ret) {
|
||||
return_error = BR_FAILED_REPLY;
|
||||
return_error_param = ret > 0 ? -EINVAL : ret;
|
||||
return_error_line = __LINE__;
|
||||
goto err_translate_failed;
|
||||
}
|
||||
|
|
@ -2980,19 +3280,14 @@ static void binder_transaction(struct binder_proc *proc,
|
|||
return_error_line = __LINE__;
|
||||
goto err_bad_offset;
|
||||
}
|
||||
if (binder_alloc_copy_user_to_buffer(
|
||||
&target_proc->alloc,
|
||||
t->buffer,
|
||||
sg_buf_offset,
|
||||
(const void __user *)
|
||||
(uintptr_t)bp->buffer,
|
||||
bp->length)) {
|
||||
binder_user_error("%d:%d got transaction with invalid offsets ptr\n",
|
||||
proc->pid, thread->pid);
|
||||
return_error_param = -EFAULT;
|
||||
ret = binder_defer_copy(&sgc_head, sg_buf_offset,
|
||||
(const void __user *)(uintptr_t)bp->buffer,
|
||||
bp->length);
|
||||
if (ret) {
|
||||
return_error = BR_FAILED_REPLY;
|
||||
return_error_param = ret;
|
||||
return_error_line = __LINE__;
|
||||
goto err_copy_data_failed;
|
||||
goto err_translate_failed;
|
||||
}
|
||||
/* Fixup buffer pointer to target proc address space */
|
||||
bp->buffer = (uintptr_t)
|
||||
|
|
@ -3001,7 +3296,8 @@ static void binder_transaction(struct binder_proc *proc,
|
|||
|
||||
num_valid = (buffer_offset - off_start_offset) /
|
||||
sizeof(binder_size_t);
|
||||
ret = binder_fixup_parent(t, thread, bp,
|
||||
ret = binder_fixup_parent(&pf_head, t,
|
||||
thread, bp,
|
||||
off_start_offset,
|
||||
num_valid,
|
||||
last_fixup_obj_off,
|
||||
|
|
@ -3028,6 +3324,30 @@ static void binder_transaction(struct binder_proc *proc,
|
|||
goto err_bad_object_type;
|
||||
}
|
||||
}
|
||||
/* Done processing objects, copy the rest of the buffer */
|
||||
if (binder_alloc_copy_user_to_buffer(
|
||||
&target_proc->alloc,
|
||||
t->buffer, user_offset,
|
||||
user_buffer + user_offset,
|
||||
tr->data_size - user_offset)) {
|
||||
binder_user_error("%d:%d got transaction with invalid data ptr\n",
|
||||
proc->pid, thread->pid);
|
||||
return_error = BR_FAILED_REPLY;
|
||||
return_error_param = -EFAULT;
|
||||
return_error_line = __LINE__;
|
||||
goto err_copy_data_failed;
|
||||
}
|
||||
|
||||
ret = binder_do_deferred_txn_copies(&target_proc->alloc, t->buffer,
|
||||
&sgc_head, &pf_head);
|
||||
if (ret) {
|
||||
binder_user_error("%d:%d got transaction with invalid offsets ptr\n",
|
||||
proc->pid, thread->pid);
|
||||
return_error = BR_FAILED_REPLY;
|
||||
return_error_param = ret;
|
||||
return_error_line = __LINE__;
|
||||
goto err_copy_data_failed;
|
||||
}
|
||||
if (t->buffer->oneway_spam_suspect)
|
||||
tcomplete->type = BINDER_WORK_TRANSACTION_ONEWAY_SPAM_SUSPECT;
|
||||
else
|
||||
|
|
@ -3101,6 +3421,7 @@ err_bad_object_type:
|
|||
err_bad_offset:
|
||||
err_bad_parent:
|
||||
err_copy_data_failed:
|
||||
binder_cleanup_deferred_txn_lists(&sgc_head, &pf_head);
|
||||
binder_free_txn_fixups(t);
|
||||
trace_binder_transaction_failed_buffer_release(t->buffer);
|
||||
binder_transaction_buffer_release(target_proc, NULL, t->buffer,
|
||||
|
|
|
|||
|
|
@ -919,6 +919,22 @@ int fwnode_irq_get(const struct fwnode_handle *fwnode, unsigned int index)
|
|||
}
|
||||
EXPORT_SYMBOL(fwnode_irq_get);
|
||||
|
||||
/**
|
||||
* fwnode_iomap - Maps the memory mapped IO for a given fwnode
|
||||
* @fwnode: Pointer to the firmware node
|
||||
* @index: Index of the IO range
|
||||
*
|
||||
* Returns a pointer to the mapped memory.
|
||||
*/
|
||||
void __iomem *fwnode_iomap(struct fwnode_handle *fwnode, int index)
|
||||
{
|
||||
if (IS_ENABLED(CONFIG_OF_ADDRESS) && is_of_node(fwnode))
|
||||
return of_iomap(to_of_node(fwnode), index);
|
||||
|
||||
return NULL;
|
||||
}
|
||||
EXPORT_SYMBOL(fwnode_iomap);
|
||||
|
||||
/**
|
||||
* fwnode_graph_get_next_endpoint - Get next endpoint firmware node
|
||||
* @fwnode: Pointer to the parent firmware node
|
||||
|
|
|
|||
|
|
@ -28,6 +28,7 @@
|
|||
|
||||
#undef r2
|
||||
#undef w2
|
||||
#undef PC
|
||||
|
||||
#define PC pi->private
|
||||
#define r2() (PC=(in_p(2) & 0xff))
|
||||
|
|
|
|||
|
|
@ -417,7 +417,7 @@ void mhi_fw_load_handler(struct mhi_controller *mhi_cntrl)
|
|||
}
|
||||
|
||||
/* wait for ready on pass through or any other execution environment */
|
||||
if (mhi_cntrl->ee != MHI_EE_EDL && mhi_cntrl->ee != MHI_EE_PBL)
|
||||
if (!MHI_FW_LOAD_CAPABLE(mhi_cntrl->ee))
|
||||
goto fw_load_ready_state;
|
||||
|
||||
fw_name = (mhi_cntrl->ee == MHI_EE_EDL) ?
|
||||
|
|
|
|||
|
|
@ -79,7 +79,8 @@ static const char * const mhi_pm_state_str[] = {
|
|||
|
||||
const char *to_mhi_pm_state_str(enum mhi_pm_state state)
|
||||
{
|
||||
int index = find_last_bit((unsigned long *)&state, 32);
|
||||
unsigned long pm_state = state;
|
||||
int index = find_last_bit(&pm_state, 32);
|
||||
|
||||
if (index >= ARRAY_SIZE(mhi_pm_state_str))
|
||||
return "Invalid State";
|
||||
|
|
@ -788,6 +789,7 @@ static int parse_ch_cfg(struct mhi_controller *mhi_cntrl,
|
|||
mhi_chan->offload_ch = ch_cfg->offload_channel;
|
||||
mhi_chan->db_cfg.reset_req = ch_cfg->doorbell_mode_switch;
|
||||
mhi_chan->pre_alloc = ch_cfg->auto_queue;
|
||||
mhi_chan->wake_capable = ch_cfg->wake_capable;
|
||||
|
||||
/*
|
||||
* If MHI host allocates buffers, then the channel direction
|
||||
|
|
|
|||
|
|
@ -390,7 +390,8 @@ extern const char * const mhi_ee_str[MHI_EE_MAX];
|
|||
|
||||
#define MHI_IN_PBL(ee) (ee == MHI_EE_PBL || ee == MHI_EE_PTHRU || \
|
||||
ee == MHI_EE_EDL)
|
||||
|
||||
#define MHI_POWER_UP_CAPABLE(ee) (MHI_IN_PBL(ee) || ee == MHI_EE_AMSS)
|
||||
#define MHI_FW_LOAD_CAPABLE(ee) (ee == MHI_EE_PBL || ee == MHI_EE_EDL)
|
||||
#define MHI_IN_MISSION_MODE(ee) (ee == MHI_EE_AMSS || ee == MHI_EE_WFW || \
|
||||
ee == MHI_EE_FP)
|
||||
|
||||
|
|
@ -681,8 +682,12 @@ void mhi_deinit_free_irq(struct mhi_controller *mhi_cntrl);
|
|||
void mhi_rddm_prepare(struct mhi_controller *mhi_cntrl,
|
||||
struct image_info *img_info);
|
||||
void mhi_fw_load_handler(struct mhi_controller *mhi_cntrl);
|
||||
|
||||
/* Automatically allocate and queue inbound buffers */
|
||||
#define MHI_CH_INBOUND_ALLOC_BUFS BIT(0)
|
||||
int mhi_prepare_channel(struct mhi_controller *mhi_cntrl,
|
||||
struct mhi_chan *mhi_chan);
|
||||
struct mhi_chan *mhi_chan, unsigned int flags);
|
||||
|
||||
int mhi_init_chan_ctxt(struct mhi_controller *mhi_cntrl,
|
||||
struct mhi_chan *mhi_chan);
|
||||
void mhi_deinit_chan_ctxt(struct mhi_controller *mhi_cntrl,
|
||||
|
|
|
|||
|
|
@ -1065,7 +1065,7 @@ void mhi_ctrl_ev_task(unsigned long data)
|
|||
return;
|
||||
}
|
||||
|
||||
/* Process ctrl events events */
|
||||
/* Process ctrl events */
|
||||
ret = mhi_event->process_event(mhi_cntrl, mhi_event, U32_MAX);
|
||||
|
||||
/*
|
||||
|
|
@ -1430,7 +1430,7 @@ exit_unprepare_channel:
|
|||
}
|
||||
|
||||
int mhi_prepare_channel(struct mhi_controller *mhi_cntrl,
|
||||
struct mhi_chan *mhi_chan)
|
||||
struct mhi_chan *mhi_chan, unsigned int flags)
|
||||
{
|
||||
int ret = 0;
|
||||
struct device *dev = &mhi_chan->mhi_dev->dev;
|
||||
|
|
@ -1455,6 +1455,9 @@ int mhi_prepare_channel(struct mhi_controller *mhi_cntrl,
|
|||
if (ret)
|
||||
goto error_pm_state;
|
||||
|
||||
if (mhi_chan->dir == DMA_FROM_DEVICE)
|
||||
mhi_chan->pre_alloc = !!(flags & MHI_CH_INBOUND_ALLOC_BUFS);
|
||||
|
||||
/* Pre-allocate buffer for xfer ring */
|
||||
if (mhi_chan->pre_alloc) {
|
||||
int nr_el = get_nr_avail_ring_elements(mhi_cntrl,
|
||||
|
|
@ -1464,6 +1467,7 @@ int mhi_prepare_channel(struct mhi_controller *mhi_cntrl,
|
|||
while (nr_el--) {
|
||||
void *buf;
|
||||
struct mhi_buf_info info = { };
|
||||
|
||||
buf = kmalloc(len, GFP_KERNEL);
|
||||
if (!buf) {
|
||||
ret = -ENOMEM;
|
||||
|
|
@ -1609,8 +1613,7 @@ void mhi_reset_chan(struct mhi_controller *mhi_cntrl, struct mhi_chan *mhi_chan)
|
|||
read_unlock_bh(&mhi_cntrl->pm_lock);
|
||||
}
|
||||
|
||||
/* Move channel to start state */
|
||||
int mhi_prepare_for_transfer(struct mhi_device *mhi_dev)
|
||||
static int __mhi_prepare_for_transfer(struct mhi_device *mhi_dev, unsigned int flags)
|
||||
{
|
||||
int ret, dir;
|
||||
struct mhi_controller *mhi_cntrl = mhi_dev->mhi_cntrl;
|
||||
|
|
@ -1621,7 +1624,7 @@ int mhi_prepare_for_transfer(struct mhi_device *mhi_dev)
|
|||
if (!mhi_chan)
|
||||
continue;
|
||||
|
||||
ret = mhi_prepare_channel(mhi_cntrl, mhi_chan);
|
||||
ret = mhi_prepare_channel(mhi_cntrl, mhi_chan, flags);
|
||||
if (ret)
|
||||
goto error_open_chan;
|
||||
}
|
||||
|
|
@ -1639,8 +1642,19 @@ error_open_chan:
|
|||
|
||||
return ret;
|
||||
}
|
||||
|
||||
int mhi_prepare_for_transfer(struct mhi_device *mhi_dev)
|
||||
{
|
||||
return __mhi_prepare_for_transfer(mhi_dev, 0);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(mhi_prepare_for_transfer);
|
||||
|
||||
int mhi_prepare_for_transfer_autoqueue(struct mhi_device *mhi_dev)
|
||||
{
|
||||
return __mhi_prepare_for_transfer(mhi_dev, MHI_CH_INBOUND_ALLOC_BUFS);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(mhi_prepare_for_transfer_autoqueue);
|
||||
|
||||
void mhi_unprepare_from_transfer(struct mhi_device *mhi_dev)
|
||||
{
|
||||
struct mhi_controller *mhi_cntrl = mhi_dev->mhi_cntrl;
|
||||
|
|
|
|||
|
|
@ -42,7 +42,7 @@
|
|||
* L3: LD_ERR_FATAL_DETECT <--> LD_ERR_FATAL_DETECT
|
||||
* LD_ERR_FATAL_DETECT -> DISABLE
|
||||
*/
|
||||
static struct mhi_pm_transitions const dev_state_transitions[] = {
|
||||
static const struct mhi_pm_transitions dev_state_transitions[] = {
|
||||
/* L0 States */
|
||||
{
|
||||
MHI_PM_DISABLE,
|
||||
|
|
@ -1053,7 +1053,7 @@ int mhi_async_power_up(struct mhi_controller *mhi_cntrl)
|
|||
enum mhi_ee_type current_ee;
|
||||
enum dev_st_transition next_state;
|
||||
struct device *dev = &mhi_cntrl->mhi_dev->dev;
|
||||
u32 val;
|
||||
u32 interval_us = 25000; /* poll register field every 25 milliseconds */
|
||||
int ret;
|
||||
|
||||
dev_info(dev, "Requested to power ON\n");
|
||||
|
|
@ -1070,10 +1070,6 @@ int mhi_async_power_up(struct mhi_controller *mhi_cntrl)
|
|||
mutex_lock(&mhi_cntrl->pm_mutex);
|
||||
mhi_cntrl->pm_state = MHI_PM_DISABLE;
|
||||
|
||||
ret = mhi_init_irq_setup(mhi_cntrl);
|
||||
if (ret)
|
||||
goto error_setup_irq;
|
||||
|
||||
/* Setup BHI INTVEC */
|
||||
write_lock_irq(&mhi_cntrl->pm_lock);
|
||||
mhi_write_reg(mhi_cntrl, mhi_cntrl->bhi, BHI_INTVEC, 0);
|
||||
|
|
@ -1083,11 +1079,11 @@ int mhi_async_power_up(struct mhi_controller *mhi_cntrl)
|
|||
write_unlock_irq(&mhi_cntrl->pm_lock);
|
||||
|
||||
/* Confirm that the device is in valid exec env */
|
||||
if (!MHI_IN_PBL(current_ee) && current_ee != MHI_EE_AMSS) {
|
||||
if (!MHI_POWER_UP_CAPABLE(current_ee)) {
|
||||
dev_err(dev, "%s is not a valid EE for power on\n",
|
||||
TO_MHI_EXEC_STR(current_ee));
|
||||
ret = -EIO;
|
||||
goto error_async_power_up;
|
||||
goto error_exit;
|
||||
}
|
||||
|
||||
state = mhi_get_mhi_state(mhi_cntrl);
|
||||
|
|
@ -1096,20 +1092,12 @@ int mhi_async_power_up(struct mhi_controller *mhi_cntrl)
|
|||
|
||||
if (state == MHI_STATE_SYS_ERR) {
|
||||
mhi_set_mhi_state(mhi_cntrl, MHI_STATE_RESET);
|
||||
ret = wait_event_timeout(mhi_cntrl->state_event,
|
||||
MHI_PM_IN_FATAL_STATE(mhi_cntrl->pm_state) ||
|
||||
mhi_read_reg_field(mhi_cntrl,
|
||||
mhi_cntrl->regs,
|
||||
MHICTRL,
|
||||
MHICTRL_RESET_MASK,
|
||||
MHICTRL_RESET_SHIFT,
|
||||
&val) ||
|
||||
!val,
|
||||
msecs_to_jiffies(mhi_cntrl->timeout_ms));
|
||||
if (!ret) {
|
||||
ret = -EIO;
|
||||
ret = mhi_poll_reg_field(mhi_cntrl, mhi_cntrl->regs, MHICTRL,
|
||||
MHICTRL_RESET_MASK, MHICTRL_RESET_SHIFT, 0,
|
||||
interval_us);
|
||||
if (ret) {
|
||||
dev_info(dev, "Failed to reset MHI due to syserr state\n");
|
||||
goto error_async_power_up;
|
||||
goto error_exit;
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
@ -1119,6 +1107,10 @@ int mhi_async_power_up(struct mhi_controller *mhi_cntrl)
|
|||
mhi_write_reg(mhi_cntrl, mhi_cntrl->bhi, BHI_INTVEC, 0);
|
||||
}
|
||||
|
||||
ret = mhi_init_irq_setup(mhi_cntrl);
|
||||
if (ret)
|
||||
goto error_exit;
|
||||
|
||||
/* Transition to next state */
|
||||
next_state = MHI_IN_PBL(current_ee) ?
|
||||
DEV_ST_TRANSITION_PBL : DEV_ST_TRANSITION_READY;
|
||||
|
|
@ -1131,10 +1123,7 @@ int mhi_async_power_up(struct mhi_controller *mhi_cntrl)
|
|||
|
||||
return 0;
|
||||
|
||||
error_async_power_up:
|
||||
mhi_deinit_free_irq(mhi_cntrl);
|
||||
|
||||
error_setup_irq:
|
||||
error_exit:
|
||||
mhi_cntrl->pm_state = MHI_PM_DISABLE;
|
||||
mutex_unlock(&mhi_cntrl->pm_mutex);
|
||||
|
||||
|
|
|
|||
|
|
@ -403,7 +403,50 @@ static const struct mhi_pci_dev_info mhi_mv31_info = {
|
|||
.dma_data_width = 32,
|
||||
};
|
||||
|
||||
static const struct mhi_channel_config mhi_sierra_em919x_channels[] = {
|
||||
MHI_CHANNEL_CONFIG_UL_SBL(2, "SAHARA", 32, 0),
|
||||
MHI_CHANNEL_CONFIG_DL_SBL(3, "SAHARA", 256, 0),
|
||||
MHI_CHANNEL_CONFIG_UL(4, "DIAG", 32, 0),
|
||||
MHI_CHANNEL_CONFIG_DL(5, "DIAG", 32, 0),
|
||||
MHI_CHANNEL_CONFIG_UL(12, "MBIM", 128, 0),
|
||||
MHI_CHANNEL_CONFIG_DL(13, "MBIM", 128, 0),
|
||||
MHI_CHANNEL_CONFIG_UL(14, "QMI", 32, 0),
|
||||
MHI_CHANNEL_CONFIG_DL(15, "QMI", 32, 0),
|
||||
MHI_CHANNEL_CONFIG_UL(32, "DUN", 32, 0),
|
||||
MHI_CHANNEL_CONFIG_DL(33, "DUN", 32, 0),
|
||||
MHI_CHANNEL_CONFIG_HW_UL(100, "IP_HW0", 512, 1),
|
||||
MHI_CHANNEL_CONFIG_HW_DL(101, "IP_HW0", 512, 2),
|
||||
};
|
||||
|
||||
static struct mhi_event_config modem_sierra_em919x_mhi_events[] = {
|
||||
/* first ring is control+data and DIAG ring */
|
||||
MHI_EVENT_CONFIG_CTRL(0, 2048),
|
||||
/* Hardware channels request dedicated hardware event rings */
|
||||
MHI_EVENT_CONFIG_HW_DATA(1, 2048, 100),
|
||||
MHI_EVENT_CONFIG_HW_DATA(2, 2048, 101)
|
||||
};
|
||||
|
||||
static const struct mhi_controller_config modem_sierra_em919x_config = {
|
||||
.max_channels = 128,
|
||||
.timeout_ms = 24000,
|
||||
.num_channels = ARRAY_SIZE(mhi_sierra_em919x_channels),
|
||||
.ch_cfg = mhi_sierra_em919x_channels,
|
||||
.num_events = ARRAY_SIZE(modem_sierra_em919x_mhi_events),
|
||||
.event_cfg = modem_sierra_em919x_mhi_events,
|
||||
};
|
||||
|
||||
static const struct mhi_pci_dev_info mhi_sierra_em919x_info = {
|
||||
.name = "sierra-em919x",
|
||||
.config = &modem_sierra_em919x_config,
|
||||
.bar_num = MHI_PCI_DEFAULT_BAR_NUM,
|
||||
.dma_data_width = 32,
|
||||
.sideband_wake = false,
|
||||
};
|
||||
|
||||
static const struct pci_device_id mhi_pci_id_table[] = {
|
||||
/* EM919x (sdx55), use the same vid:pid as qcom-sdx55m */
|
||||
{ PCI_DEVICE_SUB(PCI_VENDOR_ID_QCOM, 0x0306, 0x18d7, 0x0200),
|
||||
.driver_data = (kernel_ulong_t) &mhi_sierra_em919x_info },
|
||||
{ PCI_DEVICE(PCI_VENDOR_ID_QCOM, 0x0306),
|
||||
.driver_data = (kernel_ulong_t) &mhi_qcom_sdx55_info },
|
||||
{ PCI_DEVICE(PCI_VENDOR_ID_QCOM, 0x0304),
|
||||
|
|
@ -423,6 +466,9 @@ static const struct pci_device_id mhi_pci_id_table[] = {
|
|||
/* DW5930e (sdx55), Non-eSIM, It's also T99W175 */
|
||||
{ PCI_DEVICE(PCI_VENDOR_ID_FOXCONN, 0xe0b1),
|
||||
.driver_data = (kernel_ulong_t) &mhi_foxconn_sdx55_info },
|
||||
/* T99W175 (sdx55), Based on Qualcomm new baseline */
|
||||
{ PCI_DEVICE(PCI_VENDOR_ID_FOXCONN, 0xe0bf),
|
||||
.driver_data = (kernel_ulong_t) &mhi_foxconn_sdx55_info },
|
||||
/* MV31-W (Cinterion) */
|
||||
{ PCI_DEVICE(0x1269, 0x00b3),
|
||||
.driver_data = (kernel_ulong_t) &mhi_mv31_info },
|
||||
|
|
@ -529,18 +575,12 @@ static int mhi_pci_claim(struct mhi_controller *mhi_cntrl,
|
|||
mhi_cntrl->regs = pcim_iomap_table(pdev)[bar_num];
|
||||
mhi_cntrl->reg_len = pci_resource_len(pdev, bar_num);
|
||||
|
||||
err = pci_set_dma_mask(pdev, dma_mask);
|
||||
err = dma_set_mask_and_coherent(&pdev->dev, dma_mask);
|
||||
if (err) {
|
||||
dev_err(&pdev->dev, "Cannot set proper DMA mask\n");
|
||||
return err;
|
||||
}
|
||||
|
||||
err = pci_set_consistent_dma_mask(pdev, dma_mask);
|
||||
if (err) {
|
||||
dev_err(&pdev->dev, "set consistent dma mask failed\n");
|
||||
return err;
|
||||
}
|
||||
|
||||
pci_set_master(pdev);
|
||||
|
||||
return 0;
|
||||
|
|
@ -1018,7 +1058,7 @@ static int __maybe_unused mhi_pci_freeze(struct device *dev)
|
|||
* context.
|
||||
*/
|
||||
if (test_and_clear_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status)) {
|
||||
mhi_power_down(mhi_cntrl, false);
|
||||
mhi_power_down(mhi_cntrl, true);
|
||||
mhi_unprepare_after_power_down(mhi_cntrl);
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -89,8 +89,8 @@ static struct applicom_board {
|
|||
spinlock_t mutex;
|
||||
} apbs[MAX_BOARD];
|
||||
|
||||
static unsigned int irq = 0; /* interrupt number IRQ */
|
||||
static unsigned long mem = 0; /* physical segment of board */
|
||||
static unsigned int irq; /* interrupt number IRQ */
|
||||
static unsigned long mem; /* physical segment of board */
|
||||
|
||||
module_param_hw(irq, uint, irq, 0);
|
||||
MODULE_PARM_DESC(irq, "IRQ of the Applicom board");
|
||||
|
|
|
|||
|
|
@ -68,7 +68,7 @@ typedef struct {
|
|||
unsigned char ClockControl:1; /* RW: Clock control: 0=normal, 1=stop 3780i clocks */
|
||||
unsigned char SoftReset:1; /* RW: Soft reset 0=normal, 1=soft reset active */
|
||||
unsigned char ConfigMode:1; /* RW: Configuration mode, 0=normal, 1=config mode */
|
||||
unsigned char Reserved:5; /* 0: Reserved */
|
||||
unsigned short Reserved:13; /* 0: Reserved */
|
||||
} DSP_ISA_SLAVE_CONTROL;
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -9,8 +9,7 @@
|
|||
|
||||
#include <linux/vmalloc.h>
|
||||
#include <linux/slab.h>
|
||||
|
||||
#include "comedidev.h"
|
||||
#include <linux/comedi/comedidev.h>
|
||||
#include "comedi_internal.h"
|
||||
|
||||
#ifdef PAGE_KERNEL_NOCACHE
|
||||
|
|
|
|||
|
|
@ -23,7 +23,7 @@
|
|||
#include <linux/poll.h>
|
||||
#include <linux/device.h>
|
||||
#include <linux/fs.h>
|
||||
#include "comedidev.h"
|
||||
#include <linux/comedi/comedidev.h>
|
||||
#include <linux/cdev.h>
|
||||
|
||||
#include <linux/io.h>
|
||||
|
|
|
|||
|
|
@ -9,8 +9,7 @@
|
|||
|
||||
#include <linux/module.h>
|
||||
#include <linux/interrupt.h>
|
||||
|
||||
#include "comedi_pci.h"
|
||||
#include <linux/comedi/comedi_pci.h>
|
||||
|
||||
/**
|
||||
* comedi_to_pci_dev() - Return PCI device attached to COMEDI device
|
||||
|
|
|
|||
|
|
@ -9,8 +9,7 @@
|
|||
|
||||
#include <linux/module.h>
|
||||
#include <linux/kernel.h>
|
||||
|
||||
#include "comedi_pcmcia.h"
|
||||
#include <linux/comedi/comedi_pcmcia.h>
|
||||
|
||||
/**
|
||||
* comedi_to_pcmcia_dev() - Return PCMCIA device attached to COMEDI device
|
||||
|
|
|
|||
|
|
@ -8,8 +8,7 @@
|
|||
*/
|
||||
|
||||
#include <linux/module.h>
|
||||
|
||||
#include "comedi_usb.h"
|
||||
#include <linux/comedi/comedi_usb.h>
|
||||
|
||||
/**
|
||||
* comedi_to_usb_interface() - Return USB interface attached to COMEDI device
|
||||
|
|
|
|||
|
|
@ -17,8 +17,7 @@
|
|||
#include <linux/dma-direction.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/firmware.h>
|
||||
|
||||
#include "comedidev.h"
|
||||
#include <linux/comedi/comedidev.h>
|
||||
#include "comedi_internal.h"
|
||||
|
||||
struct comedi_driver *comedi_drivers;
|
||||
|
|
|
|||
|
|
@ -40,9 +40,8 @@
|
|||
*/
|
||||
|
||||
#include <linux/module.h>
|
||||
#include "../comedidev.h"
|
||||
|
||||
#include "8255.h"
|
||||
#include <linux/comedi/comedidev.h>
|
||||
#include <linux/comedi/comedi_8255.h>
|
||||
|
||||
static int dev_8255_attach(struct comedi_device *dev,
|
||||
struct comedi_devconfig *it)
|
||||
|
|
|
|||
|
|
@ -53,10 +53,8 @@
|
|||
*/
|
||||
|
||||
#include <linux/module.h>
|
||||
|
||||
#include "../comedi_pci.h"
|
||||
|
||||
#include "8255.h"
|
||||
#include <linux/comedi/comedi_pci.h>
|
||||
#include <linux/comedi/comedi_8255.h>
|
||||
|
||||
enum pci_8255_boardid {
|
||||
BOARD_ADLINK_PCI7224,
|
||||
|
|
|
|||
|
|
@ -63,8 +63,8 @@
|
|||
|
||||
#include <linux/module.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/comedi/comedi_pci.h>
|
||||
|
||||
#include "../comedi_pci.h"
|
||||
#include "amcc_s5933.h"
|
||||
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -14,8 +14,8 @@
|
|||
|
||||
#include <linux/module.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/comedi/comedi_pci.h>
|
||||
|
||||
#include "../comedi_pci.h"
|
||||
#include "amcc_s5933.h"
|
||||
#include "z8536.h"
|
||||
|
||||
|
|
|
|||
|
|
@ -14,8 +14,8 @@
|
|||
*/
|
||||
|
||||
#include <linux/module.h>
|
||||
#include <linux/comedi/comedi_pci.h>
|
||||
|
||||
#include "../comedi_pci.h"
|
||||
#include "addi_watchdog.h"
|
||||
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -68,8 +68,8 @@
|
|||
|
||||
#include <linux/module.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/comedi/comedi_pci.h>
|
||||
|
||||
#include "../comedi_pci.h"
|
||||
#include "addi_tcw.h"
|
||||
#include "addi_watchdog.h"
|
||||
|
||||
|
|
|
|||
|
|
@ -14,8 +14,7 @@
|
|||
*/
|
||||
|
||||
#include <linux/module.h>
|
||||
|
||||
#include "../comedi_pci.h"
|
||||
#include <linux/comedi/comedi_pci.h>
|
||||
|
||||
/*
|
||||
* Register I/O map
|
||||
|
|
|
|||
|
|
@ -16,8 +16,8 @@
|
|||
#include <linux/module.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/comedi/comedi_pci.h>
|
||||
|
||||
#include "../comedi_pci.h"
|
||||
#include "addi_watchdog.h"
|
||||
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -14,8 +14,8 @@
|
|||
*/
|
||||
|
||||
#include <linux/module.h>
|
||||
#include <linux/comedi/comedi_pci.h>
|
||||
|
||||
#include "../comedi_pci.h"
|
||||
#include "addi_watchdog.h"
|
||||
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -14,8 +14,8 @@
|
|||
|
||||
#include <linux/module.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/comedi/comedi_pci.h>
|
||||
|
||||
#include "../comedi_pci.h"
|
||||
#include "amcc_s5933.h"
|
||||
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -41,8 +41,8 @@
|
|||
*/
|
||||
|
||||
#include <linux/module.h>
|
||||
#include <linux/comedi/comedi_pci.h>
|
||||
|
||||
#include "../comedi_pci.h"
|
||||
#include "amcc_s5933.h"
|
||||
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -15,8 +15,7 @@
|
|||
|
||||
#include <linux/module.h>
|
||||
#include <linux/interrupt.h>
|
||||
|
||||
#include "../comedi_pci.h"
|
||||
#include <linux/comedi/comedi_pci.h>
|
||||
|
||||
#define CONV_UNIT_NS BIT(0)
|
||||
#define CONV_UNIT_US BIT(1)
|
||||
|
|
|
|||
|
|
@ -10,7 +10,7 @@
|
|||
*/
|
||||
|
||||
#include <linux/module.h>
|
||||
#include "../comedidev.h"
|
||||
#include <linux/comedi/comedidev.h>
|
||||
#include "addi_tcw.h"
|
||||
#include "addi_watchdog.h"
|
||||
|
||||
|
|
|
|||
|
|
@ -24,8 +24,7 @@
|
|||
|
||||
#include <linux/module.h>
|
||||
#include <linux/delay.h>
|
||||
|
||||
#include "../comedi_pci.h"
|
||||
#include <linux/comedi/comedi_pci.h>
|
||||
|
||||
/*
|
||||
* PCI-6208/6216-GL register map
|
||||
|
|
|
|||
|
|
@ -46,8 +46,7 @@
|
|||
*/
|
||||
|
||||
#include <linux/module.h>
|
||||
|
||||
#include "../comedi_pci.h"
|
||||
#include <linux/comedi/comedi_pci.h>
|
||||
|
||||
#include "plx9052.h"
|
||||
|
||||
|
|
|
|||
|
|
@ -19,8 +19,7 @@
|
|||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/module.h>
|
||||
|
||||
#include "../comedi_pci.h"
|
||||
#include <linux/comedi/comedi_pci.h>
|
||||
|
||||
#define PCI8164_AXIS(x) ((x) * 0x08)
|
||||
#define PCI8164_CMD_MSTS_REG 0x00
|
||||
|
|
|
|||
|
|
@ -42,11 +42,10 @@
|
|||
#include <linux/module.h>
|
||||
#include <linux/delay.h>
|
||||
#include <linux/interrupt.h>
|
||||
|
||||
#include "../comedi_pci.h"
|
||||
#include <linux/comedi/comedi_pci.h>
|
||||
#include <linux/comedi/comedi_8254.h>
|
||||
|
||||
#include "plx9052.h"
|
||||
#include "comedi_8254.h"
|
||||
|
||||
#define PCI9111_FIFO_HALF_SIZE 512
|
||||
|
||||
|
|
|
|||
|
|
@ -78,11 +78,10 @@
|
|||
#include <linux/gfp.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/io.h>
|
||||
|
||||
#include "../comedi_pci.h"
|
||||
#include <linux/comedi/comedi_pci.h>
|
||||
#include <linux/comedi/comedi_8254.h>
|
||||
|
||||
#include "amcc_s5933.h"
|
||||
#include "comedi_8254.h"
|
||||
|
||||
/*
|
||||
* PCI BAR2 Register map (dev->iobase)
|
||||
|
|
|
|||
|
|
@ -48,8 +48,7 @@
|
|||
|
||||
#include <linux/module.h>
|
||||
#include <linux/delay.h>
|
||||
|
||||
#include "../comedidev.h"
|
||||
#include <linux/comedi/comedidev.h>
|
||||
|
||||
/* address scheme (page 2.17 of the manual) */
|
||||
#define ADQ12B_CTREG 0x00
|
||||
|
|
|
|||
|
|
@ -30,10 +30,9 @@
|
|||
|
||||
#include <linux/module.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/comedi/comedi_pci.h>
|
||||
#include <linux/comedi/comedi_8254.h>
|
||||
|
||||
#include "../comedi_pci.h"
|
||||
|
||||
#include "comedi_8254.h"
|
||||
#include "amcc_s5933.h"
|
||||
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -42,8 +42,7 @@
|
|||
|
||||
#include <linux/module.h>
|
||||
#include <linux/delay.h>
|
||||
|
||||
#include "../comedi_pci.h"
|
||||
#include <linux/comedi/comedi_pci.h>
|
||||
|
||||
/*
|
||||
* PCI BAR2 Register map (dev->iobase)
|
||||
|
|
|
|||
|
|
@ -32,8 +32,7 @@
|
|||
*/
|
||||
|
||||
#include <linux/module.h>
|
||||
|
||||
#include "../comedi_pci.h"
|
||||
#include <linux/comedi/comedi_pci.h>
|
||||
|
||||
/*
|
||||
* PCI Bar 2 I/O Register map (dev->iobase)
|
||||
|
|
|
|||
|
|
@ -38,8 +38,7 @@
|
|||
*/
|
||||
|
||||
#include <linux/module.h>
|
||||
|
||||
#include "../comedi_pci.h"
|
||||
#include <linux/comedi/comedi_pci.h>
|
||||
|
||||
/*
|
||||
* PCI bar 2 Register I/O map (dev->iobase)
|
||||
|
|
|
|||
|
|
@ -22,8 +22,7 @@
|
|||
*/
|
||||
|
||||
#include <linux/module.h>
|
||||
|
||||
#include "../comedi_pci.h"
|
||||
#include <linux/comedi/comedi_pci.h>
|
||||
|
||||
/*
|
||||
* PCI-1760 Register Map
|
||||
|
|
|
|||
|
|
@ -23,11 +23,9 @@
|
|||
|
||||
#include <linux/module.h>
|
||||
#include <linux/delay.h>
|
||||
|
||||
#include "../comedi_pci.h"
|
||||
|
||||
#include "8255.h"
|
||||
#include "comedi_8254.h"
|
||||
#include <linux/comedi/comedi_pci.h>
|
||||
#include <linux/comedi/comedi_8255.h>
|
||||
#include <linux/comedi/comedi_8254.h>
|
||||
|
||||
/*
|
||||
* Register offset definitions
|
||||
|
|
|
|||
|
|
@ -22,10 +22,9 @@
|
|||
*/
|
||||
|
||||
#include <linux/module.h>
|
||||
#include "../comedidev.h"
|
||||
|
||||
#include "comedi_8254.h"
|
||||
#include "8255.h"
|
||||
#include <linux/comedi/comedidev.h>
|
||||
#include <linux/comedi/comedi_8255.h>
|
||||
#include <linux/comedi/comedi_8254.h>
|
||||
|
||||
/*
|
||||
* Register map
|
||||
|
|
|
|||
|
|
@ -30,8 +30,7 @@
|
|||
|
||||
#include <linux/module.h>
|
||||
#include <linux/interrupt.h>
|
||||
|
||||
#include "../comedidev.h"
|
||||
#include <linux/comedi/comedidev.h>
|
||||
|
||||
#define AIO_IIRO_16_RELAY_0_7 0x00
|
||||
#define AIO_IIRO_16_INPUT_0_7 0x01
|
||||
|
|
|
|||
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