staging: mt7621-pci: factor out 'mt7621_enable_phy' function
Factor out a new function 'mt7621_enable_phy' for enabling the pcie phy for each port and call it from 'mt7621_pcie_enable_port'. Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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6b767904b9
Коммит
3beb6da5d5
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@ -387,6 +387,14 @@ set_phy_for_ssc(struct mt7621_pcie_port *port)
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pcie_write(pcie, val, offset);
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}
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static void mt7621_enable_phy(struct mt7621_pcie_port *port)
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{
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/* MT7621 E2 */
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if ((*(unsigned int *)(0xbe00000c) & 0xFFFF) == 0x0101)
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bypass_pipe_rst(port);
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set_phy_for_ssc(port);
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}
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static void setup_cm_memory_region(struct resource *mem_resource)
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{
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resource_size_t mask;
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@ -565,6 +573,8 @@ static int mt7621_pcie_enable_port(struct mt7621_pcie_port *port)
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pcie_write(pcie, val, RALINK_PCI_PCIMSK_ADDR);
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}
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mt7621_enable_phy(port);
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return 0;
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}
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@ -652,9 +662,6 @@ static int mt7621_pci_probe(struct platform_device *pdev)
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dev_err(dev, "enabling port %d failed\n", slot);
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list_del(&port->list);
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} else {
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if ((*(unsigned int *)(0xbe00000c) & 0xFFFF) == 0x0101) // MT7621 E2
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bypass_pipe_rst(port);
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set_phy_for_ssc(port);
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val = read_config(pcie, slot, 0x70c);
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dev_info(dev, "Port %d N_FTS = %x\n", (unsigned int)val, slot);
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}
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