ASoC: SOF: Intel: override mclk_id for ES8336 support
Merge series from Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>: This patchset solves a known issue with ES8336 platforms wrt MCLK selection. Most of the devices use the MCLK0 signal, but some devices do use the MCLK1 signal. The MCLK is defined in the topology, it would be a nightmare to generate more topology files just for one MCLK difference. With a minor extension to the intel-nhlt library, the MCLK information can be found by parsing the NHLT table, and we can override the mclk_id at boot time. The only known issues for this platform remain the detection of GPIO and microphone connections, currently only possible with manual quirks. Thanks to Eugene J. Markow for testing this patchset.
This commit is contained in:
Mark Brown
Коммит
3c193b5f53
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@ -136,6 +136,8 @@ bool intel_nhlt_has_endpoint_type(struct nhlt_acpi_table *nhlt, u8 link_type);
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int intel_nhlt_ssp_endpoint_mask(struct nhlt_acpi_table *nhlt, u8 device_type);
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int intel_nhlt_ssp_mclk_mask(struct nhlt_acpi_table *nhlt, int ssp_num);
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struct nhlt_specific_cfg *
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intel_nhlt_get_endpoint_blob(struct device *dev, struct nhlt_acpi_table *nhlt,
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u32 bus_id, u8 link_type, u8 vbps, u8 bps,
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@ -169,6 +171,11 @@ static inline int intel_nhlt_ssp_endpoint_mask(struct nhlt_acpi_table *nhlt, u8
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return 0;
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}
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static inline int intel_nhlt_ssp_mclk_mask(struct nhlt_acpi_table *nhlt, int ssp_num)
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{
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return 0;
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}
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static inline struct nhlt_specific_cfg *
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intel_nhlt_get_endpoint_blob(struct device *dev, struct nhlt_acpi_table *nhlt,
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u32 bus_id, u8 link_type, u8 vbps, u8 bps,
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@ -157,6 +157,85 @@ int intel_nhlt_ssp_endpoint_mask(struct nhlt_acpi_table *nhlt, u8 device_type)
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}
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EXPORT_SYMBOL(intel_nhlt_ssp_endpoint_mask);
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#define SSP_BLOB_V1_0_SIZE 84
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#define SSP_BLOB_V1_0_MDIVC_OFFSET 19 /* offset in u32 */
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#define SSP_BLOB_V1_5_SIZE 96
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#define SSP_BLOB_V1_5_MDIVC_OFFSET 21 /* offset in u32 */
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#define SSP_BLOB_VER_1_5 0xEE000105
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#define SSP_BLOB_V2_0_SIZE 88
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#define SSP_BLOB_V2_0_MDIVC_OFFSET 20 /* offset in u32 */
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#define SSP_BLOB_VER_2_0 0xEE000200
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int intel_nhlt_ssp_mclk_mask(struct nhlt_acpi_table *nhlt, int ssp_num)
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{
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struct nhlt_endpoint *epnt;
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struct nhlt_fmt *fmt;
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struct nhlt_fmt_cfg *cfg;
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int mclk_mask = 0;
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int i, j;
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if (!nhlt)
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return 0;
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epnt = (struct nhlt_endpoint *)nhlt->desc;
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for (i = 0; i < nhlt->endpoint_count; i++) {
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/* we only care about endpoints connected to an audio codec over SSP */
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if (epnt->linktype == NHLT_LINK_SSP &&
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epnt->device_type == NHLT_DEVICE_I2S &&
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epnt->virtual_bus_id == ssp_num) {
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fmt = (struct nhlt_fmt *)(epnt->config.caps + epnt->config.size);
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cfg = fmt->fmt_config;
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/*
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* In theory all formats should use the same MCLK but it doesn't hurt to
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* double-check that the configuration is consistent
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*/
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for (j = 0; j < fmt->fmt_count; j++) {
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u32 *blob;
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int mdivc_offset;
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int size;
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/* first check we have enough data to read the blob type */
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if (cfg->config.size < 8)
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return -EINVAL;
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blob = (u32 *)cfg->config.caps;
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if (blob[1] == SSP_BLOB_VER_2_0) {
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mdivc_offset = SSP_BLOB_V2_0_MDIVC_OFFSET;
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size = SSP_BLOB_V2_0_SIZE;
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} else if (blob[1] == SSP_BLOB_VER_1_5) {
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mdivc_offset = SSP_BLOB_V1_5_MDIVC_OFFSET;
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size = SSP_BLOB_V1_5_SIZE;
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} else {
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mdivc_offset = SSP_BLOB_V1_0_MDIVC_OFFSET;
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size = SSP_BLOB_V1_0_SIZE;
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}
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/* make sure we have enough data for the fixed part of the blob */
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if (cfg->config.size < size)
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return -EINVAL;
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mclk_mask |= blob[mdivc_offset] & GENMASK(1, 0);
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cfg = (struct nhlt_fmt_cfg *)(cfg->config.caps + cfg->config.size);
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}
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}
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epnt = (struct nhlt_endpoint *)((u8 *)epnt + epnt->length);
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}
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/* make sure only one MCLK is used */
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if (hweight_long(mclk_mask) != 1)
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return -EINVAL;
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return mclk_mask;
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}
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EXPORT_SYMBOL(intel_nhlt_ssp_mclk_mask);
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static struct nhlt_specific_cfg *
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nhlt_get_specific_cfg(struct device *dev, struct nhlt_fmt *fmt, u8 num_ch,
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u32 rate, u8 vbps, u8 bps)
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@ -379,6 +379,10 @@ static int dmic_num_override = -1;
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module_param_named(dmic_num, dmic_num_override, int, 0444);
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MODULE_PARM_DESC(dmic_num, "SOF HDA DMIC number");
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static int mclk_id_override = -1;
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module_param_named(mclk_id, mclk_id_override, int, 0444);
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MODULE_PARM_DESC(mclk_id, "SOF SSP mclk_id");
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#if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA)
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static bool hda_codec_use_common_hdmi = IS_ENABLED(CONFIG_SND_HDA_CODEC_HDMI);
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module_param_named(use_common_hdmi, hda_codec_use_common_hdmi, bool, 0444);
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@ -752,6 +756,18 @@ static int check_nhlt_ssp_mask(struct snd_sof_dev *sdev)
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return ssp_mask;
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}
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static int check_nhlt_ssp_mclk_mask(struct snd_sof_dev *sdev, int ssp_num)
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{
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struct sof_intel_hda_dev *hdev = sdev->pdata->hw_pdata;
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struct nhlt_acpi_table *nhlt;
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nhlt = hdev->nhlt;
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if (!nhlt)
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return 0;
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return intel_nhlt_ssp_mclk_mask(nhlt, ssp_num);
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}
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#if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA) || IS_ENABLED(CONFIG_SND_SOC_SOF_INTEL_SOUNDWIRE)
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static const char *fixup_tplg_name(struct snd_sof_dev *sdev,
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@ -1540,6 +1556,7 @@ struct snd_soc_acpi_mach *hda_machine_select(struct snd_sof_dev *sdev)
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mach->mach_params.i2s_link_mask) {
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const struct sof_intel_dsp_desc *chip = get_chip_info(sdev->pdata);
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int ssp_num;
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int mclk_mask;
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if (hweight_long(mach->mach_params.i2s_link_mask) > 1 &&
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!(mach->tplg_quirk_mask & SND_SOC_ACPI_TPLG_INTEL_SSP_MSB))
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@ -1564,6 +1581,21 @@ struct snd_soc_acpi_mach *hda_machine_select(struct snd_sof_dev *sdev)
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sof_pdata->tplg_filename = tplg_filename;
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add_extension = true;
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mclk_mask = check_nhlt_ssp_mclk_mask(sdev, ssp_num);
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if (mclk_mask < 0) {
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dev_err(sdev->dev, "Invalid MCLK configuration\n");
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return NULL;
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}
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dev_dbg(sdev->dev, "MCLK mask %#x found in NHLT\n", mclk_mask);
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if (mclk_mask) {
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dev_info(sdev->dev, "Overriding topology with MCLK mask %#x from NHLT\n", mclk_mask);
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sdev->mclk_id_override = true;
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sdev->mclk_id_quirk = (mclk_mask & BIT(0)) ? 0 : 1;
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}
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}
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if (tplg_fixup && add_extension) {
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@ -1576,6 +1608,13 @@ struct snd_soc_acpi_mach *hda_machine_select(struct snd_sof_dev *sdev)
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sof_pdata->tplg_filename = tplg_filename;
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}
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/* check if mclk_id should be modified from topology defaults */
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if (mclk_id_override >= 0) {
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dev_info(sdev->dev, "Overriding topology with MCLK %d from kernel_parameter\n", mclk_id_override);
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sdev->mclk_id_override = true;
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sdev->mclk_id_quirk = mclk_id_override;
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}
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}
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/*
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@ -435,6 +435,8 @@
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#define APL_SSP_COUNT 6
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#define CNL_SSP_COUNT 3
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#define ICL_SSP_COUNT 6
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#define TGL_SSP_COUNT 3
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#define MTL_SSP_COUNT 3
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/* SSP Registers */
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#define SSP_SSC1_OFFSET 0x4
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@ -785,7 +785,7 @@ const struct sof_intel_dsp_desc mtl_chip_info = {
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.ipc_ctl = MTL_DSP_REG_HFIPCXCTL,
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.rom_status_reg = MTL_DSP_ROM_STS,
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.rom_init_timeout = 300,
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.ssp_count = ICL_SSP_COUNT,
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.ssp_count = MTL_SSP_COUNT,
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.ssp_base_offset = CNL_SSP_BASE_OFFSET,
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.sdw_shim_base = SDW_SHIM_BASE_ACE,
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.sdw_alh_base = SDW_ALH_BASE_ACE,
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@ -123,7 +123,7 @@ const struct sof_intel_dsp_desc tgl_chip_info = {
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.ipc_ctl = CNL_DSP_REG_HIPCCTL,
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.rom_status_reg = HDA_DSP_SRAM_REG_ROM_STATUS,
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.rom_init_timeout = 300,
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.ssp_count = ICL_SSP_COUNT,
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.ssp_count = TGL_SSP_COUNT,
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.ssp_base_offset = CNL_SSP_BASE_OFFSET,
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.sdw_shim_base = SDW_SHIM_BASE,
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.sdw_alh_base = SDW_ALH_BASE,
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@ -146,7 +146,7 @@ const struct sof_intel_dsp_desc tglh_chip_info = {
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.ipc_ctl = CNL_DSP_REG_HIPCCTL,
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.rom_status_reg = HDA_DSP_SRAM_REG_ROM_STATUS,
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.rom_init_timeout = 300,
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.ssp_count = ICL_SSP_COUNT,
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.ssp_count = TGL_SSP_COUNT,
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.ssp_base_offset = CNL_SSP_BASE_OFFSET,
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.sdw_shim_base = SDW_SHIM_BASE,
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.sdw_alh_base = SDW_ALH_BASE,
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@ -169,7 +169,7 @@ const struct sof_intel_dsp_desc ehl_chip_info = {
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.ipc_ctl = CNL_DSP_REG_HIPCCTL,
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.rom_status_reg = HDA_DSP_SRAM_REG_ROM_STATUS,
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.rom_init_timeout = 300,
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.ssp_count = ICL_SSP_COUNT,
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.ssp_count = TGL_SSP_COUNT,
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.ssp_base_offset = CNL_SSP_BASE_OFFSET,
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.sdw_shim_base = SDW_SHIM_BASE,
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.sdw_alh_base = SDW_ALH_BASE,
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@ -192,7 +192,7 @@ const struct sof_intel_dsp_desc adls_chip_info = {
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.ipc_ctl = CNL_DSP_REG_HIPCCTL,
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.rom_status_reg = HDA_DSP_SRAM_REG_ROM_STATUS,
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.rom_init_timeout = 300,
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.ssp_count = ICL_SSP_COUNT,
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.ssp_count = TGL_SSP_COUNT,
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.ssp_base_offset = CNL_SSP_BASE_OFFSET,
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.sdw_shim_base = SDW_SHIM_BASE,
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.sdw_alh_base = SDW_ALH_BASE,
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@ -1249,6 +1249,7 @@ static int sof_link_afe_load(struct snd_soc_component *scomp, struct snd_sof_dai
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static int sof_link_ssp_load(struct snd_soc_component *scomp, struct snd_sof_dai_link *slink,
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struct sof_ipc_dai_config *config, struct snd_sof_dai *dai)
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{
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struct snd_sof_dev *sdev = snd_soc_component_get_drvdata(scomp);
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struct snd_soc_tplg_hw_config *hw_config = slink->hw_configs;
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struct sof_dai_private_data *private = dai->private;
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u32 size = sizeof(*config);
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@ -1273,6 +1274,12 @@ static int sof_link_ssp_load(struct snd_soc_component *scomp, struct snd_sof_dai
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config[i].hdr.size = size;
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if (sdev->mclk_id_override) {
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dev_dbg(scomp->dev, "tplg: overriding topology mclk_id %d by quirk %d\n",
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config[i].ssp.mclk_id, sdev->mclk_id_quirk);
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config[i].ssp.mclk_id = sdev->mclk_id_quirk;
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}
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/* copy differentiating hw configs to ipc structs */
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config[i].ssp.mclk_rate = le32_to_cpu(hw_config[i].mclk_rate);
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config[i].ssp.bclk_rate = le32_to_cpu(hw_config[i].bclk_rate);
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@ -601,6 +601,10 @@ struct snd_sof_dev {
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/* to protect the ipc_rx_handler_list and dsp_state_handler_list list */
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struct mutex client_event_handler_mutex;
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/* quirks to override topology values */
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bool mclk_id_override;
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u16 mclk_id_quirk; /* same size as in IPC3 definitions */
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void *private; /* core does not touch this */
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};
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