[HIFN]: Endianess fixes
HIFN uses little-endian by default, move cpu_to_le32 conversion to hifn_write_0/ hifn_write_1, add sparse annotations and fix an invalid endian conversion in hifn_setup_src_desc. Signed-off-by: Patrick McHardy <kaber@trash.net> Acked-by: Evgeniy Polyakov <johnpol@2ka.mipt.ru> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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b10c170638
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3c42cbc2e0
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@ -535,10 +535,10 @@ struct hifn_crypt_command
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*/
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struct hifn_mac_command
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{
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volatile u16 masks;
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volatile u16 header_skip;
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volatile u16 source_count;
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volatile u16 reserved;
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volatile __le16 masks;
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volatile __le16 header_skip;
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volatile __le16 source_count;
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volatile __le16 reserved;
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};
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#define HIFN_MAC_CMD_ALG_MASK 0x0001
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@ -564,10 +564,10 @@ struct hifn_mac_command
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struct hifn_comp_command
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{
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volatile u16 masks;
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volatile u16 header_skip;
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volatile u16 source_count;
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volatile u16 reserved;
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volatile __le16 masks;
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volatile __le16 header_skip;
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volatile __le16 source_count;
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volatile __le16 reserved;
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};
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#define HIFN_COMP_CMD_SRCLEN_M 0xc000
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@ -583,10 +583,10 @@ struct hifn_comp_command
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struct hifn_base_result
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{
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volatile u16 flags;
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volatile u16 session;
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volatile u16 src_cnt; /* 15:0 of source count */
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volatile u16 dst_cnt; /* 15:0 of dest count */
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volatile __le16 flags;
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volatile __le16 session;
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volatile __le16 src_cnt; /* 15:0 of source count */
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volatile __le16 dst_cnt; /* 15:0 of dest count */
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};
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#define HIFN_BASE_RES_DSTOVERRUN 0x0200 /* destination overrun */
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@ -597,8 +597,8 @@ struct hifn_base_result
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struct hifn_comp_result
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{
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volatile u16 flags;
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volatile u16 crc;
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volatile __le16 flags;
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volatile __le16 crc;
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};
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#define HIFN_COMP_RES_LCB_M 0xff00 /* longitudinal check byte */
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@ -609,8 +609,8 @@ struct hifn_comp_result
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struct hifn_mac_result
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{
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volatile u16 flags;
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volatile u16 reserved;
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volatile __le16 flags;
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volatile __le16 reserved;
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/* followed by 0, 6, 8, or 10 u16's of the MAC, then crypt */
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};
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@ -619,8 +619,8 @@ struct hifn_mac_result
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struct hifn_crypt_result
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{
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volatile u16 flags;
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volatile u16 reserved;
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volatile __le16 flags;
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volatile __le16 reserved;
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};
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#define HIFN_CRYPT_RES_SRC_NOTZERO 0x0001 /* source expired */
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@ -686,12 +686,12 @@ static inline u32 hifn_read_1(struct hifn_device *dev, u32 reg)
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static inline void hifn_write_0(struct hifn_device *dev, u32 reg, u32 val)
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{
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writel(val, dev->bar[0] + reg);
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writel((__force u32)cpu_to_le32(val), dev->bar[0] + reg);
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}
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static inline void hifn_write_1(struct hifn_device *dev, u32 reg, u32 val)
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{
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writel(val, dev->bar[1] + reg);
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writel((__force u32)cpu_to_le32(val), dev->bar[1] + reg);
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}
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static void hifn_wait_puc(struct hifn_device *dev)
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@ -1037,14 +1037,14 @@ static void hifn_init_registers(struct hifn_device *dev)
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hifn_write_0(dev, HIFN_0_PUIER, HIFN_PUIER_DSTOVER);
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/* write all 4 ring address registers */
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hifn_write_1(dev, HIFN_1_DMA_CRAR, __cpu_to_le32(dptr +
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offsetof(struct hifn_dma, cmdr[0])));
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hifn_write_1(dev, HIFN_1_DMA_SRAR, __cpu_to_le32(dptr +
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offsetof(struct hifn_dma, srcr[0])));
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hifn_write_1(dev, HIFN_1_DMA_DRAR, __cpu_to_le32(dptr +
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offsetof(struct hifn_dma, dstr[0])));
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hifn_write_1(dev, HIFN_1_DMA_RRAR, __cpu_to_le32(dptr +
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offsetof(struct hifn_dma, resr[0])));
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hifn_write_1(dev, HIFN_1_DMA_CRAR, dptr +
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offsetof(struct hifn_dma, cmdr[0]));
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hifn_write_1(dev, HIFN_1_DMA_SRAR, dptr +
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offsetof(struct hifn_dma, srcr[0]));
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hifn_write_1(dev, HIFN_1_DMA_DRAR, dptr +
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offsetof(struct hifn_dma, dstr[0]));
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hifn_write_1(dev, HIFN_1_DMA_RRAR, dptr +
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offsetof(struct hifn_dma, resr[0]));
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mdelay(2);
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#if 0
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@ -1178,8 +1178,8 @@ static int hifn_setup_src_desc(struct hifn_device *dev, struct page *page,
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idx = dma->srci;
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dma->srcr[idx].p = __cpu_to_le32(addr);
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dma->srcr[idx].l = __cpu_to_le32(size) | HIFN_D_VALID |
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HIFN_D_MASKDONEIRQ | HIFN_D_NOINVALID | HIFN_D_LAST;
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dma->srcr[idx].l = __cpu_to_le32(size | HIFN_D_VALID |
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HIFN_D_MASKDONEIRQ | HIFN_D_NOINVALID | HIFN_D_LAST);
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if (++idx == HIFN_D_SRC_RSIZE) {
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dma->srcr[idx].l = __cpu_to_le32(HIFN_D_VALID |
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