irqchip/mips-gic: Use raw spinlock for gic_lock
Since we may hold gic_lock in hardirq context, use raw spinlock
makes more sense given that it is for low-level interrupt handling
routine and the critical section is small.
Fixes BUG:
[ 0.426106] =============================
[ 0.426257] [ BUG: Invalid wait context ]
[ 0.426422] 6.3.0-rc7-next-20230421-dirty #54 Not tainted
[ 0.426638] -----------------------------
[ 0.426766] swapper/0/1 is trying to lock:
[ 0.426954] ffffffff8104e7b8 (gic_lock){....}-{3:3}, at: gic_set_type+0x30/08
Fixes: 95150ae8b3
("irqchip: mips-gic: Implement irq_set_type callback")
Cc: stable@vger.kernel.org
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Reviewed-by: Serge Semin <fancer.lancer@gmail.com>
Tested-by: Serge Semin <fancer.lancer@gmail.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20230424103156.66753-3-jiaxun.yang@flygoat.com
This commit is contained in:
Родитель
2c6c9c0495
Коммит
3d6a0e4197
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@ -50,7 +50,7 @@ void __iomem *mips_gic_base;
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static DEFINE_PER_CPU_READ_MOSTLY(unsigned long[GIC_MAX_LONGS], pcpu_masks);
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static DEFINE_SPINLOCK(gic_lock);
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static DEFINE_RAW_SPINLOCK(gic_lock);
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static struct irq_domain *gic_irq_domain;
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static int gic_shared_intrs;
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static unsigned int gic_cpu_pin;
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@ -210,7 +210,7 @@ static int gic_set_type(struct irq_data *d, unsigned int type)
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irq = GIC_HWIRQ_TO_SHARED(d->hwirq);
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spin_lock_irqsave(&gic_lock, flags);
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raw_spin_lock_irqsave(&gic_lock, flags);
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switch (type & IRQ_TYPE_SENSE_MASK) {
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case IRQ_TYPE_EDGE_FALLING:
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pol = GIC_POL_FALLING_EDGE;
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@ -250,7 +250,7 @@ static int gic_set_type(struct irq_data *d, unsigned int type)
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else
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irq_set_chip_handler_name_locked(d, &gic_level_irq_controller,
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handle_level_irq, NULL);
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spin_unlock_irqrestore(&gic_lock, flags);
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raw_spin_unlock_irqrestore(&gic_lock, flags);
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return 0;
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}
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@ -268,7 +268,7 @@ static int gic_set_affinity(struct irq_data *d, const struct cpumask *cpumask,
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return -EINVAL;
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/* Assumption : cpumask refers to a single CPU */
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spin_lock_irqsave(&gic_lock, flags);
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raw_spin_lock_irqsave(&gic_lock, flags);
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/* Re-route this IRQ */
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write_gic_map_vp(irq, BIT(mips_cm_vp_id(cpu)));
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@ -279,7 +279,7 @@ static int gic_set_affinity(struct irq_data *d, const struct cpumask *cpumask,
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set_bit(irq, per_cpu_ptr(pcpu_masks, cpu));
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irq_data_update_effective_affinity(d, cpumask_of(cpu));
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spin_unlock_irqrestore(&gic_lock, flags);
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raw_spin_unlock_irqrestore(&gic_lock, flags);
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return IRQ_SET_MASK_OK;
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}
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@ -357,12 +357,12 @@ static void gic_mask_local_irq_all_vpes(struct irq_data *d)
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cd = irq_data_get_irq_chip_data(d);
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cd->mask = false;
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spin_lock_irqsave(&gic_lock, flags);
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raw_spin_lock_irqsave(&gic_lock, flags);
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for_each_online_cpu(cpu) {
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write_gic_vl_other(mips_cm_vp_id(cpu));
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write_gic_vo_rmask(BIT(intr));
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}
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spin_unlock_irqrestore(&gic_lock, flags);
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raw_spin_unlock_irqrestore(&gic_lock, flags);
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}
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static void gic_unmask_local_irq_all_vpes(struct irq_data *d)
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@ -375,12 +375,12 @@ static void gic_unmask_local_irq_all_vpes(struct irq_data *d)
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cd = irq_data_get_irq_chip_data(d);
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cd->mask = true;
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spin_lock_irqsave(&gic_lock, flags);
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raw_spin_lock_irqsave(&gic_lock, flags);
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for_each_online_cpu(cpu) {
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write_gic_vl_other(mips_cm_vp_id(cpu));
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write_gic_vo_smask(BIT(intr));
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}
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spin_unlock_irqrestore(&gic_lock, flags);
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raw_spin_unlock_irqrestore(&gic_lock, flags);
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}
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static void gic_all_vpes_irq_cpu_online(void)
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@ -393,7 +393,7 @@ static void gic_all_vpes_irq_cpu_online(void)
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unsigned long flags;
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int i;
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spin_lock_irqsave(&gic_lock, flags);
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raw_spin_lock_irqsave(&gic_lock, flags);
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for (i = 0; i < ARRAY_SIZE(local_intrs); i++) {
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unsigned int intr = local_intrs[i];
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@ -407,7 +407,7 @@ static void gic_all_vpes_irq_cpu_online(void)
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write_gic_vl_smask(BIT(intr));
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}
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spin_unlock_irqrestore(&gic_lock, flags);
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raw_spin_unlock_irqrestore(&gic_lock, flags);
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}
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static struct irq_chip gic_all_vpes_local_irq_controller = {
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@ -437,11 +437,11 @@ static int gic_shared_irq_domain_map(struct irq_domain *d, unsigned int virq,
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data = irq_get_irq_data(virq);
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spin_lock_irqsave(&gic_lock, flags);
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raw_spin_lock_irqsave(&gic_lock, flags);
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write_gic_map_pin(intr, GIC_MAP_PIN_MAP_TO_PIN | gic_cpu_pin);
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write_gic_map_vp(intr, BIT(mips_cm_vp_id(cpu)));
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irq_data_update_effective_affinity(data, cpumask_of(cpu));
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spin_unlock_irqrestore(&gic_lock, flags);
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raw_spin_unlock_irqrestore(&gic_lock, flags);
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return 0;
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}
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@ -533,12 +533,12 @@ static int gic_irq_domain_map(struct irq_domain *d, unsigned int virq,
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if (!gic_local_irq_is_routable(intr))
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return -EPERM;
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spin_lock_irqsave(&gic_lock, flags);
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raw_spin_lock_irqsave(&gic_lock, flags);
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for_each_online_cpu(cpu) {
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write_gic_vl_other(mips_cm_vp_id(cpu));
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write_gic_vo_map(mips_gic_vx_map_reg(intr), map);
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}
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spin_unlock_irqrestore(&gic_lock, flags);
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raw_spin_unlock_irqrestore(&gic_lock, flags);
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return 0;
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}
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