Blackfin arch: Remove wasted SIR header files
Signed-off-by: Graf Yang <graf.yang@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
This commit is contained in:
Родитель
42bd8bcb2f
Коммит
3d7c603ed4
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@ -1,142 +0,0 @@
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/*
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* Blackfin Infra-red Driver
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*
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* Copyright 2006-2008 Analog Devices Inc.
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*
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* Enter bugs at http://blackfin.uclinux.org/
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*
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* Licensed under the GPL-2 or later.
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*
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*/
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#include <linux/serial.h>
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#include <asm/dma.h>
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#include <asm/portmux.h>
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#define SIR_UART_GET_CHAR(port) bfin_read16((port)->membase + OFFSET_RBR)
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#define SIR_UART_GET_DLL(port) bfin_read16((port)->membase + OFFSET_DLL)
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#define SIR_UART_GET_IER(port) bfin_read16((port)->membase + OFFSET_IER)
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#define SIR_UART_GET_DLH(port) bfin_read16((port)->membase + OFFSET_DLH)
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#define SIR_UART_GET_IIR(port) bfin_read16((port)->membase + OFFSET_IIR)
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#define SIR_UART_GET_LCR(port) bfin_read16((port)->membase + OFFSET_LCR)
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#define SIR_UART_GET_GCTL(port) bfin_read16((port)->membase + OFFSET_GCTL)
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#define SIR_UART_PUT_CHAR(port, v) bfin_write16(((port)->membase + OFFSET_THR), v)
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#define SIR_UART_PUT_DLL(port, v) bfin_write16(((port)->membase + OFFSET_DLL), v)
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#define SIR_UART_PUT_IER(port, v) bfin_write16(((port)->membase + OFFSET_IER), v)
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#define SIR_UART_PUT_DLH(port, v) bfin_write16(((port)->membase + OFFSET_DLH), v)
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#define SIR_UART_PUT_LCR(port, v) bfin_write16(((port)->membase + OFFSET_LCR), v)
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#define SIR_UART_PUT_GCTL(port, v) bfin_write16(((port)->membase + OFFSET_GCTL), v)
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#ifdef CONFIG_SIR_BFIN_DMA
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struct dma_rx_buf {
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char *buf;
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int head;
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int tail;
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};
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#endif /* CONFIG_SIR_BFIN_DMA */
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struct bfin_sir_port {
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unsigned char __iomem *membase;
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unsigned int irq;
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unsigned int lsr;
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unsigned long clk;
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struct net_device *dev;
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#ifdef CONFIG_SIR_BFIN_DMA
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int tx_done;
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struct dma_rx_buf rx_dma_buf;
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struct timer_list rx_dma_timer;
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int rx_dma_nrows;
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#endif /* CONFIG_SIR_BFIN_DMA */
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unsigned int tx_dma_channel;
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unsigned int rx_dma_channel;
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};
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struct bfin_sir_port sir_ports[BFIN_UART_NR_PORTS];
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struct bfin_sir_port_res {
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unsigned long base_addr;
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int irq;
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unsigned int rx_dma_channel;
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unsigned int tx_dma_channel;
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};
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struct bfin_sir_port_res bfin_sir_port_resource[] = {
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#ifdef CONFIG_BFIN_SIR0
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{
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0xFFC00400,
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IRQ_UART0_RX,
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CH_UART0_RX,
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CH_UART0_TX,
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},
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#endif
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#ifdef CONFIG_BFIN_SIR1
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{
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0xFFC02000,
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IRQ_UART1_RX,
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CH_UART1_RX,
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CH_UART1_TX,
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},
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#endif
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};
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int nr_sirs = ARRAY_SIZE(bfin_sir_port_resource);
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struct bfin_sir_self {
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struct bfin_sir_port *sir_port;
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spinlock_t lock;
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unsigned int open;
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int speed;
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int newspeed;
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struct sk_buff *txskb;
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struct sk_buff *rxskb;
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struct net_device_stats stats;
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struct device *dev;
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struct irlap_cb *irlap;
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struct qos_info qos;
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iobuff_t tx_buff;
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iobuff_t rx_buff;
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struct work_struct work;
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int mtt;
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};
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static inline unsigned int SIR_UART_GET_LSR(struct bfin_sir_port *port)
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{
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unsigned int lsr = bfin_read16(port->membase + OFFSET_LSR);
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port->lsr |= (lsr & (BI|FE|PE|OE));
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return lsr | port->lsr;
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}
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static inline void SIR_UART_CLEAR_LSR(struct bfin_sir_port *port)
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{
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port->lsr = 0;
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bfin_read16(port->membase + OFFSET_LSR);
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}
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#define DRIVER_NAME "bfin_sir"
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static int bfin_sir_hw_init(void)
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{
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int ret = -ENODEV;
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#ifdef CONFIG_BFIN_SIR0
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ret = peripheral_request(P_UART0_TX, DRIVER_NAME);
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if (ret)
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return ret;
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ret = peripheral_request(P_UART0_RX, DRIVER_NAME);
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if (ret)
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return ret;
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#endif
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#ifdef CONFIG_BFIN_SIR1
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ret = peripheral_request(P_UART1_TX, DRIVER_NAME);
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if (ret)
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return ret;
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ret = peripheral_request(P_UART1_RX, DRIVER_NAME);
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if (ret)
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return ret;
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#endif
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return ret;
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}
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@ -1,142 +0,0 @@
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/*
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* Blackfin Infra-red Driver
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*
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* Copyright 2006-2008 Analog Devices Inc.
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*
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* Enter bugs at http://blackfin.uclinux.org/
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*
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* Licensed under the GPL-2 or later.
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*
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*/
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#include <linux/serial.h>
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#include <asm/dma.h>
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#include <asm/portmux.h>
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#define SIR_UART_GET_CHAR(port) bfin_read16((port)->membase + OFFSET_RBR)
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#define SIR_UART_GET_DLL(port) bfin_read16((port)->membase + OFFSET_DLL)
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#define SIR_UART_GET_IER(port) bfin_read16((port)->membase + OFFSET_IER)
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#define SIR_UART_GET_DLH(port) bfin_read16((port)->membase + OFFSET_DLH)
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#define SIR_UART_GET_IIR(port) bfin_read16((port)->membase + OFFSET_IIR)
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#define SIR_UART_GET_LCR(port) bfin_read16((port)->membase + OFFSET_LCR)
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#define SIR_UART_GET_GCTL(port) bfin_read16((port)->membase + OFFSET_GCTL)
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#define SIR_UART_PUT_CHAR(port, v) bfin_write16(((port)->membase + OFFSET_THR), v)
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#define SIR_UART_PUT_DLL(port, v) bfin_write16(((port)->membase + OFFSET_DLL), v)
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#define SIR_UART_PUT_IER(port, v) bfin_write16(((port)->membase + OFFSET_IER), v)
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#define SIR_UART_PUT_DLH(port, v) bfin_write16(((port)->membase + OFFSET_DLH), v)
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#define SIR_UART_PUT_LCR(port, v) bfin_write16(((port)->membase + OFFSET_LCR), v)
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#define SIR_UART_PUT_GCTL(port, v) bfin_write16(((port)->membase + OFFSET_GCTL), v)
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#ifdef CONFIG_SIR_BFIN_DMA
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struct dma_rx_buf {
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char *buf;
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int head;
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int tail;
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};
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#endif /* CONFIG_SIR_BFIN_DMA */
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struct bfin_sir_port {
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unsigned char __iomem *membase;
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unsigned int irq;
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unsigned int lsr;
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unsigned long clk;
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struct net_device *dev;
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#ifdef CONFIG_SIR_BFIN_DMA
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int tx_done;
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struct dma_rx_buf rx_dma_buf;
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struct timer_list rx_dma_timer;
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int rx_dma_nrows;
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#endif /* CONFIG_SIR_BFIN_DMA */
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unsigned int tx_dma_channel;
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unsigned int rx_dma_channel;
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};
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struct bfin_sir_port sir_ports[BFIN_UART_NR_PORTS];
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struct bfin_sir_port_res {
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unsigned long base_addr;
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int irq;
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unsigned int rx_dma_channel;
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unsigned int tx_dma_channel;
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};
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struct bfin_sir_port_res bfin_sir_port_resource[] = {
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#ifdef CONFIG_BFIN_SIR0
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{
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0xFFC00400,
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IRQ_UART0_RX,
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CH_UART0_RX,
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CH_UART0_TX,
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},
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#endif
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#ifdef CONFIG_BFIN_SIR1
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{
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0xFFC02000,
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IRQ_UART1_RX,
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CH_UART1_RX,
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CH_UART1_TX,
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},
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#endif
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};
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int nr_sirs = ARRAY_SIZE(bfin_sir_port_resource);
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struct bfin_sir_self {
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struct bfin_sir_port *sir_port;
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spinlock_t lock;
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unsigned int open;
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int speed;
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int newspeed;
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struct sk_buff *txskb;
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struct sk_buff *rxskb;
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struct net_device_stats stats;
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struct device *dev;
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struct irlap_cb *irlap;
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struct qos_info qos;
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iobuff_t tx_buff;
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iobuff_t rx_buff;
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struct work_struct work;
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int mtt;
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};
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static inline unsigned int SIR_UART_GET_LSR(struct bfin_sir_port *port)
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{
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unsigned int lsr = bfin_read16(port->membase + OFFSET_LSR);
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port->lsr |= (lsr & (BI|FE|PE|OE));
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return lsr | port->lsr;
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}
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static inline void SIR_UART_CLEAR_LSR(struct bfin_sir_port *port)
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{
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port->lsr = 0;
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bfin_read16(port->membase + OFFSET_LSR);
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}
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#define DRIVER_NAME "bfin_sir"
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static int bfin_sir_hw_init(void)
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{
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int ret = -ENODEV;
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#ifdef CONFIG_BFIN_SIR0
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ret = peripheral_request(P_UART0_TX, DRIVER_NAME);
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if (ret)
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return ret;
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ret = peripheral_request(P_UART0_RX, DRIVER_NAME);
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if (ret)
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return ret;
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#endif
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#ifdef CONFIG_BFIN_SIR1
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ret = peripheral_request(P_UART1_TX, DRIVER_NAME);
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if (ret)
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return ret;
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ret = peripheral_request(P_UART1_RX, DRIVER_NAME);
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if (ret)
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return ret;
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#endif
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return ret;
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}
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@ -1,125 +0,0 @@
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/*
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* Blackfin Infra-red Driver
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*
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* Copyright 2006-2008 Analog Devices Inc.
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*
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* Enter bugs at http://blackfin.uclinux.org/
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*
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* Licensed under the GPL-2 or later.
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*
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*/
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#include <linux/serial.h>
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#include <asm/dma.h>
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#include <asm/portmux.h>
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#define SIR_UART_GET_CHAR(port) bfin_read16((port)->membase + OFFSET_RBR)
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#define SIR_UART_GET_DLL(port) bfin_read16((port)->membase + OFFSET_DLL)
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#define SIR_UART_GET_IER(port) bfin_read16((port)->membase + OFFSET_IER)
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#define SIR_UART_GET_DLH(port) bfin_read16((port)->membase + OFFSET_DLH)
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#define SIR_UART_GET_IIR(port) bfin_read16((port)->membase + OFFSET_IIR)
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#define SIR_UART_GET_LCR(port) bfin_read16((port)->membase + OFFSET_LCR)
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#define SIR_UART_GET_GCTL(port) bfin_read16((port)->membase + OFFSET_GCTL)
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#define SIR_UART_PUT_CHAR(port, v) bfin_write16(((port)->membase + OFFSET_THR), v)
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#define SIR_UART_PUT_DLL(port, v) bfin_write16(((port)->membase + OFFSET_DLL), v)
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#define SIR_UART_PUT_IER(port, v) bfin_write16(((port)->membase + OFFSET_IER), v)
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#define SIR_UART_PUT_DLH(port, v) bfin_write16(((port)->membase + OFFSET_DLH), v)
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#define SIR_UART_PUT_LCR(port, v) bfin_write16(((port)->membase + OFFSET_LCR), v)
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#define SIR_UART_PUT_GCTL(port, v) bfin_write16(((port)->membase + OFFSET_GCTL), v)
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#ifdef CONFIG_SIR_BFIN_DMA
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struct dma_rx_buf {
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char *buf;
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int head;
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int tail;
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};
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#endif /* CONFIG_SIR_BFIN_DMA */
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struct bfin_sir_port {
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unsigned char __iomem *membase;
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unsigned int irq;
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unsigned int lsr;
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unsigned long clk;
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struct net_device *dev;
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#ifdef CONFIG_SIR_BFIN_DMA
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int tx_done;
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struct dma_rx_buf rx_dma_buf;
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struct timer_list rx_dma_timer;
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int rx_dma_nrows;
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#endif /* CONFIG_SIR_BFIN_DMA */
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unsigned int tx_dma_channel;
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unsigned int rx_dma_channel;
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};
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struct bfin_sir_port sir_ports[BFIN_UART_NR_PORTS];
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struct bfin_sir_port_res {
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unsigned long base_addr;
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int irq;
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unsigned int rx_dma_channel;
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unsigned int tx_dma_channel;
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};
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struct bfin_sir_port_res bfin_sir_port_resource[] = {
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#ifdef CONFIG_BFIN_SIR0
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{
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0xFFC00400,
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IRQ_UART_RX,
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CH_UART_RX,
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CH_UART_TX,
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},
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#endif
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};
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int nr_sirs = ARRAY_SIZE(bfin_sir_port_resource);
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struct bfin_sir_self {
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struct bfin_sir_port *sir_port;
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spinlock_t lock;
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unsigned int open;
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int speed;
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int newspeed;
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struct sk_buff *txskb;
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struct sk_buff *rxskb;
|
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struct net_device_stats stats;
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struct device *dev;
|
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struct irlap_cb *irlap;
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struct qos_info qos;
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iobuff_t tx_buff;
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iobuff_t rx_buff;
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struct work_struct work;
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int mtt;
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};
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static inline unsigned int SIR_UART_GET_LSR(struct bfin_sir_port *port)
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{
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unsigned int lsr = bfin_read16(port->membase + OFFSET_LSR);
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port->lsr |= (lsr & (BI|FE|PE|OE));
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return lsr | port->lsr;
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}
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static inline void SIR_UART_CLEAR_LSR(struct bfin_sir_port *port)
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{
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port->lsr = 0;
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bfin_read16(port->membase + OFFSET_LSR);
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}
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#define DRIVER_NAME "bfin_sir"
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static int bfin_sir_hw_init(void)
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{
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int ret = -ENODEV;
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#ifdef CONFIG_BFIN_SIR0
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ret = peripheral_request(P_UART0_TX, DRIVER_NAME);
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if (ret)
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return ret;
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ret = peripheral_request(P_UART0_RX, DRIVER_NAME);
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if (ret)
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return ret;
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#endif
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return ret;
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}
|
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@ -1,142 +0,0 @@
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/*
|
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* Blackfin Infra-red Driver
|
||||
*
|
||||
* Copyright 2006-2008 Analog Devices Inc.
|
||||
*
|
||||
* Enter bugs at http://blackfin.uclinux.org/
|
||||
*
|
||||
* Licensed under the GPL-2 or later.
|
||||
*
|
||||
*/
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||||
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#include <linux/serial.h>
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#include <asm/dma.h>
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#include <asm/portmux.h>
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||||
|
||||
#define SIR_UART_GET_CHAR(port) bfin_read16((port)->membase + OFFSET_RBR)
|
||||
#define SIR_UART_GET_DLL(port) bfin_read16((port)->membase + OFFSET_DLL)
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||||
#define SIR_UART_GET_IER(port) bfin_read16((port)->membase + OFFSET_IER)
|
||||
#define SIR_UART_GET_DLH(port) bfin_read16((port)->membase + OFFSET_DLH)
|
||||
#define SIR_UART_GET_IIR(port) bfin_read16((port)->membase + OFFSET_IIR)
|
||||
#define SIR_UART_GET_LCR(port) bfin_read16((port)->membase + OFFSET_LCR)
|
||||
#define SIR_UART_GET_GCTL(port) bfin_read16((port)->membase + OFFSET_GCTL)
|
||||
|
||||
#define SIR_UART_PUT_CHAR(port, v) bfin_write16(((port)->membase + OFFSET_THR), v)
|
||||
#define SIR_UART_PUT_DLL(port, v) bfin_write16(((port)->membase + OFFSET_DLL), v)
|
||||
#define SIR_UART_PUT_IER(port, v) bfin_write16(((port)->membase + OFFSET_IER), v)
|
||||
#define SIR_UART_PUT_DLH(port, v) bfin_write16(((port)->membase + OFFSET_DLH), v)
|
||||
#define SIR_UART_PUT_LCR(port, v) bfin_write16(((port)->membase + OFFSET_LCR), v)
|
||||
#define SIR_UART_PUT_GCTL(port, v) bfin_write16(((port)->membase + OFFSET_GCTL), v)
|
||||
|
||||
#ifdef CONFIG_SIR_BFIN_DMA
|
||||
struct dma_rx_buf {
|
||||
char *buf;
|
||||
int head;
|
||||
int tail;
|
||||
};
|
||||
#endif /* CONFIG_SIR_BFIN_DMA */
|
||||
|
||||
struct bfin_sir_port {
|
||||
unsigned char __iomem *membase;
|
||||
unsigned int irq;
|
||||
unsigned int lsr;
|
||||
unsigned long clk;
|
||||
struct net_device *dev;
|
||||
#ifdef CONFIG_SIR_BFIN_DMA
|
||||
int tx_done;
|
||||
struct dma_rx_buf rx_dma_buf;
|
||||
struct timer_list rx_dma_timer;
|
||||
int rx_dma_nrows;
|
||||
#endif /* CONFIG_SIR_BFIN_DMA */
|
||||
unsigned int tx_dma_channel;
|
||||
unsigned int rx_dma_channel;
|
||||
};
|
||||
|
||||
struct bfin_sir_port sir_ports[BFIN_UART_NR_PORTS];
|
||||
|
||||
struct bfin_sir_port_res {
|
||||
unsigned long base_addr;
|
||||
int irq;
|
||||
unsigned int rx_dma_channel;
|
||||
unsigned int tx_dma_channel;
|
||||
};
|
||||
|
||||
struct bfin_sir_port_res bfin_sir_port_resource[] = {
|
||||
#ifdef CONFIG_BFIN_SIR0
|
||||
{
|
||||
0xFFC00400,
|
||||
IRQ_UART0_RX,
|
||||
CH_UART0_RX,
|
||||
CH_UART0_TX,
|
||||
},
|
||||
#endif
|
||||
#ifdef CONFIG_BFIN_SIR1
|
||||
{
|
||||
0xFFC02000,
|
||||
IRQ_UART1_RX,
|
||||
CH_UART1_RX,
|
||||
CH_UART1_TX,
|
||||
},
|
||||
#endif
|
||||
};
|
||||
|
||||
int nr_sirs = ARRAY_SIZE(bfin_sir_port_resource);
|
||||
|
||||
struct bfin_sir_self {
|
||||
struct bfin_sir_port *sir_port;
|
||||
spinlock_t lock;
|
||||
unsigned int open;
|
||||
int speed;
|
||||
int newspeed;
|
||||
|
||||
struct sk_buff *txskb;
|
||||
struct sk_buff *rxskb;
|
||||
struct net_device_stats stats;
|
||||
struct device *dev;
|
||||
struct irlap_cb *irlap;
|
||||
struct qos_info qos;
|
||||
|
||||
iobuff_t tx_buff;
|
||||
iobuff_t rx_buff;
|
||||
|
||||
struct work_struct work;
|
||||
int mtt;
|
||||
};
|
||||
|
||||
static inline unsigned int SIR_UART_GET_LSR(struct bfin_sir_port *port)
|
||||
{
|
||||
unsigned int lsr = bfin_read16(port->membase + OFFSET_LSR);
|
||||
port->lsr |= (lsr & (BI|FE|PE|OE));
|
||||
return lsr | port->lsr;
|
||||
}
|
||||
|
||||
static inline void SIR_UART_CLEAR_LSR(struct bfin_sir_port *port)
|
||||
{
|
||||
port->lsr = 0;
|
||||
bfin_read16(port->membase + OFFSET_LSR);
|
||||
}
|
||||
|
||||
#define DRIVER_NAME "bfin_sir"
|
||||
|
||||
static int bfin_sir_hw_init(void)
|
||||
{
|
||||
int ret = -ENODEV;
|
||||
#ifdef CONFIG_BFIN_SIR0
|
||||
ret = peripheral_request(P_UART0_TX, DRIVER_NAME);
|
||||
if (ret)
|
||||
return ret;
|
||||
ret = peripheral_request(P_UART0_RX, DRIVER_NAME);
|
||||
if (ret)
|
||||
return ret;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_BFIN_SIR1
|
||||
ret = peripheral_request(P_UART1_TX, DRIVER_NAME);
|
||||
if (ret)
|
||||
return ret;
|
||||
ret = peripheral_request(P_UART1_RX, DRIVER_NAME);
|
||||
if (ret)
|
||||
return ret;
|
||||
#endif
|
||||
return ret;
|
||||
}
|
|
@ -1,159 +0,0 @@
|
|||
/*
|
||||
* Blackfin Infra-red Driver
|
||||
*
|
||||
* Copyright 2006-2008 Analog Devices Inc.
|
||||
*
|
||||
* Enter bugs at http://blackfin.uclinux.org/
|
||||
*
|
||||
* Licensed under the GPL-2 or later.
|
||||
*
|
||||
*/
|
||||
|
||||
#include <linux/serial.h>
|
||||
#include <asm/dma.h>
|
||||
#include <asm/portmux.h>
|
||||
|
||||
#define SIR_UART_GET_CHAR(port) bfin_read16((port)->membase + OFFSET_RBR)
|
||||
#define SIR_UART_GET_DLL(port) bfin_read16((port)->membase + OFFSET_DLL)
|
||||
#define SIR_UART_GET_IER(port) bfin_read16((port)->membase + OFFSET_IER)
|
||||
#define SIR_UART_GET_DLH(port) bfin_read16((port)->membase + OFFSET_DLH)
|
||||
#define SIR_UART_GET_IIR(port) bfin_read16((port)->membase + OFFSET_IIR)
|
||||
#define SIR_UART_GET_LCR(port) bfin_read16((port)->membase + OFFSET_LCR)
|
||||
#define SIR_UART_GET_GCTL(port) bfin_read16((port)->membase + OFFSET_GCTL)
|
||||
|
||||
#define SIR_UART_PUT_CHAR(port, v) bfin_write16(((port)->membase + OFFSET_THR), v)
|
||||
#define SIR_UART_PUT_DLL(port, v) bfin_write16(((port)->membase + OFFSET_DLL), v)
|
||||
#define SIR_UART_PUT_IER(port, v) bfin_write16(((port)->membase + OFFSET_IER), v)
|
||||
#define SIR_UART_PUT_DLH(port, v) bfin_write16(((port)->membase + OFFSET_DLH), v)
|
||||
#define SIR_UART_PUT_LCR(port, v) bfin_write16(((port)->membase + OFFSET_LCR), v)
|
||||
#define SIR_UART_PUT_GCTL(port, v) bfin_write16(((port)->membase + OFFSET_GCTL), v)
|
||||
|
||||
#ifdef CONFIG_SIR_BFIN_DMA
|
||||
struct dma_rx_buf {
|
||||
char *buf;
|
||||
int head;
|
||||
int tail;
|
||||
};
|
||||
#endif /* CONFIG_SIR_BFIN_DMA */
|
||||
|
||||
struct bfin_sir_port {
|
||||
unsigned char __iomem *membase;
|
||||
unsigned int irq;
|
||||
unsigned int lsr;
|
||||
unsigned long clk;
|
||||
struct net_device *dev;
|
||||
#ifdef CONFIG_SIR_BFIN_DMA
|
||||
int tx_done;
|
||||
struct dma_rx_buf rx_dma_buf;
|
||||
struct timer_list rx_dma_timer;
|
||||
int rx_dma_nrows;
|
||||
#endif /* CONFIG_SIR_BFIN_DMA */
|
||||
unsigned int tx_dma_channel;
|
||||
unsigned int rx_dma_channel;
|
||||
};
|
||||
|
||||
struct bfin_sir_port sir_ports[BFIN_UART_NR_PORTS];
|
||||
|
||||
struct bfin_sir_port_res {
|
||||
unsigned long base_addr;
|
||||
int irq;
|
||||
unsigned int rx_dma_channel;
|
||||
unsigned int tx_dma_channel;
|
||||
};
|
||||
|
||||
struct bfin_sir_port_res bfin_sir_port_resource[] = {
|
||||
#ifdef CONFIG_BFIN_SIR0
|
||||
{
|
||||
0xFFC00400,
|
||||
IRQ_UART0_RX,
|
||||
CH_UART0_RX,
|
||||
CH_UART0_TX,
|
||||
},
|
||||
#endif
|
||||
#ifdef CONFIG_BFIN_SIR1
|
||||
{
|
||||
0xFFC02000,
|
||||
IRQ_UART1_RX,
|
||||
CH_UART1_RX,
|
||||
CH_UART1_TX,
|
||||
},
|
||||
#endif
|
||||
#ifdef CONFIG_BFIN_SIR2
|
||||
{
|
||||
0xFFC02100,
|
||||
IRQ_UART2_RX,
|
||||
CH_UART2_RX,
|
||||
CH_UART2_TX,
|
||||
},
|
||||
#endif
|
||||
};
|
||||
|
||||
int nr_sirs = ARRAY_SIZE(bfin_sir_port_resource);
|
||||
|
||||
struct bfin_sir_self {
|
||||
struct bfin_sir_port *sir_port;
|
||||
spinlock_t lock;
|
||||
unsigned int open;
|
||||
int speed;
|
||||
int newspeed;
|
||||
|
||||
struct sk_buff *txskb;
|
||||
struct sk_buff *rxskb;
|
||||
struct net_device_stats stats;
|
||||
struct device *dev;
|
||||
struct irlap_cb *irlap;
|
||||
struct qos_info qos;
|
||||
|
||||
iobuff_t tx_buff;
|
||||
iobuff_t rx_buff;
|
||||
|
||||
struct work_struct work;
|
||||
int mtt;
|
||||
};
|
||||
|
||||
static inline unsigned int SIR_UART_GET_LSR(struct bfin_sir_port *port)
|
||||
{
|
||||
unsigned int lsr = bfin_read16(port->membase + OFFSET_LSR);
|
||||
port->lsr |= (lsr & (BI|FE|PE|OE));
|
||||
return lsr | port->lsr;
|
||||
}
|
||||
|
||||
static inline void SIR_UART_CLEAR_LSR(struct bfin_sir_port *port)
|
||||
{
|
||||
port->lsr = 0;
|
||||
bfin_read16(port->membase + OFFSET_LSR);
|
||||
}
|
||||
|
||||
#define DRIVER_NAME "bfin_sir"
|
||||
|
||||
static int bfin_sir_hw_init(void)
|
||||
{
|
||||
int ret = -ENODEV;
|
||||
#ifdef CONFIG_BFIN_SIR0
|
||||
ret = peripheral_request(P_UART0_TX, DRIVER_NAME);
|
||||
if (ret)
|
||||
return ret;
|
||||
ret = peripheral_request(P_UART0_RX, DRIVER_NAME);
|
||||
if (ret)
|
||||
return ret;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_BFIN_SIR1
|
||||
ret = peripheral_request(P_UART1_TX, DRIVER_NAME);
|
||||
if (ret)
|
||||
return ret;
|
||||
ret = peripheral_request(P_UART1_RX, DRIVER_NAME);
|
||||
if (ret)
|
||||
return ret;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_BFIN_SIR2
|
||||
ret = peripheral_request(P_UART2_TX, DRIVER_NAME);
|
||||
if (ret)
|
||||
return ret;
|
||||
ret = peripheral_request(P_UART2_RX, DRIVER_NAME);
|
||||
if (ret)
|
||||
return ret;
|
||||
#endif
|
||||
return ret;
|
||||
}
|
|
@ -1,166 +0,0 @@
|
|||
/*
|
||||
* Blackfin Infra-red Driver
|
||||
*
|
||||
* Copyright 2006-2008 Analog Devices Inc.
|
||||
*
|
||||
* Enter bugs at http://blackfin.uclinux.org/
|
||||
*
|
||||
* Licensed under the GPL-2 or later.
|
||||
*
|
||||
*/
|
||||
|
||||
#include <linux/serial.h>
|
||||
#include <asm/dma.h>
|
||||
#include <asm/portmux.h>
|
||||
|
||||
#define SIR_UART_GET_CHAR(port) bfin_read16((port)->membase + OFFSET_RBR)
|
||||
#define SIR_UART_GET_DLL(port) bfin_read16((port)->membase + OFFSET_DLL)
|
||||
#define SIR_UART_GET_IER(port) bfin_read16((port)->membase + OFFSET_IER_SET)
|
||||
#define SIR_UART_GET_DLH(port) bfin_read16((port)->membase + OFFSET_DLH)
|
||||
#define SIR_UART_GET_LCR(port) bfin_read16((port)->membase + OFFSET_LCR)
|
||||
#define SIR_UART_GET_LSR(port) bfin_read16((port)->membase + OFFSET_LSR)
|
||||
#define SIR_UART_GET_GCTL(port) bfin_read16((port)->membase + OFFSET_GCTL)
|
||||
|
||||
#define SIR_UART_PUT_CHAR(port, v) bfin_write16(((port)->membase + OFFSET_THR), v)
|
||||
#define SIR_UART_PUT_DLL(port, v) bfin_write16(((port)->membase + OFFSET_DLL), v)
|
||||
#define SIR_UART_SET_IER(port, v) bfin_write16(((port)->membase + OFFSET_IER_SET), v)
|
||||
#define SIR_UART_CLEAR_IER(port, v) bfin_write16(((port)->membase + OFFSET_IER_CLEAR), v)
|
||||
#define SIR_UART_PUT_DLH(port, v) bfin_write16(((port)->membase + OFFSET_DLH), v)
|
||||
#define SIR_UART_PUT_LSR(port, v) bfin_write16(((port)->membase + OFFSET_LSR), v)
|
||||
#define SIR_UART_PUT_LCR(port, v) bfin_write16(((port)->membase + OFFSET_LCR), v)
|
||||
#define SIR_UART_CLEAR_LSR(port) bfin_write16(((port)->membase + OFFSET_LSR), -1)
|
||||
#define SIR_UART_PUT_GCTL(port, v) bfin_write16(((port)->membase + OFFSET_GCTL), v)
|
||||
|
||||
#ifdef CONFIG_SIR_BFIN_DMA
|
||||
struct dma_rx_buf {
|
||||
char *buf;
|
||||
int head;
|
||||
int tail;
|
||||
};
|
||||
#endif /* CONFIG_SIR_BFIN_DMA */
|
||||
|
||||
struct bfin_sir_port {
|
||||
unsigned char __iomem *membase;
|
||||
unsigned int irq;
|
||||
unsigned int lsr;
|
||||
unsigned long clk;
|
||||
struct net_device *dev;
|
||||
#ifdef CONFIG_SIR_BFIN_DMA
|
||||
int tx_done;
|
||||
struct dma_rx_buf rx_dma_buf;
|
||||
struct timer_list rx_dma_timer;
|
||||
int rx_dma_nrows;
|
||||
#endif /* CONFIG_SIR_BFIN_DMA */
|
||||
unsigned int tx_dma_channel;
|
||||
unsigned int rx_dma_channel;
|
||||
};
|
||||
|
||||
struct bfin_sir_port sir_ports[BFIN_UART_NR_PORTS];
|
||||
|
||||
struct bfin_sir_port_res {
|
||||
unsigned long base_addr;
|
||||
int irq;
|
||||
unsigned int rx_dma_channel;
|
||||
unsigned int tx_dma_channel;
|
||||
};
|
||||
|
||||
struct bfin_sir_port_res bfin_sir_port_resource[] = {
|
||||
#ifdef CONFIG_BFIN_SIR0
|
||||
{
|
||||
0xFFC00400,
|
||||
IRQ_UART0_RX,
|
||||
CH_UART0_RX,
|
||||
CH_UART0_TX,
|
||||
},
|
||||
#endif
|
||||
#ifdef CONFIG_BFIN_SIR1
|
||||
{
|
||||
0xFFC02000,
|
||||
IRQ_UART1_RX,
|
||||
CH_UART1_RX,
|
||||
CH_UART1_TX,
|
||||
},
|
||||
#endif
|
||||
#ifdef CONFIG_BFIN_SIR2
|
||||
{
|
||||
0xFFC02100,
|
||||
IRQ_UART2_RX,
|
||||
CH_UART2_RX,
|
||||
CH_UART2_TX,
|
||||
},
|
||||
#endif
|
||||
#ifdef CONFIG_BFIN_SIR3
|
||||
{
|
||||
0xFFC03100,
|
||||
IRQ_UART3_RX,
|
||||
CH_UART3_RX,
|
||||
CH_UART3_TX,
|
||||
},
|
||||
#endif
|
||||
};
|
||||
|
||||
int nr_sirs = ARRAY_SIZE(bfin_sir_port_resource);
|
||||
|
||||
struct bfin_sir_self {
|
||||
struct bfin_sir_port *sir_port;
|
||||
spinlock_t lock;
|
||||
unsigned int open;
|
||||
int speed;
|
||||
int newspeed;
|
||||
|
||||
struct sk_buff *txskb;
|
||||
struct sk_buff *rxskb;
|
||||
struct net_device_stats stats;
|
||||
struct device *dev;
|
||||
struct irlap_cb *irlap;
|
||||
struct qos_info qos;
|
||||
|
||||
iobuff_t tx_buff;
|
||||
iobuff_t rx_buff;
|
||||
|
||||
struct work_struct work;
|
||||
int mtt;
|
||||
};
|
||||
|
||||
#define DRIVER_NAME "bfin_sir"
|
||||
|
||||
static int bfin_sir_hw_init(void)
|
||||
{
|
||||
int ret = -ENODEV;
|
||||
#ifdef CONFIG_BFIN_SIR0
|
||||
ret = peripheral_request(P_UART0_TX, DRIVER_NAME);
|
||||
if (ret)
|
||||
return ret;
|
||||
ret = peripheral_request(P_UART0_RX, DRIVER_NAME);
|
||||
if (ret)
|
||||
return ret;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_BFIN_SIR1
|
||||
ret = peripheral_request(P_UART1_TX, DRIVER_NAME);
|
||||
if (ret)
|
||||
return ret;
|
||||
ret = peripheral_request(P_UART1_RX, DRIVER_NAME);
|
||||
if (ret)
|
||||
return ret;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_BFIN_SIR2
|
||||
ret = peripheral_request(P_UART2_TX, DRIVER_NAME);
|
||||
if (ret)
|
||||
return ret;
|
||||
ret = peripheral_request(P_UART2_RX, DRIVER_NAME);
|
||||
if (ret)
|
||||
return ret;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_BFIN_SIR3
|
||||
ret = peripheral_request(P_UART3_TX, DRIVER_NAME);
|
||||
if (ret)
|
||||
return ret;
|
||||
ret = peripheral_request(P_UART3_RX, DRIVER_NAME);
|
||||
if (ret)
|
||||
return ret;
|
||||
#endif
|
||||
return ret;
|
||||
}
|
|
@ -1,125 +0,0 @@
|
|||
/*
|
||||
* Blackfin Infra-red Driver
|
||||
*
|
||||
* Copyright 2006-2008 Analog Devices Inc.
|
||||
*
|
||||
* Enter bugs at http://blackfin.uclinux.org/
|
||||
*
|
||||
* Licensed under the GPL-2 or later.
|
||||
*
|
||||
*/
|
||||
|
||||
#include <linux/serial.h>
|
||||
#include <asm/dma.h>
|
||||
#include <asm/portmux.h>
|
||||
|
||||
#define SIR_UART_GET_CHAR(port) bfin_read16((port)->membase + OFFSET_RBR)
|
||||
#define SIR_UART_GET_DLL(port) bfin_read16((port)->membase + OFFSET_DLL)
|
||||
#define SIR_UART_GET_IER(port) bfin_read16((port)->membase + OFFSET_IER)
|
||||
#define SIR_UART_GET_DLH(port) bfin_read16((port)->membase + OFFSET_DLH)
|
||||
#define SIR_UART_GET_IIR(port) bfin_read16((port)->membase + OFFSET_IIR)
|
||||
#define SIR_UART_GET_LCR(port) bfin_read16((port)->membase + OFFSET_LCR)
|
||||
#define SIR_UART_GET_GCTL(port) bfin_read16((port)->membase + OFFSET_GCTL)
|
||||
|
||||
#define SIR_UART_PUT_CHAR(port, v) bfin_write16(((port)->membase + OFFSET_THR), v)
|
||||
#define SIR_UART_PUT_DLL(port, v) bfin_write16(((port)->membase + OFFSET_DLL), v)
|
||||
#define SIR_UART_PUT_IER(port, v) bfin_write16(((port)->membase + OFFSET_IER), v)
|
||||
#define SIR_UART_PUT_DLH(port, v) bfin_write16(((port)->membase + OFFSET_DLH), v)
|
||||
#define SIR_UART_PUT_LCR(port, v) bfin_write16(((port)->membase + OFFSET_LCR), v)
|
||||
#define SIR_UART_PUT_GCTL(port, v) bfin_write16(((port)->membase + OFFSET_GCTL), v)
|
||||
|
||||
#ifdef CONFIG_SIR_BFIN_DMA
|
||||
struct dma_rx_buf {
|
||||
char *buf;
|
||||
int head;
|
||||
int tail;
|
||||
};
|
||||
#endif /* CONFIG_SIR_BFIN_DMA */
|
||||
|
||||
struct bfin_sir_port {
|
||||
unsigned char __iomem *membase;
|
||||
unsigned int irq;
|
||||
unsigned int lsr;
|
||||
unsigned long clk;
|
||||
struct net_device *dev;
|
||||
#ifdef CONFIG_SIR_BFIN_DMA
|
||||
int tx_done;
|
||||
struct dma_rx_buf rx_dma_buf;
|
||||
struct timer_list rx_dma_timer;
|
||||
int rx_dma_nrows;
|
||||
#endif /* CONFIG_SIR_BFIN_DMA */
|
||||
unsigned int tx_dma_channel;
|
||||
unsigned int rx_dma_channel;
|
||||
};
|
||||
|
||||
struct bfin_sir_port sir_ports[BFIN_UART_NR_PORTS];
|
||||
|
||||
struct bfin_sir_port_res {
|
||||
unsigned long base_addr;
|
||||
int irq;
|
||||
unsigned int rx_dma_channel;
|
||||
unsigned int tx_dma_channel;
|
||||
};
|
||||
|
||||
struct bfin_sir_port_res bfin_sir_port_resource[] = {
|
||||
#ifdef CONFIG_BFIN_SIR0
|
||||
{
|
||||
0xFFC00400,
|
||||
IRQ_UART_RX,
|
||||
CH_UART_RX,
|
||||
CH_UART_TX,
|
||||
},
|
||||
#endif
|
||||
};
|
||||
|
||||
int nr_sirs = ARRAY_SIZE(bfin_sir_port_resource);
|
||||
|
||||
struct bfin_sir_self {
|
||||
struct bfin_sir_port *sir_port;
|
||||
spinlock_t lock;
|
||||
unsigned int open;
|
||||
int speed;
|
||||
int newspeed;
|
||||
|
||||
struct sk_buff *txskb;
|
||||
struct sk_buff *rxskb;
|
||||
struct net_device_stats stats;
|
||||
struct device *dev;
|
||||
struct irlap_cb *irlap;
|
||||
struct qos_info qos;
|
||||
|
||||
iobuff_t tx_buff;
|
||||
iobuff_t rx_buff;
|
||||
|
||||
struct work_struct work;
|
||||
int mtt;
|
||||
};
|
||||
|
||||
static inline unsigned int SIR_UART_GET_LSR(struct bfin_sir_port *port)
|
||||
{
|
||||
unsigned int lsr = bfin_read16(port->membase + OFFSET_LSR);
|
||||
port->lsr |= (lsr & (BI|FE|PE|OE));
|
||||
return lsr | port->lsr;
|
||||
}
|
||||
|
||||
static inline void SIR_UART_CLEAR_LSR(struct bfin_sir_port *port)
|
||||
{
|
||||
port->lsr = 0;
|
||||
bfin_read16(port->membase + OFFSET_LSR);
|
||||
}
|
||||
|
||||
#define DRIVER_NAME "bfin_sir"
|
||||
|
||||
static int bfin_sir_hw_init(void)
|
||||
{
|
||||
int ret = -ENODEV;
|
||||
#ifdef CONFIG_BFIN_SIR0
|
||||
ret = peripheral_request(P_UART0_TX, DRIVER_NAME);
|
||||
if (ret)
|
||||
return ret;
|
||||
ret = peripheral_request(P_UART0_RX, DRIVER_NAME);
|
||||
if (ret)
|
||||
return ret;
|
||||
#endif
|
||||
return ret;
|
||||
}
|
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