Merge branch 'next/arm64' into next/dt
Merging in the few patches I had kept separate from main next/dt, since others got merged here directly. * next/arm64: arm64: defconfig: Enable PCI generic host bridge by default arm64: Juno: Add support for the PCIe host bridge on Juno R1 Documentation: of: Document the bindings used by Juno R1 PCIe host bridge arm64: dts: mt8173: Add clocks for SCPSYS unit arm64: dts: mt8173: Add subsystem clock controller device nodes + Linux 4.3-rc5
This commit is contained in:
Коммит
3e4dda70cc
|
@ -41,9 +41,13 @@ useless and be disabled, returning errors. So it is important to monitor
|
|||
the amount of free space and expand the <COW device> before it fills up.
|
||||
|
||||
<persistent?> is P (Persistent) or N (Not persistent - will not survive
|
||||
after reboot).
|
||||
The difference is that for transient snapshots less metadata must be
|
||||
saved on disk - they can be kept in memory by the kernel.
|
||||
after reboot). O (Overflow) can be added as a persistent store option
|
||||
to allow userspace to advertise its support for seeing "Overflow" in the
|
||||
snapshot status. So supported store types are "P", "PO" and "N".
|
||||
|
||||
The difference between persistent and transient is with transient
|
||||
snapshots less metadata must be saved on disk - they can be kept in
|
||||
memory by the kernel.
|
||||
|
||||
|
||||
* snapshot-merge <origin> <COW device> <persistent> <chunksize>
|
||||
|
|
|
@ -0,0 +1,10 @@
|
|||
* ARM Juno R1 PCIe interface
|
||||
|
||||
This PCIe host controller is based on PLDA XpressRICH3-AXI IP
|
||||
and thus inherits all the common properties defined in plda,xpressrich3-axi.txt
|
||||
as well as the base properties defined in host-generic-pci.txt.
|
||||
|
||||
Required properties:
|
||||
- compatible: "arm,juno-r1-pcie"
|
||||
- dma-coherent: The host controller bridges the AXI transactions into PCIe bus
|
||||
in a manner that makes the DMA operations to appear coherent to the CPUs.
|
|
@ -0,0 +1,12 @@
|
|||
* PLDA XpressRICH3-AXI host controller
|
||||
|
||||
The PLDA XpressRICH3-AXI host controller can be configured in a manner that
|
||||
makes it compliant with the SBSA[1] standard published by ARM Ltd. For those
|
||||
scenarios, the host-generic-pci.txt bindings apply with the following additions
|
||||
to the compatible property:
|
||||
|
||||
Required properties:
|
||||
- compatible: should contain "plda,xpressrich3-axi" to identify the IP used.
|
||||
|
||||
|
||||
[1] http://infocenter.arm.com/help/topic/com.arm.doc.den0029a/
|
|
@ -51,7 +51,7 @@ Optional properties, deprecated for soctype-specific bindings:
|
|||
- renesas,tx-fifo-size : Overrides the default tx fifo size given in words
|
||||
(default is 64)
|
||||
- renesas,rx-fifo-size : Overrides the default rx fifo size given in words
|
||||
(default is 64, or 256 on R-Car Gen2)
|
||||
(default is 64)
|
||||
|
||||
Pinctrl properties might be needed, too. See
|
||||
Documentation/devicetree/bindings/pinctrl/renesas,*.
|
||||
|
|
|
@ -5,6 +5,7 @@ Required properties:
|
|||
- "renesas,usbhs-r8a7790"
|
||||
- "renesas,usbhs-r8a7791"
|
||||
- "renesas,usbhs-r8a7794"
|
||||
- "renesas,usbhs-r8a7795"
|
||||
- reg: Base address and length of the register for the USBHS
|
||||
- interrupts: Interrupt specifier for the USBHS
|
||||
- clocks: A list of phandle + clock specifier pairs
|
||||
|
|
|
@ -169,6 +169,7 @@ pericom Pericom Technology Inc.
|
|||
phytec PHYTEC Messtechnik GmbH
|
||||
picochip Picochip Ltd
|
||||
plathome Plat'Home Co., Ltd.
|
||||
plda PLDA
|
||||
pixcir PIXCIR MICROELECTRONICS Co., Ltd
|
||||
powervr PowerVR (deprecated, use img)
|
||||
qca Qualcomm Atheros, Inc.
|
||||
|
|
14
MAINTAINERS
14
MAINTAINERS
|
@ -4010,7 +4010,7 @@ S: Maintained
|
|||
F: sound/usb/misc/ua101.c
|
||||
|
||||
EXTENSIBLE FIRMWARE INTERFACE (EFI)
|
||||
M: Matt Fleming <matt.fleming@intel.com>
|
||||
M: Matt Fleming <matt@codeblueprint.co.uk>
|
||||
L: linux-efi@vger.kernel.org
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/mfleming/efi.git
|
||||
S: Maintained
|
||||
|
@ -4025,7 +4025,7 @@ F: include/linux/efi*.h
|
|||
EFI VARIABLE FILESYSTEM
|
||||
M: Matthew Garrett <matthew.garrett@nebula.com>
|
||||
M: Jeremy Kerr <jk@ozlabs.org>
|
||||
M: Matt Fleming <matt.fleming@intel.com>
|
||||
M: Matt Fleming <matt@codeblueprint.co.uk>
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/mfleming/efi.git
|
||||
L: linux-efi@vger.kernel.org
|
||||
S: Maintained
|
||||
|
@ -9921,7 +9921,6 @@ S: Maintained
|
|||
F: drivers/staging/lustre
|
||||
|
||||
STAGING - NVIDIA COMPLIANT EMBEDDED CONTROLLER INTERFACE (nvec)
|
||||
M: Julian Andres Klode <jak@jak-linux.org>
|
||||
M: Marc Dietrich <marvin24@gmx.de>
|
||||
L: ac100@lists.launchpad.net (moderated for non-subscribers)
|
||||
L: linux-tegra@vger.kernel.org
|
||||
|
@ -11385,15 +11384,6 @@ W: http://oops.ghostprotocols.net:81/blog
|
|||
S: Maintained
|
||||
F: drivers/net/wireless/wl3501*
|
||||
|
||||
WM97XX TOUCHSCREEN DRIVERS
|
||||
M: Mark Brown <broonie@kernel.org>
|
||||
M: Liam Girdwood <lrg@slimlogic.co.uk>
|
||||
L: linux-input@vger.kernel.org
|
||||
W: https://github.com/CirrusLogic/linux-drivers/wiki
|
||||
S: Supported
|
||||
F: drivers/input/touchscreen/*wm97*
|
||||
F: include/linux/wm97xx.h
|
||||
|
||||
WOLFSON MICROELECTRONICS DRIVERS
|
||||
L: patches@opensource.wolfsonmicro.com
|
||||
T: git https://github.com/CirrusLogic/linux-drivers.git
|
||||
|
|
4
Makefile
4
Makefile
|
@ -1,8 +1,8 @@
|
|||
VERSION = 4
|
||||
PATCHLEVEL = 3
|
||||
SUBLEVEL = 0
|
||||
EXTRAVERSION = -rc4
|
||||
NAME = Hurr durr I'ma sheep
|
||||
EXTRAVERSION = -rc5
|
||||
NAME = Blurry Fish Butt
|
||||
|
||||
# *DOCUMENTATION*
|
||||
# To see a list of typical targets execute "make help"
|
||||
|
|
|
@ -52,4 +52,6 @@ static inline unsigned long find_zero(unsigned long bits)
|
|||
#endif
|
||||
}
|
||||
|
||||
#define zero_bytemask(mask) ((2ul << (find_zero(mask) * 8)) - 1)
|
||||
|
||||
#endif /* _ASM_WORD_AT_A_TIME_H */
|
||||
|
|
|
@ -197,6 +197,7 @@
|
|||
regulator-name = "P1.8V_LDO_OUT10";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo11_reg: LDO11 {
|
||||
|
|
|
@ -1117,7 +1117,7 @@
|
|||
interrupt-parent = <&combiner>;
|
||||
interrupts = <3 0>;
|
||||
clock-names = "sysmmu", "master";
|
||||
clocks = <&clock CLK_SMMU_FIMD1M0>, <&clock CLK_FIMD1>;
|
||||
clocks = <&clock CLK_SMMU_FIMD1M1>, <&clock CLK_FIMD1>;
|
||||
power-domains = <&disp_pd>;
|
||||
#iommu-cells = <0>;
|
||||
};
|
||||
|
|
|
@ -36,7 +36,7 @@
|
|||
pinctrl-0 = <&pinctrl_pmic>;
|
||||
reg = <0x08>;
|
||||
interrupt-parent = <&gpio5>;
|
||||
interrupts = <23 0x8>;
|
||||
interrupts = <23 IRQ_TYPE_LEVEL_HIGH>;
|
||||
regulators {
|
||||
sw1_reg: sw1a {
|
||||
regulator-name = "SW1";
|
||||
|
|
|
@ -15,6 +15,7 @@
|
|||
#include <dt-bindings/clock/imx5-clock.h>
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/input/input.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
|
||||
/ {
|
||||
aliases {
|
||||
|
|
|
@ -35,7 +35,6 @@
|
|||
compatible = "regulator-fixed";
|
||||
reg = <1>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usbh1>;
|
||||
regulator-name = "usbh1_vbus";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
|
@ -47,7 +46,6 @@
|
|||
compatible = "regulator-fixed";
|
||||
reg = <2>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_usbotg>;
|
||||
regulator-name = "usb_otg_vbus";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
|
|
|
@ -1627,6 +1627,7 @@
|
|||
"mix.0", "mix.1",
|
||||
"dvc.0", "dvc.1",
|
||||
"clk_a", "clk_b", "clk_c", "clk_i";
|
||||
power-domains = <&cpg_clocks>;
|
||||
|
||||
status = "disabled";
|
||||
|
||||
|
|
|
@ -1677,6 +1677,7 @@
|
|||
"mix.0", "mix.1",
|
||||
"dvc.0", "dvc.1",
|
||||
"clk_a", "clk_b", "clk_c", "clk_i";
|
||||
power-domains = <&cpg_clocks>;
|
||||
|
||||
status = "disabled";
|
||||
|
||||
|
|
|
@ -20,6 +20,7 @@
|
|||
#include <asm/cputype.h>
|
||||
#include <asm/cp15.h>
|
||||
#include <asm/mcpm.h>
|
||||
#include <asm/smp_plat.h>
|
||||
|
||||
#include "regs-pmu.h"
|
||||
#include "common.h"
|
||||
|
@ -70,7 +71,31 @@ static int exynos_cpu_powerup(unsigned int cpu, unsigned int cluster)
|
|||
cluster >= EXYNOS5420_NR_CLUSTERS)
|
||||
return -EINVAL;
|
||||
|
||||
exynos_cpu_power_up(cpunr);
|
||||
if (!exynos_cpu_power_state(cpunr)) {
|
||||
exynos_cpu_power_up(cpunr);
|
||||
|
||||
/*
|
||||
* This assumes the cluster number of the big cores(Cortex A15)
|
||||
* is 0 and the Little cores(Cortex A7) is 1.
|
||||
* When the system was booted from the Little core,
|
||||
* they should be reset during power up cpu.
|
||||
*/
|
||||
if (cluster &&
|
||||
cluster == MPIDR_AFFINITY_LEVEL(cpu_logical_map(0), 1)) {
|
||||
/*
|
||||
* Before we reset the Little cores, we should wait
|
||||
* the SPARE2 register is set to 1 because the init
|
||||
* codes of the iROM will set the register after
|
||||
* initialization.
|
||||
*/
|
||||
while (!pmu_raw_readl(S5P_PMU_SPARE2))
|
||||
udelay(10);
|
||||
|
||||
pmu_raw_writel(EXYNOS5420_KFC_CORE_RESET(cpu),
|
||||
EXYNOS_SWRESET);
|
||||
}
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
|
@ -513,6 +513,12 @@ static inline unsigned int exynos_pmu_cpunr(unsigned int mpidr)
|
|||
#define SPREAD_ENABLE 0xF
|
||||
#define SPREAD_USE_STANDWFI 0xF
|
||||
|
||||
#define EXYNOS5420_KFC_CORE_RESET0 BIT(8)
|
||||
#define EXYNOS5420_KFC_ETM_RESET0 BIT(20)
|
||||
|
||||
#define EXYNOS5420_KFC_CORE_RESET(_nr) \
|
||||
((EXYNOS5420_KFC_CORE_RESET0 | EXYNOS5420_KFC_ETM_RESET0) << (_nr))
|
||||
|
||||
#define EXYNOS5420_BB_CON1 0x0784
|
||||
#define EXYNOS5420_BB_SEL_EN BIT(31)
|
||||
#define EXYNOS5420_BB_PMOS_EN BIT(7)
|
||||
|
|
|
@ -141,6 +141,26 @@
|
|||
|
||||
#include "juno-base.dtsi"
|
||||
|
||||
pcie-controller@40000000 {
|
||||
compatible = "arm,juno-r1-pcie", "plda,xpressrich3-axi", "pci-host-ecam-generic";
|
||||
device_type = "pci";
|
||||
reg = <0 0x40000000 0 0x10000000>; /* ECAM config space */
|
||||
bus-range = <0 255>;
|
||||
linux,pci-domain = <0>;
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
dma-coherent;
|
||||
ranges = <0x01000000 0x00 0x5f800000 0x00 0x5f800000 0x0 0x00800000>,
|
||||
<0x02000000 0x00 0x50000000 0x00 0x50000000 0x0 0x08000000>,
|
||||
<0x42000000 0x40 0x00000000 0x40 0x00000000 0x1 0x00000000>;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-map-mask = <0 0 0 7>;
|
||||
interrupt-map = <0 0 0 1 &gic 0 0 0 136 4>,
|
||||
<0 0 0 2 &gic 0 0 0 137 4>,
|
||||
<0 0 0 3 &gic 0 0 0 138 4>,
|
||||
<0 0 0 4 &gic 0 0 0 139 4>;
|
||||
msi-parent = <&v2m_0>;
|
||||
};
|
||||
};
|
||||
|
||||
&memtimer {
|
||||
|
|
|
@ -586,3 +586,106 @@
|
|||
samsung,pin-drv = <2>;
|
||||
};
|
||||
};
|
||||
|
||||
&pinctrl_bus1 {
|
||||
gpf0: gpf0 {
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
gpf1: gpf1 {
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
gpf2: gpf2 {
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
gpf3: gpf3 {
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
gpf4: gpf4 {
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
gpf5: gpf5 {
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
gpg1: gpg1 {
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
gpg2: gpg2 {
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
gph1: gph1 {
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
gpv6: gpv6 {
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
spi5_bus: spi5-bus {
|
||||
samsung,pins = "gpf2-0", "gpf2-1", "gpf2-2", "gpf2-3";
|
||||
samsung,pin-function = <2>;
|
||||
samsung,pin-pud = <3>;
|
||||
samsung,pin-drv = <0>;
|
||||
};
|
||||
|
||||
ufs_refclk_out: ufs-refclk-out {
|
||||
samsung,pins = "gpg2-4";
|
||||
samsung,pin-function = <2>;
|
||||
samsung,pin-pud = <0>;
|
||||
samsung,pin-drv = <2>;
|
||||
};
|
||||
|
||||
ufs_rst_n: ufs-rst-n {
|
||||
samsung,pins = "gph1-5";
|
||||
samsung,pin-function = <2>;
|
||||
samsung,pin-pud = <3>;
|
||||
samsung,pin-drv = <0>;
|
||||
};
|
||||
};
|
||||
|
|
|
@ -26,6 +26,7 @@
|
|||
pinctrl5 = &pinctrl_ese;
|
||||
pinctrl6 = &pinctrl_fsys0;
|
||||
pinctrl7 = &pinctrl_fsys1;
|
||||
pinctrl8 = &pinctrl_bus1;
|
||||
};
|
||||
|
||||
cpus {
|
||||
|
@ -278,6 +279,12 @@
|
|||
interrupts = <0 203 0>;
|
||||
};
|
||||
|
||||
pinctrl_bus1: pinctrl@14870000 {
|
||||
compatible = "samsung,exynos7-pinctrl";
|
||||
reg = <0x14870000 0x1000>;
|
||||
interrupts = <0 384 0>;
|
||||
};
|
||||
|
||||
hsi2c_0: hsi2c@13640000 {
|
||||
compatible = "samsung,exynos7-hsi2c";
|
||||
reg = <0x13640000 0x1000>;
|
||||
|
|
|
@ -387,6 +387,24 @@
|
|||
};
|
||||
};
|
||||
|
||||
&pio {
|
||||
spi_pins_a: spi0 {
|
||||
pins_spi {
|
||||
pinmux = <MT8173_PIN_69_SPI_CK__FUNC_SPI_CK_0_>,
|
||||
<MT8173_PIN_70_SPI_MI__FUNC_SPI_MI_0_>,
|
||||
<MT8173_PIN_71_SPI_MO__FUNC_SPI_MO_0_>,
|
||||
<MT8173_PIN_72_SPI_CS__FUNC_SPI_CS_0_>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&spi {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&spi_pins_a>;
|
||||
mediatek,pad-select = <0>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
|
|
@ -116,6 +116,13 @@
|
|||
clock-output-names = "clk32k";
|
||||
};
|
||||
|
||||
cpum_ck: oscillator@2 {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <0>;
|
||||
clock-output-names = "cpum_ck";
|
||||
};
|
||||
|
||||
timer {
|
||||
compatible = "arm,armv8-timer";
|
||||
interrupt-parent = <&gic>;
|
||||
|
@ -227,8 +234,10 @@
|
|||
#power-domain-cells = <1>;
|
||||
reg = <0 0x10006000 0 0x1000>;
|
||||
clocks = <&clk26m>,
|
||||
<&topckgen CLK_TOP_MM_SEL>;
|
||||
clock-names = "mfg", "mm";
|
||||
<&topckgen CLK_TOP_MM_SEL>,
|
||||
<&topckgen CLK_TOP_VENC_SEL>,
|
||||
<&topckgen CLK_TOP_VENC_LT_SEL>;
|
||||
clock-names = "mfg", "mm", "venc", "venc_lt";
|
||||
infracfg = <&infracfg>;
|
||||
};
|
||||
|
||||
|
@ -365,7 +374,20 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c3: i2c3@11010000 {
|
||||
spi: spi@1100a000 {
|
||||
compatible = "mediatek,mt8173-spi";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0 0x1100a000 0 0x1000>;
|
||||
interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_LOW>;
|
||||
clocks = <&topckgen CLK_TOP_SYSPLL3_D2>,
|
||||
<&topckgen CLK_TOP_SPI_SEL>,
|
||||
<&pericfg CLK_PERI_SPI0>;
|
||||
clock-names = "parent-clk", "sel-clk", "spi-clk";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c3: i2c@11010000 {
|
||||
compatible = "mediatek,mt8173-i2c";
|
||||
reg = <0 0x11010000 0 0x70>,
|
||||
<0 0x11000280 0 0x80>;
|
||||
|
@ -381,7 +403,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c4: i2c4@11011000 {
|
||||
i2c4: i2c@11011000 {
|
||||
compatible = "mediatek,mt8173-i2c";
|
||||
reg = <0 0x11011000 0 0x70>,
|
||||
<0 0x11000300 0 0x80>;
|
||||
|
@ -397,7 +419,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c6: i2c6@11013000 {
|
||||
i2c6: i2c@11013000 {
|
||||
compatible = "mediatek,mt8173-i2c";
|
||||
reg = <0 0x11013000 0 0x70>,
|
||||
<0 0x11000080 0 0x80>;
|
||||
|
@ -487,6 +509,36 @@
|
|||
clock-names = "source", "hclk";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mmsys: clock-controller@14000000 {
|
||||
compatible = "mediatek,mt8173-mmsys", "syscon";
|
||||
reg = <0 0x14000000 0 0x1000>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
imgsys: clock-controller@15000000 {
|
||||
compatible = "mediatek,mt8173-imgsys", "syscon";
|
||||
reg = <0 0x15000000 0 0x1000>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
vdecsys: clock-controller@16000000 {
|
||||
compatible = "mediatek,mt8173-vdecsys", "syscon";
|
||||
reg = <0 0x16000000 0 0x1000>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
vencsys: clock-controller@18000000 {
|
||||
compatible = "mediatek,mt8173-vencsys", "syscon";
|
||||
reg = <0 0x18000000 0 0x1000>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
vencltsys: clock-controller@19000000 {
|
||||
compatible = "mediatek,mt8173-vencltsys", "syscon";
|
||||
reg = <0 0x19000000 0 0x1000>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
|
|
|
@ -50,6 +50,7 @@ CONFIG_ARCH_XGENE=y
|
|||
CONFIG_ARCH_ZYNQMP=y
|
||||
CONFIG_PCI=y
|
||||
CONFIG_PCI_MSI=y
|
||||
CONFIG_PCI_HOST_GENERIC=y
|
||||
CONFIG_PCI_XGENE=y
|
||||
CONFIG_SMP=y
|
||||
CONFIG_PREEMPT=y
|
||||
|
|
|
@ -201,7 +201,7 @@ void unregister_step_hook(struct step_hook *hook)
|
|||
}
|
||||
|
||||
/*
|
||||
* Call registered single step handers
|
||||
* Call registered single step handlers
|
||||
* There is no Syndrome info to check for determining the handler.
|
||||
* So we call all the registered handlers, until the right handler is
|
||||
* found which returns zero.
|
||||
|
@ -271,20 +271,21 @@ static int single_step_handler(unsigned long addr, unsigned int esr,
|
|||
* Use reader/writer locks instead of plain spinlock.
|
||||
*/
|
||||
static LIST_HEAD(break_hook);
|
||||
static DEFINE_RWLOCK(break_hook_lock);
|
||||
static DEFINE_SPINLOCK(break_hook_lock);
|
||||
|
||||
void register_break_hook(struct break_hook *hook)
|
||||
{
|
||||
write_lock(&break_hook_lock);
|
||||
list_add(&hook->node, &break_hook);
|
||||
write_unlock(&break_hook_lock);
|
||||
spin_lock(&break_hook_lock);
|
||||
list_add_rcu(&hook->node, &break_hook);
|
||||
spin_unlock(&break_hook_lock);
|
||||
}
|
||||
|
||||
void unregister_break_hook(struct break_hook *hook)
|
||||
{
|
||||
write_lock(&break_hook_lock);
|
||||
list_del(&hook->node);
|
||||
write_unlock(&break_hook_lock);
|
||||
spin_lock(&break_hook_lock);
|
||||
list_del_rcu(&hook->node);
|
||||
spin_unlock(&break_hook_lock);
|
||||
synchronize_rcu();
|
||||
}
|
||||
|
||||
static int call_break_hook(struct pt_regs *regs, unsigned int esr)
|
||||
|
@ -292,11 +293,11 @@ static int call_break_hook(struct pt_regs *regs, unsigned int esr)
|
|||
struct break_hook *hook;
|
||||
int (*fn)(struct pt_regs *regs, unsigned int esr) = NULL;
|
||||
|
||||
read_lock(&break_hook_lock);
|
||||
list_for_each_entry(hook, &break_hook, node)
|
||||
rcu_read_lock();
|
||||
list_for_each_entry_rcu(hook, &break_hook, node)
|
||||
if ((esr & hook->esr_mask) == hook->esr_val)
|
||||
fn = hook->fn;
|
||||
read_unlock(&break_hook_lock);
|
||||
rcu_read_unlock();
|
||||
|
||||
return fn ? fn(regs, esr) : DBG_HOOK_ERROR;
|
||||
}
|
||||
|
|
|
@ -85,7 +85,7 @@ bool aarch64_insn_is_branch_imm(u32 insn)
|
|||
aarch64_insn_is_bcond(insn));
|
||||
}
|
||||
|
||||
static DEFINE_SPINLOCK(patch_lock);
|
||||
static DEFINE_RAW_SPINLOCK(patch_lock);
|
||||
|
||||
static void __kprobes *patch_map(void *addr, int fixmap)
|
||||
{
|
||||
|
@ -131,13 +131,13 @@ static int __kprobes __aarch64_insn_write(void *addr, u32 insn)
|
|||
unsigned long flags = 0;
|
||||
int ret;
|
||||
|
||||
spin_lock_irqsave(&patch_lock, flags);
|
||||
raw_spin_lock_irqsave(&patch_lock, flags);
|
||||
waddr = patch_map(addr, FIX_TEXT_POKE0);
|
||||
|
||||
ret = probe_kernel_write(waddr, &insn, AARCH64_INSN_SIZE);
|
||||
|
||||
patch_unmap(FIX_TEXT_POKE0);
|
||||
spin_unlock_irqrestore(&patch_lock, flags);
|
||||
raw_spin_unlock_irqrestore(&patch_lock, flags);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
|
|
@ -364,6 +364,8 @@ static void __init relocate_initrd(void)
|
|||
to_free = ram_end - orig_start;
|
||||
|
||||
size = orig_end - orig_start;
|
||||
if (!size)
|
||||
return;
|
||||
|
||||
/* initrd needs to be relocated completely inside linear mapping */
|
||||
new_start = memblock_find_in_range(0, PFN_PHYS(max_pfn),
|
||||
|
|
|
@ -287,6 +287,7 @@ retry:
|
|||
* starvation.
|
||||
*/
|
||||
mm_flags &= ~FAULT_FLAG_ALLOW_RETRY;
|
||||
mm_flags |= FAULT_FLAG_TRIED;
|
||||
goto retry;
|
||||
}
|
||||
}
|
||||
|
|
|
@ -73,4 +73,5 @@ generic-y += uaccess.h
|
|||
generic-y += ucontext.h
|
||||
generic-y += unaligned.h
|
||||
generic-y += vga.h
|
||||
generic-y += word-at-a-time.h
|
||||
generic-y += xor.h
|
||||
|
|
|
@ -256,6 +256,7 @@ static inline void __iomem * __ioremap_mode(phys_addr_t offset, unsigned long si
|
|||
*/
|
||||
#define ioremap_nocache(offset, size) \
|
||||
__ioremap_mode((offset), (size), _CACHE_UNCACHED)
|
||||
#define ioremap_uc ioremap_nocache
|
||||
|
||||
/*
|
||||
* ioremap_cachable - map bus memory into CPU space
|
||||
|
|
|
@ -13,16 +13,15 @@
|
|||
|
||||
#define __SWAB_64_THRU_32__
|
||||
|
||||
#if (defined(__mips_isa_rev) && (__mips_isa_rev >= 2)) || \
|
||||
defined(_MIPS_ARCH_LOONGSON3A)
|
||||
#if !defined(__mips16) && \
|
||||
((defined(__mips_isa_rev) && (__mips_isa_rev >= 2)) || \
|
||||
defined(_MIPS_ARCH_LOONGSON3A))
|
||||
|
||||
static inline __attribute__((nomips16)) __attribute_const__
|
||||
__u16 __arch_swab16(__u16 x)
|
||||
static inline __attribute_const__ __u16 __arch_swab16(__u16 x)
|
||||
{
|
||||
__asm__(
|
||||
" .set push \n"
|
||||
" .set arch=mips32r2 \n"
|
||||
" .set nomips16 \n"
|
||||
" wsbh %0, %1 \n"
|
||||
" .set pop \n"
|
||||
: "=r" (x)
|
||||
|
@ -32,13 +31,11 @@ static inline __attribute__((nomips16)) __attribute_const__
|
|||
}
|
||||
#define __arch_swab16 __arch_swab16
|
||||
|
||||
static inline __attribute__((nomips16)) __attribute_const__
|
||||
__u32 __arch_swab32(__u32 x)
|
||||
static inline __attribute_const__ __u32 __arch_swab32(__u32 x)
|
||||
{
|
||||
__asm__(
|
||||
" .set push \n"
|
||||
" .set arch=mips32r2 \n"
|
||||
" .set nomips16 \n"
|
||||
" wsbh %0, %1 \n"
|
||||
" rotr %0, %0, 16 \n"
|
||||
" .set pop \n"
|
||||
|
@ -54,13 +51,11 @@ static inline __attribute__((nomips16)) __attribute_const__
|
|||
* 64-bit kernel on r2 CPUs.
|
||||
*/
|
||||
#ifdef __mips64
|
||||
static inline __attribute__((nomips16)) __attribute_const__
|
||||
__u64 __arch_swab64(__u64 x)
|
||||
static inline __attribute_const__ __u64 __arch_swab64(__u64 x)
|
||||
{
|
||||
__asm__(
|
||||
" .set push \n"
|
||||
" .set arch=mips64r2 \n"
|
||||
" .set nomips16 \n"
|
||||
" dsbh %0, %1 \n"
|
||||
" dshd %0, %0 \n"
|
||||
" .set pop \n"
|
||||
|
@ -71,5 +66,5 @@ static inline __attribute__((nomips16)) __attribute_const__
|
|||
}
|
||||
#define __arch_swab64 __arch_swab64
|
||||
#endif /* __mips64 */
|
||||
#endif /* MIPS R2 or newer or Loongson 3A */
|
||||
#endif /* (not __mips16) and (MIPS R2 or newer or Loongson 3A) */
|
||||
#endif /* _ASM_SWAB_H */
|
||||
|
|
|
@ -7,4 +7,3 @@ generic-y += mcs_spinlock.h
|
|||
generic-y += preempt.h
|
||||
generic-y += rwsem.h
|
||||
generic-y += vtime.h
|
||||
generic-y += word-at-a-time.h
|
||||
|
|
|
@ -40,6 +40,11 @@ static inline bool has_zero(unsigned long val, unsigned long *data, const struct
|
|||
return (val + c->high_bits) & ~rhs;
|
||||
}
|
||||
|
||||
static inline unsigned long zero_bytemask(unsigned long mask)
|
||||
{
|
||||
return ~1ul << __fls(mask);
|
||||
}
|
||||
|
||||
#else
|
||||
|
||||
#ifdef CONFIG_64BIT
|
||||
|
|
|
@ -10,7 +10,7 @@ targets += misc.o piggy.o sizes.h head.o
|
|||
|
||||
KBUILD_CFLAGS := -m64 -D__KERNEL__ $(LINUX_INCLUDE) -O2
|
||||
KBUILD_CFLAGS += -DDISABLE_BRANCH_PROFILING
|
||||
KBUILD_CFLAGS += $(cflags-y) -fno-delete-null-pointer-checks
|
||||
KBUILD_CFLAGS += $(cflags-y) -fno-delete-null-pointer-checks -msoft-float
|
||||
KBUILD_CFLAGS += $(call cc-option,-mpacked-stack)
|
||||
KBUILD_CFLAGS += $(call cc-option,-ffreestanding)
|
||||
|
||||
|
|
|
@ -381,7 +381,7 @@ CONFIG_ISCSI_TCP=m
|
|||
CONFIG_SCSI_DEBUG=m
|
||||
CONFIG_ZFCP=y
|
||||
CONFIG_SCSI_VIRTIO=m
|
||||
CONFIG_SCSI_DH=m
|
||||
CONFIG_SCSI_DH=y
|
||||
CONFIG_SCSI_DH_RDAC=m
|
||||
CONFIG_SCSI_DH_HP_SW=m
|
||||
CONFIG_SCSI_DH_EMC=m
|
||||
|
|
|
@ -377,7 +377,7 @@ CONFIG_ISCSI_TCP=m
|
|||
CONFIG_SCSI_DEBUG=m
|
||||
CONFIG_ZFCP=y
|
||||
CONFIG_SCSI_VIRTIO=m
|
||||
CONFIG_SCSI_DH=m
|
||||
CONFIG_SCSI_DH=y
|
||||
CONFIG_SCSI_DH_RDAC=m
|
||||
CONFIG_SCSI_DH_HP_SW=m
|
||||
CONFIG_SCSI_DH_EMC=m
|
||||
|
|
|
@ -377,7 +377,7 @@ CONFIG_ISCSI_TCP=m
|
|||
CONFIG_SCSI_DEBUG=m
|
||||
CONFIG_ZFCP=y
|
||||
CONFIG_SCSI_VIRTIO=m
|
||||
CONFIG_SCSI_DH=m
|
||||
CONFIG_SCSI_DH=y
|
||||
CONFIG_SCSI_DH_RDAC=m
|
||||
CONFIG_SCSI_DH_HP_SW=m
|
||||
CONFIG_SCSI_DH_EMC=m
|
||||
|
|
|
@ -19,7 +19,7 @@ int numa_pfn_to_nid(unsigned long pfn);
|
|||
int __node_distance(int a, int b);
|
||||
void numa_update_cpu_topology(void);
|
||||
|
||||
extern cpumask_var_t node_to_cpumask_map[MAX_NUMNODES];
|
||||
extern cpumask_t node_to_cpumask_map[MAX_NUMNODES];
|
||||
extern int numa_debug_enabled;
|
||||
|
||||
#else
|
||||
|
|
|
@ -68,7 +68,7 @@ static inline int cpu_to_node(int cpu)
|
|||
#define cpumask_of_node cpumask_of_node
|
||||
static inline const struct cpumask *cpumask_of_node(int node)
|
||||
{
|
||||
return node_to_cpumask_map[node];
|
||||
return &node_to_cpumask_map[node];
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
|
@ -176,6 +176,7 @@ int main(void)
|
|||
DEFINE(__LC_PASTE, offsetof(struct _lowcore, paste));
|
||||
DEFINE(__LC_FP_CREG_SAVE_AREA, offsetof(struct _lowcore, fpt_creg_save_area));
|
||||
DEFINE(__LC_LAST_BREAK, offsetof(struct _lowcore, breaking_event_addr));
|
||||
DEFINE(__LC_PERCPU_OFFSET, offsetof(struct _lowcore, percpu_offset));
|
||||
DEFINE(__LC_VDSO_PER_CPU, offsetof(struct _lowcore, vdso_per_cpu_data));
|
||||
DEFINE(__LC_GMAP, offsetof(struct _lowcore, gmap));
|
||||
DEFINE(__LC_PGM_TDB, offsetof(struct _lowcore, pgm_tdb));
|
||||
|
|
|
@ -733,6 +733,14 @@ ENTRY(psw_idle)
|
|||
stg %r3,__SF_EMPTY(%r15)
|
||||
larl %r1,.Lpsw_idle_lpsw+4
|
||||
stg %r1,__SF_EMPTY+8(%r15)
|
||||
#ifdef CONFIG_SMP
|
||||
larl %r1,smp_cpu_mtid
|
||||
llgf %r1,0(%r1)
|
||||
ltgr %r1,%r1
|
||||
jz .Lpsw_idle_stcctm
|
||||
.insn rsy,0xeb0000000017,%r1,5,__SF_EMPTY+16(%r15)
|
||||
.Lpsw_idle_stcctm:
|
||||
#endif
|
||||
STCK __CLOCK_IDLE_ENTER(%r2)
|
||||
stpt __TIMER_IDLE_ENTER(%r2)
|
||||
.Lpsw_idle_lpsw:
|
||||
|
@ -1159,7 +1167,27 @@ cleanup_critical:
|
|||
jhe 1f
|
||||
mvc __CLOCK_IDLE_ENTER(8,%r2),__CLOCK_IDLE_EXIT(%r2)
|
||||
mvc __TIMER_IDLE_ENTER(8,%r2),__TIMER_IDLE_EXIT(%r2)
|
||||
1: # account system time going idle
|
||||
1: # calculate idle cycles
|
||||
#ifdef CONFIG_SMP
|
||||
clg %r9,BASED(.Lcleanup_idle_insn)
|
||||
jl 3f
|
||||
larl %r1,smp_cpu_mtid
|
||||
llgf %r1,0(%r1)
|
||||
ltgr %r1,%r1
|
||||
jz 3f
|
||||
.insn rsy,0xeb0000000017,%r1,5,__SF_EMPTY+80(%r15)
|
||||
larl %r3,mt_cycles
|
||||
ag %r3,__LC_PERCPU_OFFSET
|
||||
la %r4,__SF_EMPTY+16(%r15)
|
||||
2: lg %r0,0(%r3)
|
||||
slg %r0,0(%r4)
|
||||
alg %r0,64(%r4)
|
||||
stg %r0,0(%r3)
|
||||
la %r3,8(%r3)
|
||||
la %r4,8(%r4)
|
||||
brct %r1,2b
|
||||
#endif
|
||||
3: # account system time going idle
|
||||
lg %r9,__LC_STEAL_TIMER
|
||||
alg %r9,__CLOCK_IDLE_ENTER(%r2)
|
||||
slg %r9,__LC_LAST_UPDATE_CLOCK
|
||||
|
|
|
@ -25,7 +25,7 @@ static DEFINE_SPINLOCK(virt_timer_lock);
|
|||
static atomic64_t virt_timer_current;
|
||||
static atomic64_t virt_timer_elapsed;
|
||||
|
||||
static DEFINE_PER_CPU(u64, mt_cycles[32]);
|
||||
DEFINE_PER_CPU(u64, mt_cycles[8]);
|
||||
static DEFINE_PER_CPU(u64, mt_scaling_mult) = { 1 };
|
||||
static DEFINE_PER_CPU(u64, mt_scaling_div) = { 1 };
|
||||
static DEFINE_PER_CPU(u64, mt_scaling_jiffies);
|
||||
|
@ -60,6 +60,34 @@ static inline int virt_timer_forward(u64 elapsed)
|
|||
return elapsed >= atomic64_read(&virt_timer_current);
|
||||
}
|
||||
|
||||
static void update_mt_scaling(void)
|
||||
{
|
||||
u64 cycles_new[8], *cycles_old;
|
||||
u64 delta, fac, mult, div;
|
||||
int i;
|
||||
|
||||
stcctm5(smp_cpu_mtid + 1, cycles_new);
|
||||
cycles_old = this_cpu_ptr(mt_cycles);
|
||||
fac = 1;
|
||||
mult = div = 0;
|
||||
for (i = 0; i <= smp_cpu_mtid; i++) {
|
||||
delta = cycles_new[i] - cycles_old[i];
|
||||
div += delta;
|
||||
mult *= i + 1;
|
||||
mult += delta * fac;
|
||||
fac *= i + 1;
|
||||
}
|
||||
div *= fac;
|
||||
if (div > 0) {
|
||||
/* Update scaling factor */
|
||||
__this_cpu_write(mt_scaling_mult, mult);
|
||||
__this_cpu_write(mt_scaling_div, div);
|
||||
memcpy(cycles_old, cycles_new,
|
||||
sizeof(u64) * (smp_cpu_mtid + 1));
|
||||
}
|
||||
__this_cpu_write(mt_scaling_jiffies, jiffies_64);
|
||||
}
|
||||
|
||||
/*
|
||||
* Update process times based on virtual cpu times stored by entry.S
|
||||
* to the lowcore fields user_timer, system_timer & steal_clock.
|
||||
|
@ -69,7 +97,6 @@ static int do_account_vtime(struct task_struct *tsk, int hardirq_offset)
|
|||
struct thread_info *ti = task_thread_info(tsk);
|
||||
u64 timer, clock, user, system, steal;
|
||||
u64 user_scaled, system_scaled;
|
||||
int i;
|
||||
|
||||
timer = S390_lowcore.last_update_timer;
|
||||
clock = S390_lowcore.last_update_clock;
|
||||
|
@ -85,34 +112,10 @@ static int do_account_vtime(struct task_struct *tsk, int hardirq_offset)
|
|||
S390_lowcore.system_timer += timer - S390_lowcore.last_update_timer;
|
||||
S390_lowcore.steal_timer += S390_lowcore.last_update_clock - clock;
|
||||
|
||||
/* Do MT utilization calculation */
|
||||
/* Update MT utilization calculation */
|
||||
if (smp_cpu_mtid &&
|
||||
time_after64(jiffies_64, __this_cpu_read(mt_scaling_jiffies))) {
|
||||
u64 cycles_new[32], *cycles_old;
|
||||
u64 delta, fac, mult, div;
|
||||
|
||||
cycles_old = this_cpu_ptr(mt_cycles);
|
||||
if (stcctm5(smp_cpu_mtid + 1, cycles_new) < 2) {
|
||||
fac = 1;
|
||||
mult = div = 0;
|
||||
for (i = 0; i <= smp_cpu_mtid; i++) {
|
||||
delta = cycles_new[i] - cycles_old[i];
|
||||
div += delta;
|
||||
mult *= i + 1;
|
||||
mult += delta * fac;
|
||||
fac *= i + 1;
|
||||
}
|
||||
div *= fac;
|
||||
if (div > 0) {
|
||||
/* Update scaling factor */
|
||||
__this_cpu_write(mt_scaling_mult, mult);
|
||||
__this_cpu_write(mt_scaling_div, div);
|
||||
memcpy(cycles_old, cycles_new,
|
||||
sizeof(u64) * (smp_cpu_mtid + 1));
|
||||
}
|
||||
}
|
||||
__this_cpu_write(mt_scaling_jiffies, jiffies_64);
|
||||
}
|
||||
time_after64(jiffies_64, this_cpu_read(mt_scaling_jiffies)))
|
||||
update_mt_scaling();
|
||||
|
||||
user = S390_lowcore.user_timer - ti->user_timer;
|
||||
S390_lowcore.steal_timer -= user;
|
||||
|
@ -181,6 +184,11 @@ void vtime_account_irq_enter(struct task_struct *tsk)
|
|||
S390_lowcore.last_update_timer = get_vtimer();
|
||||
S390_lowcore.system_timer += timer - S390_lowcore.last_update_timer;
|
||||
|
||||
/* Update MT utilization calculation */
|
||||
if (smp_cpu_mtid &&
|
||||
time_after64(jiffies_64, this_cpu_read(mt_scaling_jiffies)))
|
||||
update_mt_scaling();
|
||||
|
||||
system = S390_lowcore.system_timer - ti->system_timer;
|
||||
S390_lowcore.steal_timer -= system;
|
||||
ti->system_timer = S390_lowcore.system_timer;
|
||||
|
|
|
@ -368,7 +368,7 @@ static void topology_add_core(struct toptree *core)
|
|||
cpumask_copy(&top->thread_mask, &core->mask);
|
||||
cpumask_copy(&top->core_mask, &core_mc(core)->mask);
|
||||
cpumask_copy(&top->book_mask, &core_book(core)->mask);
|
||||
cpumask_set_cpu(cpu, node_to_cpumask_map[core_node(core)->id]);
|
||||
cpumask_set_cpu(cpu, &node_to_cpumask_map[core_node(core)->id]);
|
||||
top->node_id = core_node(core)->id;
|
||||
}
|
||||
}
|
||||
|
@ -383,7 +383,7 @@ static void toptree_to_topology(struct toptree *numa)
|
|||
|
||||
/* Clear all node masks */
|
||||
for (i = 0; i < MAX_NUMNODES; i++)
|
||||
cpumask_clear(node_to_cpumask_map[i]);
|
||||
cpumask_clear(&node_to_cpumask_map[i]);
|
||||
|
||||
/* Rebuild all masks */
|
||||
toptree_for_each(core, numa, CORE)
|
||||
|
|
|
@ -23,7 +23,7 @@
|
|||
pg_data_t *node_data[MAX_NUMNODES];
|
||||
EXPORT_SYMBOL(node_data);
|
||||
|
||||
cpumask_var_t node_to_cpumask_map[MAX_NUMNODES];
|
||||
cpumask_t node_to_cpumask_map[MAX_NUMNODES];
|
||||
EXPORT_SYMBOL(node_to_cpumask_map);
|
||||
|
||||
const struct numa_mode numa_mode_plain = {
|
||||
|
@ -144,7 +144,7 @@ void __init numa_setup(void)
|
|||
static int __init numa_init_early(void)
|
||||
{
|
||||
/* Attach all possible CPUs to node 0 for now. */
|
||||
cpumask_copy(node_to_cpumask_map[0], cpu_possible_mask);
|
||||
cpumask_copy(&node_to_cpumask_map[0], cpu_possible_mask);
|
||||
return 0;
|
||||
}
|
||||
early_initcall(numa_init_early);
|
||||
|
|
|
@ -40,5 +40,4 @@ generic-y += termbits.h
|
|||
generic-y += termios.h
|
||||
generic-y += trace_clock.h
|
||||
generic-y += types.h
|
||||
generic-y += word-at-a-time.h
|
||||
generic-y += xor.h
|
||||
|
|
|
@ -6,7 +6,7 @@
|
|||
struct word_at_a_time { /* unused */ };
|
||||
#define WORD_AT_A_TIME_CONSTANTS {}
|
||||
|
||||
/* Generate 0x01 byte values for non-zero bytes using a SIMD instruction. */
|
||||
/* Generate 0x01 byte values for zero bytes using a SIMD instruction. */
|
||||
static inline unsigned long has_zero(unsigned long val, unsigned long *data,
|
||||
const struct word_at_a_time *c)
|
||||
{
|
||||
|
@ -33,4 +33,10 @@ static inline long find_zero(unsigned long mask)
|
|||
#endif
|
||||
}
|
||||
|
||||
#ifdef __BIG_ENDIAN
|
||||
#define zero_bytemask(mask) (~1ul << (63 - __builtin_clzl(mask)))
|
||||
#else
|
||||
#define zero_bytemask(mask) ((2ul << __builtin_ctzl(mask)) - 1)
|
||||
#endif
|
||||
|
||||
#endif /* _ASM_WORD_AT_A_TIME_H */
|
||||
|
|
|
@ -1308,6 +1308,7 @@ config HIGHMEM
|
|||
config X86_PAE
|
||||
bool "PAE (Physical Address Extension) Support"
|
||||
depends on X86_32 && !HIGHMEM4G
|
||||
select SWIOTLB
|
||||
---help---
|
||||
PAE is required for NX support, and furthermore enables
|
||||
larger swapspace support for non-overcommit purposes. It
|
||||
|
|
|
@ -336,10 +336,10 @@ HYPERVISOR_update_descriptor(u64 ma, u64 desc)
|
|||
return _hypercall4(int, update_descriptor, ma, ma>>32, desc, desc>>32);
|
||||
}
|
||||
|
||||
static inline int
|
||||
static inline long
|
||||
HYPERVISOR_memory_op(unsigned int cmd, void *arg)
|
||||
{
|
||||
return _hypercall2(int, memory_op, cmd, arg);
|
||||
return _hypercall2(long, memory_op, cmd, arg);
|
||||
}
|
||||
|
||||
static inline int
|
||||
|
|
|
@ -33,6 +33,10 @@
|
|||
#include <linux/memblock.h>
|
||||
#include <linux/edd.h>
|
||||
|
||||
#ifdef CONFIG_KEXEC_CORE
|
||||
#include <linux/kexec.h>
|
||||
#endif
|
||||
|
||||
#include <xen/xen.h>
|
||||
#include <xen/events.h>
|
||||
#include <xen/interface/xen.h>
|
||||
|
@ -1077,6 +1081,7 @@ static int xen_write_msr_safe(unsigned int msr, unsigned low, unsigned high)
|
|||
/* Fast syscall setup is all done in hypercalls, so
|
||||
these are all ignored. Stub them out here to stop
|
||||
Xen console noise. */
|
||||
break;
|
||||
|
||||
default:
|
||||
if (!pmu_msr_write(msr, low, high, &ret))
|
||||
|
@ -1807,6 +1812,21 @@ static struct notifier_block xen_hvm_cpu_notifier = {
|
|||
.notifier_call = xen_hvm_cpu_notify,
|
||||
};
|
||||
|
||||
#ifdef CONFIG_KEXEC_CORE
|
||||
static void xen_hvm_shutdown(void)
|
||||
{
|
||||
native_machine_shutdown();
|
||||
if (kexec_in_progress)
|
||||
xen_reboot(SHUTDOWN_soft_reset);
|
||||
}
|
||||
|
||||
static void xen_hvm_crash_shutdown(struct pt_regs *regs)
|
||||
{
|
||||
native_machine_crash_shutdown(regs);
|
||||
xen_reboot(SHUTDOWN_soft_reset);
|
||||
}
|
||||
#endif
|
||||
|
||||
static void __init xen_hvm_guest_init(void)
|
||||
{
|
||||
if (xen_pv_domain())
|
||||
|
@ -1826,6 +1846,10 @@ static void __init xen_hvm_guest_init(void)
|
|||
x86_init.irqs.intr_init = xen_init_IRQ;
|
||||
xen_hvm_init_time_ops();
|
||||
xen_hvm_init_mmu_ops();
|
||||
#ifdef CONFIG_KEXEC_CORE
|
||||
machine_ops.shutdown = xen_hvm_shutdown;
|
||||
machine_ops.crash_shutdown = xen_hvm_crash_shutdown;
|
||||
#endif
|
||||
}
|
||||
#endif
|
||||
|
||||
|
|
|
@ -112,6 +112,15 @@ static unsigned long *p2m_identity;
|
|||
static pte_t *p2m_missing_pte;
|
||||
static pte_t *p2m_identity_pte;
|
||||
|
||||
/*
|
||||
* Hint at last populated PFN.
|
||||
*
|
||||
* Used to set HYPERVISOR_shared_info->arch.max_pfn so the toolstack
|
||||
* can avoid scanning the whole P2M (which may be sized to account for
|
||||
* hotplugged memory).
|
||||
*/
|
||||
static unsigned long xen_p2m_last_pfn;
|
||||
|
||||
static inline unsigned p2m_top_index(unsigned long pfn)
|
||||
{
|
||||
BUG_ON(pfn >= MAX_P2M_PFN);
|
||||
|
@ -270,7 +279,7 @@ void xen_setup_mfn_list_list(void)
|
|||
else
|
||||
HYPERVISOR_shared_info->arch.pfn_to_mfn_frame_list_list =
|
||||
virt_to_mfn(p2m_top_mfn);
|
||||
HYPERVISOR_shared_info->arch.max_pfn = xen_max_p2m_pfn;
|
||||
HYPERVISOR_shared_info->arch.max_pfn = xen_p2m_last_pfn;
|
||||
HYPERVISOR_shared_info->arch.p2m_generation = 0;
|
||||
HYPERVISOR_shared_info->arch.p2m_vaddr = (unsigned long)xen_p2m_addr;
|
||||
HYPERVISOR_shared_info->arch.p2m_cr3 =
|
||||
|
@ -406,6 +415,8 @@ void __init xen_vmalloc_p2m_tree(void)
|
|||
static struct vm_struct vm;
|
||||
unsigned long p2m_limit;
|
||||
|
||||
xen_p2m_last_pfn = xen_max_p2m_pfn;
|
||||
|
||||
p2m_limit = (phys_addr_t)P2M_LIMIT * 1024 * 1024 * 1024 / PAGE_SIZE;
|
||||
vm.flags = VM_ALLOC;
|
||||
vm.size = ALIGN(sizeof(unsigned long) * max(xen_max_p2m_pfn, p2m_limit),
|
||||
|
@ -608,6 +619,12 @@ static bool alloc_p2m(unsigned long pfn)
|
|||
free_p2m_page(p2m);
|
||||
}
|
||||
|
||||
/* Expanded the p2m? */
|
||||
if (pfn > xen_p2m_last_pfn) {
|
||||
xen_p2m_last_pfn = pfn;
|
||||
HYPERVISOR_shared_info->arch.max_pfn = xen_p2m_last_pfn;
|
||||
}
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
|
|
|
@ -548,7 +548,7 @@ static unsigned long __init xen_get_max_pages(void)
|
|||
{
|
||||
unsigned long max_pages, limit;
|
||||
domid_t domid = DOMID_SELF;
|
||||
int ret;
|
||||
long ret;
|
||||
|
||||
limit = xen_get_pages_limit();
|
||||
max_pages = limit;
|
||||
|
@ -798,7 +798,7 @@ char * __init xen_memory_setup(void)
|
|||
xen_ignore_unusable();
|
||||
|
||||
/* Make sure the Xen-supplied memory map is well-ordered. */
|
||||
sanitize_e820_map(xen_e820_map, xen_e820_map_entries,
|
||||
sanitize_e820_map(xen_e820_map, ARRAY_SIZE(xen_e820_map),
|
||||
&xen_e820_map_entries);
|
||||
|
||||
max_pages = xen_get_max_pages();
|
||||
|
|
|
@ -32,8 +32,7 @@ static DEFINE_MUTEX(regmap_debugfs_early_lock);
|
|||
/* Calculate the length of a fixed format */
|
||||
static size_t regmap_calc_reg_len(int max_val, char *buf, size_t buf_size)
|
||||
{
|
||||
snprintf(buf, buf_size, "%x", max_val);
|
||||
return strlen(buf);
|
||||
return snprintf(NULL, 0, "%x", max_val);
|
||||
}
|
||||
|
||||
static ssize_t regmap_name_read_file(struct file *file,
|
||||
|
@ -432,7 +431,7 @@ static ssize_t regmap_access_read_file(struct file *file,
|
|||
/* If we're in the region the user is trying to read */
|
||||
if (p >= *ppos) {
|
||||
/* ...but not beyond it */
|
||||
if (buf_pos >= count - 1 - tot_len)
|
||||
if (buf_pos + tot_len + 1 >= count)
|
||||
break;
|
||||
|
||||
/* Format the register */
|
||||
|
|
|
@ -36,7 +36,6 @@ config ARM_CCI400_PORT_CTRL
|
|||
|
||||
config ARM_CCI500_PMU
|
||||
bool "ARM CCI500 PMU support"
|
||||
default y
|
||||
depends on (ARM && CPU_V7) || ARM64
|
||||
depends on PERF_EVENTS
|
||||
select ARM_CCI_PMU
|
||||
|
|
|
@ -164,7 +164,7 @@ static int exynos_cpuclk_pre_rate_change(struct clk_notifier_data *ndata,
|
|||
* the values for DIV_COPY and DIV_HPM dividers need not be set.
|
||||
*/
|
||||
div0 = cfg_data->div0;
|
||||
if (test_bit(CLK_CPU_HAS_DIV1, &cpuclk->flags)) {
|
||||
if (cpuclk->flags & CLK_CPU_HAS_DIV1) {
|
||||
div1 = cfg_data->div1;
|
||||
if (readl(base + E4210_SRC_CPU) & E4210_MUX_HPM_MASK)
|
||||
div1 = readl(base + E4210_DIV_CPU1) &
|
||||
|
@ -185,7 +185,7 @@ static int exynos_cpuclk_pre_rate_change(struct clk_notifier_data *ndata,
|
|||
alt_div = DIV_ROUND_UP(alt_prate, tmp_rate) - 1;
|
||||
WARN_ON(alt_div >= MAX_DIV);
|
||||
|
||||
if (test_bit(CLK_CPU_NEEDS_DEBUG_ALT_DIV, &cpuclk->flags)) {
|
||||
if (cpuclk->flags & CLK_CPU_NEEDS_DEBUG_ALT_DIV) {
|
||||
/*
|
||||
* In Exynos4210, ATB clock parent is also mout_core. So
|
||||
* ATB clock also needs to be mantained at safe speed.
|
||||
|
@ -206,7 +206,7 @@ static int exynos_cpuclk_pre_rate_change(struct clk_notifier_data *ndata,
|
|||
writel(div0, base + E4210_DIV_CPU0);
|
||||
wait_until_divider_stable(base + E4210_DIV_STAT_CPU0, DIV_MASK_ALL);
|
||||
|
||||
if (test_bit(CLK_CPU_HAS_DIV1, &cpuclk->flags)) {
|
||||
if (cpuclk->flags & CLK_CPU_HAS_DIV1) {
|
||||
writel(div1, base + E4210_DIV_CPU1);
|
||||
wait_until_divider_stable(base + E4210_DIV_STAT_CPU1,
|
||||
DIV_MASK_ALL);
|
||||
|
@ -225,7 +225,7 @@ static int exynos_cpuclk_post_rate_change(struct clk_notifier_data *ndata,
|
|||
unsigned long mux_reg;
|
||||
|
||||
/* find out the divider values to use for clock data */
|
||||
if (test_bit(CLK_CPU_NEEDS_DEBUG_ALT_DIV, &cpuclk->flags)) {
|
||||
if (cpuclk->flags & CLK_CPU_NEEDS_DEBUG_ALT_DIV) {
|
||||
while ((cfg_data->prate * 1000) != ndata->new_rate) {
|
||||
if (cfg_data->prate == 0)
|
||||
return -EINVAL;
|
||||
|
@ -240,7 +240,7 @@ static int exynos_cpuclk_post_rate_change(struct clk_notifier_data *ndata,
|
|||
writel(mux_reg & ~(1 << 16), base + E4210_SRC_CPU);
|
||||
wait_until_mux_stable(base + E4210_STAT_CPU, 16, 1);
|
||||
|
||||
if (test_bit(CLK_CPU_NEEDS_DEBUG_ALT_DIV, &cpuclk->flags)) {
|
||||
if (cpuclk->flags & CLK_CPU_NEEDS_DEBUG_ALT_DIV) {
|
||||
div |= (cfg_data->div0 & E4210_DIV0_ATB_MASK);
|
||||
div_mask |= E4210_DIV0_ATB_MASK;
|
||||
}
|
||||
|
|
|
@ -374,7 +374,6 @@ static struct ti_dt_clk omap3xxx_clks[] = {
|
|||
DT_CLK(NULL, "gpio2_ick", "gpio2_ick"),
|
||||
DT_CLK(NULL, "wdt3_ick", "wdt3_ick"),
|
||||
DT_CLK(NULL, "uart3_ick", "uart3_ick"),
|
||||
DT_CLK(NULL, "uart4_ick", "uart4_ick"),
|
||||
DT_CLK(NULL, "gpt9_ick", "gpt9_ick"),
|
||||
DT_CLK(NULL, "gpt8_ick", "gpt8_ick"),
|
||||
DT_CLK(NULL, "gpt7_ick", "gpt7_ick"),
|
||||
|
@ -519,6 +518,7 @@ static struct ti_dt_clk am35xx_clks[] = {
|
|||
static struct ti_dt_clk omap36xx_clks[] = {
|
||||
DT_CLK(NULL, "omap_192m_alwon_fck", "omap_192m_alwon_fck"),
|
||||
DT_CLK(NULL, "uart4_fck", "uart4_fck"),
|
||||
DT_CLK(NULL, "uart4_ick", "uart4_ick"),
|
||||
{ .node_name = NULL },
|
||||
};
|
||||
|
||||
|
|
|
@ -18,7 +18,6 @@
|
|||
|
||||
#include "clock.h"
|
||||
|
||||
#define DRA7_DPLL_ABE_DEFFREQ 180633600
|
||||
#define DRA7_DPLL_GMAC_DEFFREQ 1000000000
|
||||
#define DRA7_DPLL_USB_DEFFREQ 960000000
|
||||
|
||||
|
@ -313,27 +312,12 @@ static struct ti_dt_clk dra7xx_clks[] = {
|
|||
int __init dra7xx_dt_clk_init(void)
|
||||
{
|
||||
int rc;
|
||||
struct clk *abe_dpll_mux, *sys_clkin2, *dpll_ck, *hdcp_ck;
|
||||
struct clk *dpll_ck, *hdcp_ck;
|
||||
|
||||
ti_dt_clocks_register(dra7xx_clks);
|
||||
|
||||
omap2_clk_disable_autoidle_all();
|
||||
|
||||
abe_dpll_mux = clk_get_sys(NULL, "abe_dpll_sys_clk_mux");
|
||||
sys_clkin2 = clk_get_sys(NULL, "sys_clkin2");
|
||||
dpll_ck = clk_get_sys(NULL, "dpll_abe_ck");
|
||||
|
||||
rc = clk_set_parent(abe_dpll_mux, sys_clkin2);
|
||||
if (!rc)
|
||||
rc = clk_set_rate(dpll_ck, DRA7_DPLL_ABE_DEFFREQ);
|
||||
if (rc)
|
||||
pr_err("%s: failed to configure ABE DPLL!\n", __func__);
|
||||
|
||||
dpll_ck = clk_get_sys(NULL, "dpll_abe_m2x2_ck");
|
||||
rc = clk_set_rate(dpll_ck, DRA7_DPLL_ABE_DEFFREQ * 2);
|
||||
if (rc)
|
||||
pr_err("%s: failed to configure ABE DPLL m2x2!\n", __func__);
|
||||
|
||||
dpll_ck = clk_get_sys(NULL, "dpll_gmac_ck");
|
||||
rc = clk_set_rate(dpll_ck, DRA7_DPLL_GMAC_DEFFREQ);
|
||||
if (rc)
|
||||
|
|
|
@ -222,7 +222,7 @@ int omap2_dflt_clk_enable(struct clk_hw *hw)
|
|||
}
|
||||
}
|
||||
|
||||
if (unlikely(!clk->enable_reg)) {
|
||||
if (unlikely(IS_ERR(clk->enable_reg))) {
|
||||
pr_err("%s: %s missing enable_reg\n", __func__,
|
||||
clk_hw_get_name(hw));
|
||||
ret = -EINVAL;
|
||||
|
@ -264,7 +264,7 @@ void omap2_dflt_clk_disable(struct clk_hw *hw)
|
|||
u32 v;
|
||||
|
||||
clk = to_clk_hw_omap(hw);
|
||||
if (!clk->enable_reg) {
|
||||
if (IS_ERR(clk->enable_reg)) {
|
||||
/*
|
||||
* 'independent' here refers to a clock which is not
|
||||
* controlled by its parent.
|
||||
|
|
|
@ -149,6 +149,9 @@ static ssize_t show_freqdomain_cpus(struct cpufreq_policy *policy, char *buf)
|
|||
{
|
||||
struct acpi_cpufreq_data *data = policy->driver_data;
|
||||
|
||||
if (unlikely(!data))
|
||||
return -ENODEV;
|
||||
|
||||
return cpufreq_show_cpus(data->freqdomain_cpus, buf);
|
||||
}
|
||||
|
||||
|
|
|
@ -1436,8 +1436,10 @@ static void cpufreq_offline_finish(unsigned int cpu)
|
|||
* since this is a core component, and is essential for the
|
||||
* subsequent light-weight ->init() to succeed.
|
||||
*/
|
||||
if (cpufreq_driver->exit)
|
||||
if (cpufreq_driver->exit) {
|
||||
cpufreq_driver->exit(policy);
|
||||
policy->freq_table = NULL;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
|
|
|
@ -492,7 +492,7 @@ struct devfreq *devfreq_add_device(struct device *dev,
|
|||
if (err) {
|
||||
put_device(&devfreq->dev);
|
||||
mutex_unlock(&devfreq->lock);
|
||||
goto err_dev;
|
||||
goto err_out;
|
||||
}
|
||||
|
||||
mutex_unlock(&devfreq->lock);
|
||||
|
@ -518,7 +518,6 @@ struct devfreq *devfreq_add_device(struct device *dev,
|
|||
err_init:
|
||||
list_del(&devfreq->node);
|
||||
device_unregister(&devfreq->dev);
|
||||
err_dev:
|
||||
kfree(devfreq);
|
||||
err_out:
|
||||
return ERR_PTR(err);
|
||||
|
@ -795,8 +794,10 @@ static ssize_t governor_store(struct device *dev, struct device_attribute *attr,
|
|||
ret = PTR_ERR(governor);
|
||||
goto out;
|
||||
}
|
||||
if (df->governor == governor)
|
||||
if (df->governor == governor) {
|
||||
ret = 0;
|
||||
goto out;
|
||||
}
|
||||
|
||||
if (df->governor) {
|
||||
ret = df->governor->event_handler(df, DEVFREQ_GOV_STOP, NULL);
|
||||
|
|
|
@ -74,7 +74,7 @@ static int mcb_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
|
|||
ret = -ENOTSUPP;
|
||||
dev_err(&pdev->dev,
|
||||
"IO mapped PCI devices are not supported\n");
|
||||
goto out_release;
|
||||
goto out_iounmap;
|
||||
}
|
||||
|
||||
pci_set_drvdata(pdev, priv);
|
||||
|
@ -89,7 +89,7 @@ static int mcb_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
|
|||
|
||||
ret = chameleon_parse_cells(priv->bus, priv->mapbase, priv->base);
|
||||
if (ret < 0)
|
||||
goto out_iounmap;
|
||||
goto out_mcb_bus;
|
||||
num_cells = ret;
|
||||
|
||||
dev_dbg(&pdev->dev, "Found %d cells\n", num_cells);
|
||||
|
@ -98,6 +98,8 @@ static int mcb_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
|
|||
|
||||
return 0;
|
||||
|
||||
out_mcb_bus:
|
||||
mcb_release_bus(priv->bus);
|
||||
out_iounmap:
|
||||
iounmap(priv->base);
|
||||
out_release:
|
||||
|
|
|
@ -436,7 +436,7 @@ static struct dm_cache_policy *wb_create(dm_cblock_t cache_size,
|
|||
static struct dm_cache_policy_type wb_policy_type = {
|
||||
.name = "cleaner",
|
||||
.version = {1, 0, 0},
|
||||
.hint_size = 0,
|
||||
.hint_size = 4,
|
||||
.owner = THIS_MODULE,
|
||||
.create = wb_create
|
||||
};
|
||||
|
|
|
@ -203,7 +203,7 @@ int dm_exception_store_create(struct dm_target *ti, int argc, char **argv,
|
|||
return -EINVAL;
|
||||
}
|
||||
|
||||
tmp_store = kmalloc(sizeof(*tmp_store), GFP_KERNEL);
|
||||
tmp_store = kzalloc(sizeof(*tmp_store), GFP_KERNEL);
|
||||
if (!tmp_store) {
|
||||
ti->error = "Exception store allocation failed";
|
||||
return -ENOMEM;
|
||||
|
@ -215,7 +215,7 @@ int dm_exception_store_create(struct dm_target *ti, int argc, char **argv,
|
|||
else if (persistent == 'N')
|
||||
type = get_type("N");
|
||||
else {
|
||||
ti->error = "Persistent flag is not P or N";
|
||||
ti->error = "Exception store type is not P or N";
|
||||
r = -EINVAL;
|
||||
goto bad_type;
|
||||
}
|
||||
|
@ -233,7 +233,7 @@ int dm_exception_store_create(struct dm_target *ti, int argc, char **argv,
|
|||
if (r)
|
||||
goto bad;
|
||||
|
||||
r = type->ctr(tmp_store, 0, NULL);
|
||||
r = type->ctr(tmp_store, (strlen(argv[0]) > 1 ? &argv[0][1] : NULL));
|
||||
if (r) {
|
||||
ti->error = "Exception store type constructor failed";
|
||||
goto bad;
|
||||
|
|
|
@ -42,8 +42,7 @@ struct dm_exception_store_type {
|
|||
const char *name;
|
||||
struct module *module;
|
||||
|
||||
int (*ctr) (struct dm_exception_store *store,
|
||||
unsigned argc, char **argv);
|
||||
int (*ctr) (struct dm_exception_store *store, char *options);
|
||||
|
||||
/*
|
||||
* Destroys this object when you've finished with it.
|
||||
|
@ -123,6 +122,8 @@ struct dm_exception_store {
|
|||
unsigned chunk_shift;
|
||||
|
||||
void *context;
|
||||
|
||||
bool userspace_supports_overflow;
|
||||
};
|
||||
|
||||
/*
|
||||
|
|
|
@ -329,8 +329,7 @@ static int validate_region_size(struct raid_set *rs, unsigned long region_size)
|
|||
*/
|
||||
if (min_region_size > (1 << 13)) {
|
||||
/* If not a power of 2, make it the next power of 2 */
|
||||
if (min_region_size & (min_region_size - 1))
|
||||
region_size = 1 << fls(region_size);
|
||||
region_size = roundup_pow_of_two(min_region_size);
|
||||
DMINFO("Choosing default region size of %lu sectors",
|
||||
region_size);
|
||||
} else {
|
||||
|
|
|
@ -7,6 +7,7 @@
|
|||
|
||||
#include "dm-exception-store.h"
|
||||
|
||||
#include <linux/ctype.h>
|
||||
#include <linux/mm.h>
|
||||
#include <linux/pagemap.h>
|
||||
#include <linux/vmalloc.h>
|
||||
|
@ -843,8 +844,7 @@ static void persistent_drop_snapshot(struct dm_exception_store *store)
|
|||
DMWARN("write header failed");
|
||||
}
|
||||
|
||||
static int persistent_ctr(struct dm_exception_store *store,
|
||||
unsigned argc, char **argv)
|
||||
static int persistent_ctr(struct dm_exception_store *store, char *options)
|
||||
{
|
||||
struct pstore *ps;
|
||||
|
||||
|
@ -873,6 +873,16 @@ static int persistent_ctr(struct dm_exception_store *store,
|
|||
return -ENOMEM;
|
||||
}
|
||||
|
||||
if (options) {
|
||||
char overflow = toupper(options[0]);
|
||||
if (overflow == 'O')
|
||||
store->userspace_supports_overflow = true;
|
||||
else {
|
||||
DMERR("Unsupported persistent store option: %s", options);
|
||||
return -EINVAL;
|
||||
}
|
||||
}
|
||||
|
||||
store->context = ps;
|
||||
|
||||
return 0;
|
||||
|
@ -888,7 +898,8 @@ static unsigned persistent_status(struct dm_exception_store *store,
|
|||
case STATUSTYPE_INFO:
|
||||
break;
|
||||
case STATUSTYPE_TABLE:
|
||||
DMEMIT(" P %llu", (unsigned long long)store->chunk_size);
|
||||
DMEMIT(" %s %llu", store->userspace_supports_overflow ? "PO" : "P",
|
||||
(unsigned long long)store->chunk_size);
|
||||
}
|
||||
|
||||
return sz;
|
||||
|
|
|
@ -70,8 +70,7 @@ static void transient_usage(struct dm_exception_store *store,
|
|||
*metadata_sectors = 0;
|
||||
}
|
||||
|
||||
static int transient_ctr(struct dm_exception_store *store,
|
||||
unsigned argc, char **argv)
|
||||
static int transient_ctr(struct dm_exception_store *store, char *options)
|
||||
{
|
||||
struct transient_c *tc;
|
||||
|
||||
|
|
|
@ -1098,7 +1098,7 @@ static void stop_merge(struct dm_snapshot *s)
|
|||
}
|
||||
|
||||
/*
|
||||
* Construct a snapshot mapping: <origin_dev> <COW-dev> <p/n> <chunk-size>
|
||||
* Construct a snapshot mapping: <origin_dev> <COW-dev> <p|po|n> <chunk-size>
|
||||
*/
|
||||
static int snapshot_ctr(struct dm_target *ti, unsigned int argc, char **argv)
|
||||
{
|
||||
|
@ -1302,6 +1302,7 @@ static void __handover_exceptions(struct dm_snapshot *snap_src,
|
|||
|
||||
u.store_swap = snap_dest->store;
|
||||
snap_dest->store = snap_src->store;
|
||||
snap_dest->store->userspace_supports_overflow = u.store_swap->userspace_supports_overflow;
|
||||
snap_src->store = u.store_swap;
|
||||
|
||||
snap_dest->store->snap = snap_dest;
|
||||
|
@ -1739,8 +1740,11 @@ static int snapshot_map(struct dm_target *ti, struct bio *bio)
|
|||
|
||||
pe = __find_pending_exception(s, pe, chunk);
|
||||
if (!pe) {
|
||||
s->snapshot_overflowed = 1;
|
||||
DMERR("Snapshot overflowed: Unable to allocate exception.");
|
||||
if (s->store->userspace_supports_overflow) {
|
||||
s->snapshot_overflowed = 1;
|
||||
DMERR("Snapshot overflowed: Unable to allocate exception.");
|
||||
} else
|
||||
__invalidate_snapshot(s, -ENOMEM);
|
||||
r = -EIO;
|
||||
goto out_unlock;
|
||||
}
|
||||
|
@ -2365,7 +2369,7 @@ static struct target_type origin_target = {
|
|||
|
||||
static struct target_type snapshot_target = {
|
||||
.name = "snapshot",
|
||||
.version = {1, 14, 0},
|
||||
.version = {1, 15, 0},
|
||||
.module = THIS_MODULE,
|
||||
.ctr = snapshot_ctr,
|
||||
.dtr = snapshot_dtr,
|
||||
|
@ -2379,7 +2383,7 @@ static struct target_type snapshot_target = {
|
|||
|
||||
static struct target_type merge_target = {
|
||||
.name = dm_snapshot_merge_target_name,
|
||||
.version = {1, 3, 0},
|
||||
.version = {1, 4, 0},
|
||||
.module = THIS_MODULE,
|
||||
.ctr = snapshot_ctr,
|
||||
.dtr = snapshot_dtr,
|
||||
|
|
|
@ -1001,6 +1001,7 @@ static void end_clone_bio(struct bio *clone)
|
|||
struct dm_rq_target_io *tio = info->tio;
|
||||
struct bio *bio = info->orig;
|
||||
unsigned int nr_bytes = info->orig->bi_iter.bi_size;
|
||||
int error = clone->bi_error;
|
||||
|
||||
bio_put(clone);
|
||||
|
||||
|
@ -1011,13 +1012,13 @@ static void end_clone_bio(struct bio *clone)
|
|||
* the remainder.
|
||||
*/
|
||||
return;
|
||||
else if (bio->bi_error) {
|
||||
else if (error) {
|
||||
/*
|
||||
* Don't notice the error to the upper layer yet.
|
||||
* The error handling decision is made by the target driver,
|
||||
* when the request is completed.
|
||||
*/
|
||||
tio->error = bio->bi_error;
|
||||
tio->error = error;
|
||||
return;
|
||||
}
|
||||
|
||||
|
@ -2837,8 +2838,6 @@ static void __dm_destroy(struct mapped_device *md, bool wait)
|
|||
|
||||
might_sleep();
|
||||
|
||||
map = dm_get_live_table(md, &srcu_idx);
|
||||
|
||||
spin_lock(&_minor_lock);
|
||||
idr_replace(&_minor_idr, MINOR_ALLOCED, MINOR(disk_devt(dm_disk(md))));
|
||||
set_bit(DMF_FREEING, &md->flags);
|
||||
|
@ -2852,14 +2851,14 @@ static void __dm_destroy(struct mapped_device *md, bool wait)
|
|||
* do not race with internal suspend.
|
||||
*/
|
||||
mutex_lock(&md->suspend_lock);
|
||||
map = dm_get_live_table(md, &srcu_idx);
|
||||
if (!dm_suspended_md(md)) {
|
||||
dm_table_presuspend_targets(map);
|
||||
dm_table_postsuspend_targets(map);
|
||||
}
|
||||
mutex_unlock(&md->suspend_lock);
|
||||
|
||||
/* dm_put_live_table must be before msleep, otherwise deadlock is possible */
|
||||
dm_put_live_table(md, srcu_idx);
|
||||
mutex_unlock(&md->suspend_lock);
|
||||
|
||||
/*
|
||||
* Rare, but there may be I/O requests still going to complete,
|
||||
|
|
|
@ -2382,8 +2382,8 @@ static void raid1d(struct md_thread *thread)
|
|||
}
|
||||
spin_unlock_irqrestore(&conf->device_lock, flags);
|
||||
while (!list_empty(&tmp)) {
|
||||
r1_bio = list_first_entry(&conf->bio_end_io_list,
|
||||
struct r1bio, retry_list);
|
||||
r1_bio = list_first_entry(&tmp, struct r1bio,
|
||||
retry_list);
|
||||
list_del(&r1_bio->retry_list);
|
||||
raid_end_bio_io(r1_bio);
|
||||
}
|
||||
|
|
|
@ -2688,8 +2688,8 @@ static void raid10d(struct md_thread *thread)
|
|||
}
|
||||
spin_unlock_irqrestore(&conf->device_lock, flags);
|
||||
while (!list_empty(&tmp)) {
|
||||
r10_bio = list_first_entry(&conf->bio_end_io_list,
|
||||
struct r10bio, retry_list);
|
||||
r10_bio = list_first_entry(&tmp, struct r10bio,
|
||||
retry_list);
|
||||
list_del(&r10_bio->retry_list);
|
||||
raid_end_bio_io(r10_bio);
|
||||
}
|
||||
|
|
|
@ -1209,7 +1209,7 @@ int mei_hbm_dispatch(struct mei_device *dev, struct mei_msg_hdr *hdr)
|
|||
* after the host receives the enum_resp
|
||||
* message clients may be added or removed
|
||||
*/
|
||||
if (dev->hbm_state <= MEI_HBM_ENUM_CLIENTS &&
|
||||
if (dev->hbm_state <= MEI_HBM_ENUM_CLIENTS ||
|
||||
dev->hbm_state >= MEI_HBM_STOPPED) {
|
||||
dev_err(dev->dev, "hbm: add client: state mismatch, [%d, %d]\n",
|
||||
dev->dev_state, dev->hbm_state);
|
||||
|
|
|
@ -182,6 +182,7 @@ struct omap_hsmmc_host {
|
|||
struct clk *fclk;
|
||||
struct clk *dbclk;
|
||||
struct regulator *pbias;
|
||||
bool pbias_enabled;
|
||||
void __iomem *base;
|
||||
int vqmmc_enabled;
|
||||
resource_size_t mapbase;
|
||||
|
@ -328,20 +329,22 @@ static int omap_hsmmc_set_pbias(struct omap_hsmmc_host *host, bool power_on,
|
|||
return ret;
|
||||
}
|
||||
|
||||
if (!regulator_is_enabled(host->pbias)) {
|
||||
if (host->pbias_enabled == 0) {
|
||||
ret = regulator_enable(host->pbias);
|
||||
if (ret) {
|
||||
dev_err(host->dev, "pbias reg enable fail\n");
|
||||
return ret;
|
||||
}
|
||||
host->pbias_enabled = 1;
|
||||
}
|
||||
} else {
|
||||
if (regulator_is_enabled(host->pbias)) {
|
||||
if (host->pbias_enabled == 1) {
|
||||
ret = regulator_disable(host->pbias);
|
||||
if (ret) {
|
||||
dev_err(host->dev, "pbias reg disable fail\n");
|
||||
return ret;
|
||||
}
|
||||
host->pbias_enabled = 0;
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -475,7 +478,7 @@ static int omap_hsmmc_reg_get(struct omap_hsmmc_host *host)
|
|||
mmc->supply.vmmc = devm_regulator_get_optional(host->dev, "vmmc");
|
||||
if (IS_ERR(mmc->supply.vmmc)) {
|
||||
ret = PTR_ERR(mmc->supply.vmmc);
|
||||
if (ret != -ENODEV)
|
||||
if ((ret != -ENODEV) && host->dev->of_node)
|
||||
return ret;
|
||||
dev_dbg(host->dev, "unable to get vmmc regulator %ld\n",
|
||||
PTR_ERR(mmc->supply.vmmc));
|
||||
|
@ -490,7 +493,7 @@ static int omap_hsmmc_reg_get(struct omap_hsmmc_host *host)
|
|||
mmc->supply.vqmmc = devm_regulator_get_optional(host->dev, "vmmc_aux");
|
||||
if (IS_ERR(mmc->supply.vqmmc)) {
|
||||
ret = PTR_ERR(mmc->supply.vqmmc);
|
||||
if (ret != -ENODEV)
|
||||
if ((ret != -ENODEV) && host->dev->of_node)
|
||||
return ret;
|
||||
dev_dbg(host->dev, "unable to get vmmc_aux regulator %ld\n",
|
||||
PTR_ERR(mmc->supply.vqmmc));
|
||||
|
@ -500,7 +503,7 @@ static int omap_hsmmc_reg_get(struct omap_hsmmc_host *host)
|
|||
host->pbias = devm_regulator_get_optional(host->dev, "pbias");
|
||||
if (IS_ERR(host->pbias)) {
|
||||
ret = PTR_ERR(host->pbias);
|
||||
if (ret != -ENODEV)
|
||||
if ((ret != -ENODEV) && host->dev->of_node)
|
||||
return ret;
|
||||
dev_dbg(host->dev, "unable to get pbias regulator %ld\n",
|
||||
PTR_ERR(host->pbias));
|
||||
|
@ -2053,6 +2056,7 @@ static int omap_hsmmc_probe(struct platform_device *pdev)
|
|||
host->base = base + pdata->reg_offset;
|
||||
host->power_mode = MMC_POWER_OFF;
|
||||
host->next_data.cookie = 1;
|
||||
host->pbias_enabled = 0;
|
||||
host->vqmmc_enabled = 0;
|
||||
|
||||
ret = omap_hsmmc_gpio_init(mmc, host, pdata);
|
||||
|
|
|
@ -43,6 +43,7 @@ static const struct sdhci_ops sdhci_at91_sama5d2_ops = {
|
|||
|
||||
static const struct sdhci_pltfm_data soc_data_sama5d2 = {
|
||||
.ops = &sdhci_at91_sama5d2_ops,
|
||||
.quirks2 = SDHCI_QUIRK2_NEED_DELAY_AFTER_INT_CLK_RST,
|
||||
};
|
||||
|
||||
static const struct of_device_id sdhci_at91_dt_match[] = {
|
||||
|
|
|
@ -135,6 +135,7 @@ static int armada_38x_quirks(struct platform_device *pdev,
|
|||
struct sdhci_pxa *pxa = pltfm_host->priv;
|
||||
struct resource *res;
|
||||
|
||||
host->quirks &= ~SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN;
|
||||
host->quirks |= SDHCI_QUIRK_MISSING_CAPS;
|
||||
res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
|
||||
"conf-sdio3");
|
||||
|
@ -290,6 +291,9 @@ static void pxav3_set_uhs_signaling(struct sdhci_host *host, unsigned int uhs)
|
|||
uhs == MMC_TIMING_UHS_DDR50) {
|
||||
reg_val &= ~SDIO3_CONF_CLK_INV;
|
||||
reg_val |= SDIO3_CONF_SD_FB_CLK;
|
||||
} else if (uhs == MMC_TIMING_MMC_HS) {
|
||||
reg_val &= ~SDIO3_CONF_CLK_INV;
|
||||
reg_val &= ~SDIO3_CONF_SD_FB_CLK;
|
||||
} else {
|
||||
reg_val |= SDIO3_CONF_CLK_INV;
|
||||
reg_val &= ~SDIO3_CONF_SD_FB_CLK;
|
||||
|
@ -398,7 +402,7 @@ static int sdhci_pxav3_probe(struct platform_device *pdev)
|
|||
if (of_device_is_compatible(np, "marvell,armada-380-sdhci")) {
|
||||
ret = armada_38x_quirks(pdev, host);
|
||||
if (ret < 0)
|
||||
goto err_clk_get;
|
||||
goto err_mbus_win;
|
||||
ret = mv_conf_mbus_windows(pdev, mv_mbus_dram_info());
|
||||
if (ret < 0)
|
||||
goto err_mbus_win;
|
||||
|
|
|
@ -1160,6 +1160,8 @@ void sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
|
|||
host->mmc->actual_clock = 0;
|
||||
|
||||
sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL);
|
||||
if (host->quirks2 & SDHCI_QUIRK2_NEED_DELAY_AFTER_INT_CLK_RST)
|
||||
mdelay(1);
|
||||
|
||||
if (clock == 0)
|
||||
return;
|
||||
|
|
|
@ -412,6 +412,11 @@ struct sdhci_host {
|
|||
#define SDHCI_QUIRK2_ACMD23_BROKEN (1<<14)
|
||||
/* Broken Clock divider zero in controller */
|
||||
#define SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN (1<<15)
|
||||
/*
|
||||
* When internal clock is disabled, a delay is needed before modifying the
|
||||
* SD clock frequency or enabling back the internal clock.
|
||||
*/
|
||||
#define SDHCI_QUIRK2_NEED_DELAY_AFTER_INT_CLK_RST (1<<16)
|
||||
|
||||
int irq; /* Device IRQ */
|
||||
void __iomem *ioaddr; /* Mapped address */
|
||||
|
|
|
@ -879,7 +879,7 @@ static void copy_spare(struct mtd_info *mtd, bool bfrom)
|
|||
oob_chunk_size);
|
||||
|
||||
/* the last chunk */
|
||||
memcpy16_toio(&s[oob_chunk_size * sparebuf_size],
|
||||
memcpy16_toio(&s[i * sparebuf_size],
|
||||
&d[i * oob_chunk_size],
|
||||
host->used_oobsize - i * oob_chunk_size);
|
||||
}
|
||||
|
|
|
@ -147,6 +147,10 @@
|
|||
#define NFC_ECC_MODE GENMASK(15, 12)
|
||||
#define NFC_RANDOM_SEED GENMASK(30, 16)
|
||||
|
||||
/* NFC_USER_DATA helper macros */
|
||||
#define NFC_BUF_TO_USER_DATA(buf) ((buf)[0] | ((buf)[1] << 8) | \
|
||||
((buf)[2] << 16) | ((buf)[3] << 24))
|
||||
|
||||
#define NFC_DEFAULT_TIMEOUT_MS 1000
|
||||
|
||||
#define NFC_SRAM_SIZE 1024
|
||||
|
@ -646,15 +650,9 @@ static int sunxi_nfc_hw_ecc_write_page(struct mtd_info *mtd,
|
|||
offset = layout->eccpos[i * ecc->bytes] - 4 + mtd->writesize;
|
||||
|
||||
/* Fill OOB data in */
|
||||
if (oob_required) {
|
||||
tmp = 0xffffffff;
|
||||
memcpy_toio(nfc->regs + NFC_REG_USER_DATA_BASE, &tmp,
|
||||
4);
|
||||
} else {
|
||||
memcpy_toio(nfc->regs + NFC_REG_USER_DATA_BASE,
|
||||
chip->oob_poi + offset - mtd->writesize,
|
||||
4);
|
||||
}
|
||||
writel(NFC_BUF_TO_USER_DATA(chip->oob_poi +
|
||||
layout->oobfree[i].offset),
|
||||
nfc->regs + NFC_REG_USER_DATA_BASE);
|
||||
|
||||
chip->cmdfunc(mtd, NAND_CMD_RNDIN, offset, -1);
|
||||
|
||||
|
@ -784,14 +782,8 @@ static int sunxi_nfc_hw_syndrome_ecc_write_page(struct mtd_info *mtd,
|
|||
offset += ecc->size;
|
||||
|
||||
/* Fill OOB data in */
|
||||
if (oob_required) {
|
||||
tmp = 0xffffffff;
|
||||
memcpy_toio(nfc->regs + NFC_REG_USER_DATA_BASE, &tmp,
|
||||
4);
|
||||
} else {
|
||||
memcpy_toio(nfc->regs + NFC_REG_USER_DATA_BASE, oob,
|
||||
4);
|
||||
}
|
||||
writel(NFC_BUF_TO_USER_DATA(oob),
|
||||
nfc->regs + NFC_REG_USER_DATA_BASE);
|
||||
|
||||
tmp = NFC_DATA_TRANS | NFC_DATA_SWAP_METHOD | NFC_ACCESS_DIR |
|
||||
(1 << 30);
|
||||
|
@ -1389,6 +1381,7 @@ static void sunxi_nand_chips_cleanup(struct sunxi_nfc *nfc)
|
|||
node);
|
||||
nand_release(&chip->mtd);
|
||||
sunxi_nand_ecc_cleanup(&chip->nand.ecc);
|
||||
list_del(&chip->node);
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
@ -67,7 +67,7 @@ static ssize_t bin_attr_nvmem_read(struct file *filp, struct kobject *kobj,
|
|||
int rc;
|
||||
|
||||
/* Stop the user from reading */
|
||||
if (pos > nvmem->size)
|
||||
if (pos >= nvmem->size)
|
||||
return 0;
|
||||
|
||||
if (pos + count > nvmem->size)
|
||||
|
@ -92,7 +92,7 @@ static ssize_t bin_attr_nvmem_write(struct file *filp, struct kobject *kobj,
|
|||
int rc;
|
||||
|
||||
/* Stop the user from writing */
|
||||
if (pos > nvmem->size)
|
||||
if (pos >= nvmem->size)
|
||||
return 0;
|
||||
|
||||
if (pos + count > nvmem->size)
|
||||
|
@ -825,7 +825,7 @@ static int __nvmem_cell_read(struct nvmem_device *nvmem,
|
|||
return rc;
|
||||
|
||||
/* shift bits in-place */
|
||||
if (cell->bit_offset || cell->bit_offset)
|
||||
if (cell->bit_offset || cell->nbits)
|
||||
nvmem_shift_read_buffer_in_place(cell, buf);
|
||||
|
||||
*len = cell->bytes;
|
||||
|
@ -938,7 +938,7 @@ int nvmem_cell_write(struct nvmem_cell *cell, void *buf, size_t len)
|
|||
rc = regmap_raw_write(nvmem->regmap, cell->offset, buf, cell->bytes);
|
||||
|
||||
/* free the tmp buffer */
|
||||
if (cell->bit_offset)
|
||||
if (cell->bit_offset || cell->nbits)
|
||||
kfree(buf);
|
||||
|
||||
if (IS_ERR_VALUE(rc))
|
||||
|
|
|
@ -103,7 +103,7 @@ static int sunxi_sid_probe(struct platform_device *pdev)
|
|||
struct nvmem_device *nvmem;
|
||||
struct regmap *regmap;
|
||||
struct sunxi_sid *sid;
|
||||
int i, size;
|
||||
int ret, i, size;
|
||||
char *randomness;
|
||||
|
||||
sid = devm_kzalloc(dev, sizeof(*sid), GFP_KERNEL);
|
||||
|
@ -131,6 +131,11 @@ static int sunxi_sid_probe(struct platform_device *pdev)
|
|||
return PTR_ERR(nvmem);
|
||||
|
||||
randomness = kzalloc(sizeof(u8) * size, GFP_KERNEL);
|
||||
if (!randomness) {
|
||||
ret = -EINVAL;
|
||||
goto err_unreg_nvmem;
|
||||
}
|
||||
|
||||
for (i = 0; i < size; i++)
|
||||
randomness[i] = sunxi_sid_read_byte(sid, i);
|
||||
|
||||
|
@ -140,6 +145,10 @@ static int sunxi_sid_probe(struct platform_device *pdev)
|
|||
platform_set_drvdata(pdev, nvmem);
|
||||
|
||||
return 0;
|
||||
|
||||
err_unreg_nvmem:
|
||||
nvmem_unregister(nvmem);
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int sunxi_sid_remove(struct platform_device *pdev)
|
||||
|
|
|
@ -276,6 +276,7 @@ static const struct of_device_id phy_berlin_sata_of_match[] = {
|
|||
{ .compatible = "marvell,berlin2q-sata-phy" },
|
||||
{ },
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, phy_berlin_sata_of_match);
|
||||
|
||||
static struct platform_driver phy_berlin_sata_driver = {
|
||||
.probe = phy_berlin_sata_probe,
|
||||
|
|
|
@ -432,6 +432,7 @@ out_disable_src:
|
|||
out:
|
||||
return ret;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(ufs_qcom_phy_enable_ref_clk);
|
||||
|
||||
static
|
||||
int ufs_qcom_phy_disable_vreg(struct phy *phy,
|
||||
|
@ -474,6 +475,7 @@ void ufs_qcom_phy_disable_ref_clk(struct phy *generic_phy)
|
|||
phy->is_ref_clk_enabled = false;
|
||||
}
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(ufs_qcom_phy_disable_ref_clk);
|
||||
|
||||
#define UFS_REF_CLK_EN (1 << 5)
|
||||
|
||||
|
@ -517,11 +519,13 @@ void ufs_qcom_phy_enable_dev_ref_clk(struct phy *generic_phy)
|
|||
{
|
||||
ufs_qcom_phy_dev_ref_clk_ctrl(generic_phy, true);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(ufs_qcom_phy_enable_dev_ref_clk);
|
||||
|
||||
void ufs_qcom_phy_disable_dev_ref_clk(struct phy *generic_phy)
|
||||
{
|
||||
ufs_qcom_phy_dev_ref_clk_ctrl(generic_phy, false);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(ufs_qcom_phy_disable_dev_ref_clk);
|
||||
|
||||
/* Turn ON M-PHY RMMI interface clocks */
|
||||
int ufs_qcom_phy_enable_iface_clk(struct phy *generic_phy)
|
||||
|
@ -550,6 +554,7 @@ int ufs_qcom_phy_enable_iface_clk(struct phy *generic_phy)
|
|||
out:
|
||||
return ret;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(ufs_qcom_phy_enable_iface_clk);
|
||||
|
||||
/* Turn OFF M-PHY RMMI interface clocks */
|
||||
void ufs_qcom_phy_disable_iface_clk(struct phy *generic_phy)
|
||||
|
@ -562,6 +567,7 @@ void ufs_qcom_phy_disable_iface_clk(struct phy *generic_phy)
|
|||
phy->is_iface_clk_enabled = false;
|
||||
}
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(ufs_qcom_phy_disable_iface_clk);
|
||||
|
||||
int ufs_qcom_phy_start_serdes(struct phy *generic_phy)
|
||||
{
|
||||
|
@ -578,6 +584,7 @@ int ufs_qcom_phy_start_serdes(struct phy *generic_phy)
|
|||
|
||||
return ret;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(ufs_qcom_phy_start_serdes);
|
||||
|
||||
int ufs_qcom_phy_set_tx_lane_enable(struct phy *generic_phy, u32 tx_lanes)
|
||||
{
|
||||
|
@ -595,6 +602,7 @@ int ufs_qcom_phy_set_tx_lane_enable(struct phy *generic_phy, u32 tx_lanes)
|
|||
|
||||
return ret;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(ufs_qcom_phy_set_tx_lane_enable);
|
||||
|
||||
void ufs_qcom_phy_save_controller_version(struct phy *generic_phy,
|
||||
u8 major, u16 minor, u16 step)
|
||||
|
@ -605,6 +613,7 @@ void ufs_qcom_phy_save_controller_version(struct phy *generic_phy,
|
|||
ufs_qcom_phy->host_ctrl_rev_minor = minor;
|
||||
ufs_qcom_phy->host_ctrl_rev_step = step;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(ufs_qcom_phy_save_controller_version);
|
||||
|
||||
int ufs_qcom_phy_calibrate_phy(struct phy *generic_phy, bool is_rate_B)
|
||||
{
|
||||
|
@ -625,6 +634,7 @@ int ufs_qcom_phy_calibrate_phy(struct phy *generic_phy, bool is_rate_B)
|
|||
|
||||
return ret;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(ufs_qcom_phy_calibrate_phy);
|
||||
|
||||
int ufs_qcom_phy_remove(struct phy *generic_phy,
|
||||
struct ufs_qcom_phy *ufs_qcom_phy)
|
||||
|
@ -662,6 +672,7 @@ int ufs_qcom_phy_is_pcs_ready(struct phy *generic_phy)
|
|||
return ufs_qcom_phy->phy_spec_ops->
|
||||
is_physical_coding_sublayer_ready(ufs_qcom_phy);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(ufs_qcom_phy_is_pcs_ready);
|
||||
|
||||
int ufs_qcom_phy_power_on(struct phy *generic_phy)
|
||||
{
|
||||
|
|
|
@ -98,6 +98,7 @@ static int rockchip_usb_phy_probe(struct platform_device *pdev)
|
|||
struct device_node *child;
|
||||
struct regmap *grf;
|
||||
unsigned int reg_offset;
|
||||
int err;
|
||||
|
||||
grf = syscon_regmap_lookup_by_phandle(dev->of_node, "rockchip,grf");
|
||||
if (IS_ERR(grf)) {
|
||||
|
@ -129,6 +130,11 @@ static int rockchip_usb_phy_probe(struct platform_device *pdev)
|
|||
return PTR_ERR(rk_phy->phy);
|
||||
}
|
||||
phy_set_drvdata(rk_phy->phy, rk_phy);
|
||||
|
||||
/* only power up usb phy when it use, so disable it when init*/
|
||||
err = rockchip_usb_phy_power(rk_phy, 1);
|
||||
if (err)
|
||||
return err;
|
||||
}
|
||||
|
||||
phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
|
||||
|
|
|
@ -192,9 +192,9 @@ static const struct regulator_desc axp22x_regulators[] = {
|
|||
AXP_DESC(AXP22X, DCDC3, "dcdc3", "vin3", 600, 1860, 20,
|
||||
AXP22X_DCDC3_V_OUT, 0x3f, AXP22X_PWR_OUT_CTRL1, BIT(3)),
|
||||
AXP_DESC(AXP22X, DCDC4, "dcdc4", "vin4", 600, 1540, 20,
|
||||
AXP22X_DCDC4_V_OUT, 0x3f, AXP22X_PWR_OUT_CTRL1, BIT(3)),
|
||||
AXP22X_DCDC4_V_OUT, 0x3f, AXP22X_PWR_OUT_CTRL1, BIT(4)),
|
||||
AXP_DESC(AXP22X, DCDC5, "dcdc5", "vin5", 1000, 2550, 50,
|
||||
AXP22X_DCDC5_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL1, BIT(4)),
|
||||
AXP22X_DCDC5_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL1, BIT(5)),
|
||||
/* secondary switchable output of DCDC1 */
|
||||
AXP_DESC_SW(AXP22X, DC1SW, "dc1sw", "dcdc1", 1600, 3400, 100,
|
||||
AXP22X_DCDC1_V_OUT, 0x1f, AXP22X_PWR_OUT_CTRL2, BIT(7)),
|
||||
|
|
|
@ -1403,6 +1403,10 @@ static int regulator_resolve_supply(struct regulator_dev *rdev)
|
|||
return 0;
|
||||
}
|
||||
|
||||
/* Did the lookup explicitly defer for us? */
|
||||
if (ret == -EPROBE_DEFER)
|
||||
return ret;
|
||||
|
||||
if (have_full_constraints()) {
|
||||
r = dummy_regulator_rdev;
|
||||
} else {
|
||||
|
|
|
@ -212,6 +212,17 @@ static const struct file_operations twa_fops = {
|
|||
.llseek = noop_llseek,
|
||||
};
|
||||
|
||||
/*
|
||||
* The controllers use an inline buffer instead of a mapped SGL for small,
|
||||
* single entry buffers. Note that we treat a zero-length transfer like
|
||||
* a mapped SGL.
|
||||
*/
|
||||
static bool twa_command_mapped(struct scsi_cmnd *cmd)
|
||||
{
|
||||
return scsi_sg_count(cmd) != 1 ||
|
||||
scsi_bufflen(cmd) >= TW_MIN_SGL_LENGTH;
|
||||
}
|
||||
|
||||
/* This function will complete an aen request from the isr */
|
||||
static int twa_aen_complete(TW_Device_Extension *tw_dev, int request_id)
|
||||
{
|
||||
|
@ -1339,7 +1350,8 @@ static irqreturn_t twa_interrupt(int irq, void *dev_instance)
|
|||
}
|
||||
|
||||
/* Now complete the io */
|
||||
scsi_dma_unmap(cmd);
|
||||
if (twa_command_mapped(cmd))
|
||||
scsi_dma_unmap(cmd);
|
||||
cmd->scsi_done(cmd);
|
||||
tw_dev->state[request_id] = TW_S_COMPLETED;
|
||||
twa_free_request_id(tw_dev, request_id);
|
||||
|
@ -1582,7 +1594,8 @@ static int twa_reset_device_extension(TW_Device_Extension *tw_dev)
|
|||
struct scsi_cmnd *cmd = tw_dev->srb[i];
|
||||
|
||||
cmd->result = (DID_RESET << 16);
|
||||
scsi_dma_unmap(cmd);
|
||||
if (twa_command_mapped(cmd))
|
||||
scsi_dma_unmap(cmd);
|
||||
cmd->scsi_done(cmd);
|
||||
}
|
||||
}
|
||||
|
@ -1765,12 +1778,14 @@ static int twa_scsi_queue_lck(struct scsi_cmnd *SCpnt, void (*done)(struct scsi_
|
|||
retval = twa_scsiop_execute_scsi(tw_dev, request_id, NULL, 0, NULL);
|
||||
switch (retval) {
|
||||
case SCSI_MLQUEUE_HOST_BUSY:
|
||||
scsi_dma_unmap(SCpnt);
|
||||
if (twa_command_mapped(SCpnt))
|
||||
scsi_dma_unmap(SCpnt);
|
||||
twa_free_request_id(tw_dev, request_id);
|
||||
break;
|
||||
case 1:
|
||||
SCpnt->result = (DID_ERROR << 16);
|
||||
scsi_dma_unmap(SCpnt);
|
||||
if (twa_command_mapped(SCpnt))
|
||||
scsi_dma_unmap(SCpnt);
|
||||
done(SCpnt);
|
||||
tw_dev->state[request_id] = TW_S_COMPLETED;
|
||||
twa_free_request_id(tw_dev, request_id);
|
||||
|
@ -1831,8 +1846,7 @@ static int twa_scsiop_execute_scsi(TW_Device_Extension *tw_dev, int request_id,
|
|||
/* Map sglist from scsi layer to cmd packet */
|
||||
|
||||
if (scsi_sg_count(srb)) {
|
||||
if ((scsi_sg_count(srb) == 1) &&
|
||||
(scsi_bufflen(srb) < TW_MIN_SGL_LENGTH)) {
|
||||
if (!twa_command_mapped(srb)) {
|
||||
if (srb->sc_data_direction == DMA_TO_DEVICE ||
|
||||
srb->sc_data_direction == DMA_BIDIRECTIONAL)
|
||||
scsi_sg_copy_to_buffer(srb,
|
||||
|
@ -1905,7 +1919,7 @@ static void twa_scsiop_execute_scsi_complete(TW_Device_Extension *tw_dev, int re
|
|||
{
|
||||
struct scsi_cmnd *cmd = tw_dev->srb[request_id];
|
||||
|
||||
if (scsi_bufflen(cmd) < TW_MIN_SGL_LENGTH &&
|
||||
if (!twa_command_mapped(cmd) &&
|
||||
(cmd->sc_data_direction == DMA_FROM_DEVICE ||
|
||||
cmd->sc_data_direction == DMA_BIDIRECTIONAL)) {
|
||||
if (scsi_sg_count(cmd) == 1) {
|
||||
|
|
|
@ -976,13 +976,13 @@ static void iscsi_tmf_rsp(struct iscsi_conn *conn, struct iscsi_hdr *hdr)
|
|||
wake_up(&conn->ehwait);
|
||||
}
|
||||
|
||||
static void iscsi_send_nopout(struct iscsi_conn *conn, struct iscsi_nopin *rhdr)
|
||||
static int iscsi_send_nopout(struct iscsi_conn *conn, struct iscsi_nopin *rhdr)
|
||||
{
|
||||
struct iscsi_nopout hdr;
|
||||
struct iscsi_task *task;
|
||||
|
||||
if (!rhdr && conn->ping_task)
|
||||
return;
|
||||
return -EINVAL;
|
||||
|
||||
memset(&hdr, 0, sizeof(struct iscsi_nopout));
|
||||
hdr.opcode = ISCSI_OP_NOOP_OUT | ISCSI_OP_IMMEDIATE;
|
||||
|
@ -996,13 +996,16 @@ static void iscsi_send_nopout(struct iscsi_conn *conn, struct iscsi_nopin *rhdr)
|
|||
hdr.ttt = RESERVED_ITT;
|
||||
|
||||
task = __iscsi_conn_send_pdu(conn, (struct iscsi_hdr *)&hdr, NULL, 0);
|
||||
if (!task)
|
||||
if (!task) {
|
||||
iscsi_conn_printk(KERN_ERR, conn, "Could not send nopout\n");
|
||||
else if (!rhdr) {
|
||||
return -EIO;
|
||||
} else if (!rhdr) {
|
||||
/* only track our nops */
|
||||
conn->ping_task = task;
|
||||
conn->last_ping = jiffies;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int iscsi_nop_out_rsp(struct iscsi_task *task,
|
||||
|
@ -2092,8 +2095,10 @@ static void iscsi_check_transport_timeouts(unsigned long data)
|
|||
if (time_before_eq(last_recv + recv_timeout, jiffies)) {
|
||||
/* send a ping to try to provoke some traffic */
|
||||
ISCSI_DBG_CONN(conn, "Sending nopout as ping\n");
|
||||
iscsi_send_nopout(conn, NULL);
|
||||
next_timeout = conn->last_ping + (conn->ping_timeout * HZ);
|
||||
if (iscsi_send_nopout(conn, NULL))
|
||||
next_timeout = jiffies + (1 * HZ);
|
||||
else
|
||||
next_timeout = conn->last_ping + (conn->ping_timeout * HZ);
|
||||
} else
|
||||
next_timeout = last_recv + recv_timeout;
|
||||
|
||||
|
|
|
@ -111,7 +111,7 @@ static struct scsi_device_handler *scsi_dh_lookup(const char *name)
|
|||
|
||||
dh = __scsi_dh_lookup(name);
|
||||
if (!dh) {
|
||||
request_module(name);
|
||||
request_module("scsi_dh_%s", name);
|
||||
dh = __scsi_dh_lookup(name);
|
||||
}
|
||||
|
||||
|
|
|
@ -992,11 +992,12 @@ static int davinci_spi_probe(struct platform_device *pdev)
|
|||
goto free_master;
|
||||
}
|
||||
|
||||
dspi->irq = platform_get_irq(pdev, 0);
|
||||
if (dspi->irq <= 0) {
|
||||
ret = platform_get_irq(pdev, 0);
|
||||
if (ret == 0)
|
||||
ret = -EINVAL;
|
||||
if (ret < 0)
|
||||
goto free_master;
|
||||
}
|
||||
dspi->irq = ret;
|
||||
|
||||
ret = devm_request_threaded_irq(&pdev->dev, dspi->irq, davinci_spi_irq,
|
||||
dummy_thread_fn, 0, dev_name(&pdev->dev), dspi);
|
||||
|
|
|
@ -81,6 +81,7 @@ void speakup_fake_down_arrow(void)
|
|||
__this_cpu_write(reporting_keystroke, true);
|
||||
input_report_key(virt_keyboard, KEY_DOWN, PRESSED);
|
||||
input_report_key(virt_keyboard, KEY_DOWN, RELEASED);
|
||||
input_sync(virt_keyboard);
|
||||
__this_cpu_write(reporting_keystroke, false);
|
||||
|
||||
/* reenable preemption */
|
||||
|
|
|
@ -343,8 +343,7 @@ static void n_tty_packet_mode_flush(struct tty_struct *tty)
|
|||
spin_lock_irqsave(&tty->ctrl_lock, flags);
|
||||
tty->ctrl_status |= TIOCPKT_FLUSHREAD;
|
||||
spin_unlock_irqrestore(&tty->ctrl_lock, flags);
|
||||
if (waitqueue_active(&tty->link->read_wait))
|
||||
wake_up_interruptible(&tty->link->read_wait);
|
||||
wake_up_interruptible(&tty->link->read_wait);
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -1382,8 +1381,7 @@ handle_newline:
|
|||
put_tty_queue(c, ldata);
|
||||
smp_store_release(&ldata->canon_head, ldata->read_head);
|
||||
kill_fasync(&tty->fasync, SIGIO, POLL_IN);
|
||||
if (waitqueue_active(&tty->read_wait))
|
||||
wake_up_interruptible_poll(&tty->read_wait, POLLIN);
|
||||
wake_up_interruptible_poll(&tty->read_wait, POLLIN);
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
|
@ -1667,8 +1665,7 @@ static void __receive_buf(struct tty_struct *tty, const unsigned char *cp,
|
|||
|
||||
if ((read_cnt(ldata) >= ldata->minimum_to_wake) || L_EXTPROC(tty)) {
|
||||
kill_fasync(&tty->fasync, SIGIO, POLL_IN);
|
||||
if (waitqueue_active(&tty->read_wait))
|
||||
wake_up_interruptible_poll(&tty->read_wait, POLLIN);
|
||||
wake_up_interruptible_poll(&tty->read_wait, POLLIN);
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -1887,10 +1884,8 @@ static void n_tty_set_termios(struct tty_struct *tty, struct ktermios *old)
|
|||
}
|
||||
|
||||
/* The termios change make the tty ready for I/O */
|
||||
if (waitqueue_active(&tty->write_wait))
|
||||
wake_up_interruptible(&tty->write_wait);
|
||||
if (waitqueue_active(&tty->read_wait))
|
||||
wake_up_interruptible(&tty->read_wait);
|
||||
wake_up_interruptible(&tty->write_wait);
|
||||
wake_up_interruptible(&tty->read_wait);
|
||||
}
|
||||
|
||||
/**
|
||||
|
|
|
@ -261,6 +261,14 @@ configured less than Maximum supported fifo bytes */
|
|||
UART_FCR7_64BYTE,
|
||||
.flags = UART_CAP_FIFO,
|
||||
},
|
||||
[PORT_RT2880] = {
|
||||
.name = "Palmchip BK-3103",
|
||||
.fifo_size = 16,
|
||||
.tx_loadsz = 16,
|
||||
.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
|
||||
.rxtrig_bytes = {1, 4, 8, 14},
|
||||
.flags = UART_CAP_FIFO,
|
||||
},
|
||||
};
|
||||
|
||||
/* Uart divisor latch read */
|
||||
|
|
|
@ -2786,7 +2786,7 @@ static int atmel_serial_probe(struct platform_device *pdev)
|
|||
ret = atmel_init_gpios(port, &pdev->dev);
|
||||
if (ret < 0) {
|
||||
dev_err(&pdev->dev, "Failed to initialize GPIOs.");
|
||||
goto err;
|
||||
goto err_clear_bit;
|
||||
}
|
||||
|
||||
ret = atmel_init_port(port, pdev);
|
||||
|
|
|
@ -1631,12 +1631,12 @@ imx_console_write(struct console *co, const char *s, unsigned int count)
|
|||
int locked = 1;
|
||||
int retval;
|
||||
|
||||
retval = clk_prepare_enable(sport->clk_per);
|
||||
retval = clk_enable(sport->clk_per);
|
||||
if (retval)
|
||||
return;
|
||||
retval = clk_prepare_enable(sport->clk_ipg);
|
||||
retval = clk_enable(sport->clk_ipg);
|
||||
if (retval) {
|
||||
clk_disable_unprepare(sport->clk_per);
|
||||
clk_disable(sport->clk_per);
|
||||
return;
|
||||
}
|
||||
|
||||
|
@ -1675,8 +1675,8 @@ imx_console_write(struct console *co, const char *s, unsigned int count)
|
|||
if (locked)
|
||||
spin_unlock_irqrestore(&sport->port.lock, flags);
|
||||
|
||||
clk_disable_unprepare(sport->clk_ipg);
|
||||
clk_disable_unprepare(sport->clk_per);
|
||||
clk_disable(sport->clk_ipg);
|
||||
clk_disable(sport->clk_per);
|
||||
}
|
||||
|
||||
/*
|
||||
|
@ -1777,7 +1777,15 @@ imx_console_setup(struct console *co, char *options)
|
|||
|
||||
retval = uart_set_options(&sport->port, co, baud, parity, bits, flow);
|
||||
|
||||
clk_disable_unprepare(sport->clk_ipg);
|
||||
clk_disable(sport->clk_ipg);
|
||||
if (retval) {
|
||||
clk_unprepare(sport->clk_ipg);
|
||||
goto error_console;
|
||||
}
|
||||
|
||||
retval = clk_prepare(sport->clk_per);
|
||||
if (retval)
|
||||
clk_disable_unprepare(sport->clk_ipg);
|
||||
|
||||
error_console:
|
||||
return retval;
|
||||
|
|
|
@ -242,7 +242,10 @@ void tty_buffer_flush(struct tty_struct *tty, struct tty_ldisc *ld)
|
|||
atomic_inc(&buf->priority);
|
||||
|
||||
mutex_lock(&buf->lock);
|
||||
while ((next = buf->head->next) != NULL) {
|
||||
/* paired w/ release in __tty_buffer_request_room; ensures there are
|
||||
* no pending memory accesses to the freed buffer
|
||||
*/
|
||||
while ((next = smp_load_acquire(&buf->head->next)) != NULL) {
|
||||
tty_buffer_free(port, buf->head);
|
||||
buf->head = next;
|
||||
}
|
||||
|
@ -290,7 +293,10 @@ static int __tty_buffer_request_room(struct tty_port *port, size_t size,
|
|||
if (n != NULL) {
|
||||
n->flags = flags;
|
||||
buf->tail = n;
|
||||
b->commit = b->used;
|
||||
/* paired w/ acquire in flush_to_ldisc(); ensures
|
||||
* flush_to_ldisc() sees buffer data.
|
||||
*/
|
||||
smp_store_release(&b->commit, b->used);
|
||||
/* paired w/ acquire in flush_to_ldisc(); ensures the
|
||||
* latest commit value can be read before the head is
|
||||
* advanced to the next buffer
|
||||
|
@ -393,7 +399,10 @@ void tty_schedule_flip(struct tty_port *port)
|
|||
{
|
||||
struct tty_bufhead *buf = &port->buf;
|
||||
|
||||
buf->tail->commit = buf->tail->used;
|
||||
/* paired w/ acquire in flush_to_ldisc(); ensures
|
||||
* flush_to_ldisc() sees buffer data.
|
||||
*/
|
||||
smp_store_release(&buf->tail->commit, buf->tail->used);
|
||||
schedule_work(&buf->work);
|
||||
}
|
||||
EXPORT_SYMBOL(tty_schedule_flip);
|
||||
|
@ -467,7 +476,7 @@ static void flush_to_ldisc(struct work_struct *work)
|
|||
struct tty_struct *tty;
|
||||
struct tty_ldisc *disc;
|
||||
|
||||
tty = port->itty;
|
||||
tty = READ_ONCE(port->itty);
|
||||
if (tty == NULL)
|
||||
return;
|
||||
|
||||
|
@ -491,7 +500,10 @@ static void flush_to_ldisc(struct work_struct *work)
|
|||
* is advancing to the next buffer
|
||||
*/
|
||||
next = smp_load_acquire(&head->next);
|
||||
count = head->commit - head->read;
|
||||
/* paired w/ release in __tty_buffer_request_room() or in
|
||||
* tty_buffer_flush(); ensures we see the committed buffer data
|
||||
*/
|
||||
count = smp_load_acquire(&head->commit) - head->read;
|
||||
if (!count) {
|
||||
if (next == NULL) {
|
||||
check_other_closed(tty);
|
||||
|
|
|
@ -2128,8 +2128,24 @@ retry_open:
|
|||
if (!noctty &&
|
||||
current->signal->leader &&
|
||||
!current->signal->tty &&
|
||||
tty->session == NULL)
|
||||
__proc_set_tty(tty);
|
||||
tty->session == NULL) {
|
||||
/*
|
||||
* Don't let a process that only has write access to the tty
|
||||
* obtain the privileges associated with having a tty as
|
||||
* controlling terminal (being able to reopen it with full
|
||||
* access through /dev/tty, being able to perform pushback).
|
||||
* Many distributions set the group of all ttys to "tty" and
|
||||
* grant write-only access to all terminals for setgid tty
|
||||
* binaries, which should not imply full privileges on all ttys.
|
||||
*
|
||||
* This could theoretically break old code that performs open()
|
||||
* on a write-only file descriptor. In that case, it might be
|
||||
* necessary to also permit this if
|
||||
* inode_permission(inode, MAY_READ) == 0.
|
||||
*/
|
||||
if (filp->f_mode & FMODE_READ)
|
||||
__proc_set_tty(tty);
|
||||
}
|
||||
spin_unlock_irq(¤t->sighand->siglock);
|
||||
read_unlock(&tasklist_lock);
|
||||
tty_unlock(tty);
|
||||
|
@ -2418,7 +2434,7 @@ static int fionbio(struct file *file, int __user *p)
|
|||
* Takes ->siglock() when updating signal->tty
|
||||
*/
|
||||
|
||||
static int tiocsctty(struct tty_struct *tty, int arg)
|
||||
static int tiocsctty(struct tty_struct *tty, struct file *file, int arg)
|
||||
{
|
||||
int ret = 0;
|
||||
|
||||
|
@ -2452,6 +2468,13 @@ static int tiocsctty(struct tty_struct *tty, int arg)
|
|||
goto unlock;
|
||||
}
|
||||
}
|
||||
|
||||
/* See the comment in tty_open(). */
|
||||
if ((file->f_mode & FMODE_READ) == 0 && !capable(CAP_SYS_ADMIN)) {
|
||||
ret = -EPERM;
|
||||
goto unlock;
|
||||
}
|
||||
|
||||
proc_set_tty(tty);
|
||||
unlock:
|
||||
read_unlock(&tasklist_lock);
|
||||
|
@ -2844,7 +2867,7 @@ long tty_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
|
|||
no_tty();
|
||||
return 0;
|
||||
case TIOCSCTTY:
|
||||
return tiocsctty(tty, arg);
|
||||
return tiocsctty(tty, file, arg);
|
||||
case TIOCGPGRP:
|
||||
return tiocgpgrp(tty, real_tty, p);
|
||||
case TIOCSPGRP:
|
||||
|
@ -3151,13 +3174,18 @@ struct class *tty_class;
|
|||
static int tty_cdev_add(struct tty_driver *driver, dev_t dev,
|
||||
unsigned int index, unsigned int count)
|
||||
{
|
||||
int err;
|
||||
|
||||
/* init here, since reused cdevs cause crashes */
|
||||
driver->cdevs[index] = cdev_alloc();
|
||||
if (!driver->cdevs[index])
|
||||
return -ENOMEM;
|
||||
cdev_init(driver->cdevs[index], &tty_fops);
|
||||
driver->cdevs[index]->ops = &tty_fops;
|
||||
driver->cdevs[index]->owner = driver->owner;
|
||||
return cdev_add(driver->cdevs[index], dev, count);
|
||||
err = cdev_add(driver->cdevs[index], dev, count);
|
||||
if (err)
|
||||
kobject_put(&driver->cdevs[index]->kobj);
|
||||
return err;
|
||||
}
|
||||
|
||||
/**
|
||||
|
|
|
@ -54,6 +54,13 @@ static const struct usb_device_id usb_quirk_list[] = {
|
|||
{ USB_DEVICE(0x046d, 0x082d), .driver_info = USB_QUIRK_DELAY_INIT },
|
||||
{ USB_DEVICE(0x046d, 0x0843), .driver_info = USB_QUIRK_DELAY_INIT },
|
||||
|
||||
/* Logitech ConferenceCam CC3000e */
|
||||
{ USB_DEVICE(0x046d, 0x0847), .driver_info = USB_QUIRK_DELAY_INIT },
|
||||
{ USB_DEVICE(0x046d, 0x0848), .driver_info = USB_QUIRK_DELAY_INIT },
|
||||
|
||||
/* Logitech PTZ Pro Camera */
|
||||
{ USB_DEVICE(0x046d, 0x0853), .driver_info = USB_QUIRK_DELAY_INIT },
|
||||
|
||||
/* Logitech Quickcam Fusion */
|
||||
{ USB_DEVICE(0x046d, 0x08c1), .driver_info = USB_QUIRK_RESET_RESUME },
|
||||
|
||||
|
@ -78,6 +85,12 @@ static const struct usb_device_id usb_quirk_list[] = {
|
|||
/* Philips PSC805 audio device */
|
||||
{ USB_DEVICE(0x0471, 0x0155), .driver_info = USB_QUIRK_RESET_RESUME },
|
||||
|
||||
/* Plantronic Audio 655 DSP */
|
||||
{ USB_DEVICE(0x047f, 0xc008), .driver_info = USB_QUIRK_RESET_RESUME },
|
||||
|
||||
/* Plantronic Audio 648 USB */
|
||||
{ USB_DEVICE(0x047f, 0xc013), .driver_info = USB_QUIRK_RESET_RESUME },
|
||||
|
||||
/* Artisman Watchdog Dongle */
|
||||
{ USB_DEVICE(0x04b4, 0x0526), .driver_info =
|
||||
USB_QUIRK_CONFIG_INTF_STRINGS },
|
||||
|
|
|
@ -159,8 +159,10 @@ static int ep_bd_list_alloc(struct bdc_ep *ep)
|
|||
bd_table->start_bd = dma_pool_alloc(bdc->bd_table_pool,
|
||||
GFP_ATOMIC,
|
||||
&dma);
|
||||
if (!bd_table->start_bd)
|
||||
if (!bd_table->start_bd) {
|
||||
kfree(bd_table);
|
||||
goto fail;
|
||||
}
|
||||
|
||||
bd_table->dma = dma;
|
||||
|
||||
|
|
|
@ -472,7 +472,7 @@ static int chaoskey_rng_read(struct hwrng *rng, void *data,
|
|||
if (this_time > max)
|
||||
this_time = max;
|
||||
|
||||
memcpy(data, dev->buf, this_time);
|
||||
memcpy(data, dev->buf + dev->used, this_time);
|
||||
|
||||
dev->used += this_time;
|
||||
|
||||
|
|
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