powerpc/sstep: Fix DS operand in ld encoding to appropriate value
ld instruction should have 14 bit immediate field (DS) concatenated
with 0b00 on the right, encode it accordingly. Introduce macro
`IMM_DS()` to encode DS form instructions with 14 bit immediate field.
Fixes: 4ceae137bd
("powerpc: emulate_step() tests for load/store instructions")
Reviewed-by: Sandipan Das <sandipan@linux.ibm.com>
Signed-off-by: Balamuruhan S <bala24@linux.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20200311102405.392263-1-bala24@linux.ibm.com
This commit is contained in:
Родитель
c5e76fa05b
Коммит
3e74a0e163
|
@ -13,19 +13,20 @@
|
|||
#include <asm/code-patching.h>
|
||||
|
||||
#define IMM_L(i) ((uintptr_t)(i) & 0xffff)
|
||||
#define IMM_DS(i) ((uintptr_t)(i) & 0xfffc)
|
||||
|
||||
/*
|
||||
* Defined with TEST_ prefix so it does not conflict with other
|
||||
* definitions.
|
||||
*/
|
||||
#define TEST_LD(r, base, i) (PPC_INST_LD | ___PPC_RT(r) | \
|
||||
___PPC_RA(base) | IMM_L(i))
|
||||
___PPC_RA(base) | IMM_DS(i))
|
||||
#define TEST_LWZ(r, base, i) (PPC_INST_LWZ | ___PPC_RT(r) | \
|
||||
___PPC_RA(base) | IMM_L(i))
|
||||
#define TEST_LWZX(t, a, b) (PPC_INST_LWZX | ___PPC_RT(t) | \
|
||||
___PPC_RA(a) | ___PPC_RB(b))
|
||||
#define TEST_STD(r, base, i) (PPC_INST_STD | ___PPC_RS(r) | \
|
||||
___PPC_RA(base) | ((i) & 0xfffc))
|
||||
___PPC_RA(base) | IMM_DS(i))
|
||||
#define TEST_LDARX(t, a, b, eh) (PPC_INST_LDARX | ___PPC_RT(t) | \
|
||||
___PPC_RA(a) | ___PPC_RB(b) | \
|
||||
__PPC_EH(eh))
|
||||
|
|
Загрузка…
Ссылка в новой задаче