spi: Fix SPI NOR and SPI NAND acronyms
The industry refers to these flash types as "SPI NOR" and "SPI NAND". Be consistent and use the same acronyms. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20200716051144.568606-1-tudor.ambarus@microchip.com Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -169,7 +169,7 @@ config SPI_BCM_QSPI
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help
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Enables support for the Broadcom SPI flash and MSPI controller.
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Select this option for any one of BRCMSTB, iProc NSP and NS2 SoCs
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based platforms. This driver works for both SPI master for spi-nor
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based platforms. This driver works for both SPI master for SPI NOR
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flash device as well as MSPI device.
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config SPI_BITBANG
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@ -311,11 +311,11 @@ config SPI_FSL_QUADSPI
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supports the high-level SPI memory interface.
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config SPI_HISI_SFC_V3XX
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tristate "HiSilicon SPI-NOR Flash Controller for Hi16XX chipsets"
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tristate "HiSilicon SPI NOR Flash Controller for Hi16XX chipsets"
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depends on (ARM64 && ACPI) || COMPILE_TEST
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depends on HAS_IOMEM
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help
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This enables support for HiSilicon v3xx SPI-NOR flash controller
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This enables support for HiSilicon v3xx SPI NOR flash controller
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found in hi16xx chipsets.
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config SPI_NXP_FLEXSPI
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@ -477,9 +477,9 @@ config SPI_MTK_NOR
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depends on ARCH_MEDIATEK || COMPILE_TEST
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help
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This enables support for SPI NOR controller found on MediaTek
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ARM SoCs. This is a controller specifically for SPI-NOR flash.
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ARM SoCs. This is a controller specifically for SPI NOR flash.
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It can perform generic SPI transfers up to 6 bytes via generic
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SPI interface as well as several SPI-NOR specific instructions
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SPI interface as well as several SPI NOR specific instructions
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via SPI MEM interface.
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config SPI_NPCM_FIU
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@ -15,7 +15,7 @@
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* Yogesh Gaur <yogeshnarayan.gaur@nxp.com>
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* Suresh Gupta <suresh.gupta@nxp.com>
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*
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* Based on the original fsl-quadspi.c spi-nor driver:
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* Based on the original fsl-quadspi.c SPI NOR driver:
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* Author: Freescale Semiconductor, Inc.
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*
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*/
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@ -708,7 +708,7 @@ static int orion_spi_probe(struct platform_device *pdev)
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/*
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* Only map one page for direct access. This is enough for the
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* simple TX transfer which only writes to the first word.
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* This needs to get extended for the direct SPI-NOR / SPI-NAND
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* This needs to get extended for the direct SPI NOR / SPI NAND
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* support, once this gets implemented.
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*/
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dir_acc = &spi->child[cs].direct_access;
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