sh: Split out tlb-flush in to _32 and _64 variants.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This commit is contained in:
Paul Mundt
Родитель
249cfea914
Коммит
3eeffb3204
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@ -12,7 +12,7 @@ obj-$(CONFIG_SH7705_CACHE_32KB) += cache-sh7705.o
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endif
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mmu-y := tlb-nommu.o pg-nommu.o
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mmu-$(CONFIG_MMU) := fault.o clear_page.o copy_page.o tlb-flush.o \
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mmu-$(CONFIG_MMU) := fault.o clear_page.o copy_page.o tlb-flush_32.o \
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ioremap_32.o
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obj-y += $(mmu-y)
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@ -5,7 +5,7 @@
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obj-y := init.o extable_64.o consistent.o
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mmu-y := tlb-nommu.o pg-nommu.o
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mmu-$(CONFIG_MMU) := ioremap_64.o
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mmu-$(CONFIG_MMU) := ioremap_64.o tlb-flush_64.o
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obj-y += $(mmu-y)
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@ -1,16 +1,14 @@
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/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* arch/sh64/mm/fault.c
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* arch/sh/mm/tlb-flush_64.c
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*
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* Copyright (C) 2000, 2001 Paolo Alberelli
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* Copyright (C) 2003 Richard Curnow (/proc/tlb, bug fixes)
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* Copyright (C) 2003 Paul Mundt
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#include <linux/signal.h>
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#include <linux/rwsem.h>
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#include <linux/sched.h>
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@ -23,39 +21,12 @@
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#include <linux/mm.h>
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#include <linux/smp.h>
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#include <linux/interrupt.h>
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#include <asm/system.h>
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#include <asm/io.h>
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#include <asm/tlb.h>
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#include <asm/uaccess.h>
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#include <asm/pgalloc.h>
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#include <asm/mmu_context.h>
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#include <asm/registers.h> /* required by inline asm statements */
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#if defined(CONFIG_SH64_PROC_TLB)
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#include <linux/init.h>
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#include <linux/proc_fs.h>
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/* Count numbers of tlb refills in each region */
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static unsigned long long calls_to_update_mmu_cache = 0ULL;
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static unsigned long long calls_to_flush_tlb_page = 0ULL;
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static unsigned long long calls_to_flush_tlb_range = 0ULL;
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static unsigned long long calls_to_flush_tlb_mm = 0ULL;
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static unsigned long long calls_to_flush_tlb_all = 0ULL;
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unsigned long long calls_to_do_slow_page_fault = 0ULL;
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unsigned long long calls_to_do_fast_page_fault = 0ULL;
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/* Count size of ranges for flush_tlb_range */
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static unsigned long long flush_tlb_range_1 = 0ULL;
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static unsigned long long flush_tlb_range_2 = 0ULL;
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static unsigned long long flush_tlb_range_3_4 = 0ULL;
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static unsigned long long flush_tlb_range_5_7 = 0ULL;
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static unsigned long long flush_tlb_range_8_11 = 0ULL;
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static unsigned long long flush_tlb_range_12_15 = 0ULL;
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static unsigned long long flush_tlb_range_16_up = 0ULL;
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static unsigned long long page_not_present = 0ULL;
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#endif
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extern void die(const char *,struct pt_regs *,long);
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@ -87,29 +58,27 @@ static inline void print_task(struct task_struct *tsk)
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static pte_t *lookup_pte(struct mm_struct *mm, unsigned long address)
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{
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pgd_t *dir;
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pud_t *pud;
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pmd_t *pmd;
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pte_t *pte;
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pte_t entry;
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dir = pgd_offset(mm, address);
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if (pgd_none(*dir)) {
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if (pgd_none(*dir))
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return NULL;
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}
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pmd = pmd_offset(dir, address);
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if (pmd_none(*pmd)) {
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pud = pud_offset(dir, address);
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if (pud_none(*pud))
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return NULL;
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pmd = pmd_offset(pud, address);
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if (pmd_none(*pmd))
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return NULL;
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}
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pte = pte_offset_kernel(pmd, address);
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entry = *pte;
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if (pte_none(entry)) {
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if (pte_none(entry) || !pte_present(entry))
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return NULL;
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}
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if (!pte_present(entry)) {
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return NULL;
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}
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return pte;
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}
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@ -129,10 +98,6 @@ asmlinkage void do_page_fault(struct pt_regs *regs, unsigned long writeaccess,
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pte_t *pte;
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int fault;
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#if defined(CONFIG_SH64_PROC_TLB)
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++calls_to_do_slow_page_fault;
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#endif
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/* SIM
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* Note this is now called with interrupts still disabled
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* This is to cope with being called for a missing IO port
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@ -355,16 +320,9 @@ do_sigbus:
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goto no_context;
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}
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void flush_tlb_all(void);
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void update_mmu_cache(struct vm_area_struct * vma,
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unsigned long address, pte_t pte)
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{
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#if defined(CONFIG_SH64_PROC_TLB)
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++calls_to_update_mmu_cache;
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#endif
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/*
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* This appears to get called once for every pte entry that gets
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* established => I don't think it's efficient to try refilling the
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@ -378,40 +336,29 @@ void update_mmu_cache(struct vm_area_struct * vma,
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*/
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}
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static void __flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
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void local_flush_tlb_one(unsigned long asid, unsigned long page)
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{
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unsigned long long match, pteh=0, lpage;
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unsigned long tlb;
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struct mm_struct *mm;
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mm = vma->vm_mm;
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if (mm->context == NO_CONTEXT)
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return;
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/*
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* Sign-extend based on neff.
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*/
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lpage = (page & NEFF_SIGN) ? (page | NEFF_MASK) : page;
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match = ((mm->context & MMU_CONTEXT_ASID_MASK) << PTEH_ASID_SHIFT) | PTEH_VALID;
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match = (asid << PTEH_ASID_SHIFT) | PTEH_VALID;
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match |= lpage;
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/* Do ITLB : don't bother for pages in non-exectutable VMAs */
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if (vma->vm_flags & VM_EXEC) {
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for_each_itlb_entry(tlb) {
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asm volatile ("getcfg %1, 0, %0"
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: "=r" (pteh)
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: "r" (tlb) );
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if (pteh == match) {
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__flush_tlb_slot(tlb);
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break;
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}
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for_each_itlb_entry(tlb) {
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asm volatile ("getcfg %1, 0, %0"
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: "=r" (pteh)
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: "r" (tlb) );
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if (pteh == match) {
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__flush_tlb_slot(tlb);
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break;
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}
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}
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/* Do DTLB : any page could potentially be in here. */
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for_each_dtlb_entry(tlb) {
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asm volatile ("getcfg %1, 0, %0"
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: "=r" (pteh)
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@ -425,52 +372,29 @@ static void __flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
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}
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}
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void flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
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void local_flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
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{
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unsigned long flags;
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#if defined(CONFIG_SH64_PROC_TLB)
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++calls_to_flush_tlb_page;
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#endif
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if (vma->vm_mm) {
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page &= PAGE_MASK;
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local_irq_save(flags);
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__flush_tlb_page(vma, page);
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local_flush_tlb_one(get_asid(), page);
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local_irq_restore(flags);
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}
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}
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void flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
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unsigned long end)
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void local_flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
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unsigned long end)
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{
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unsigned long flags;
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unsigned long long match, pteh=0, pteh_epn, pteh_low;
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unsigned long tlb;
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unsigned int cpu = smp_processor_id();
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struct mm_struct *mm;
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mm = vma->vm_mm;
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#if defined(CONFIG_SH64_PROC_TLB)
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++calls_to_flush_tlb_range;
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{
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unsigned long size = (end - 1) - start;
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size >>= 12; /* divide by PAGE_SIZE */
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size++; /* end=start+4096 => 1 page */
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switch (size) {
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case 1 : flush_tlb_range_1++; break;
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case 2 : flush_tlb_range_2++; break;
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case 3 ... 4 : flush_tlb_range_3_4++; break;
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case 5 ... 7 : flush_tlb_range_5_7++; break;
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case 8 ... 11 : flush_tlb_range_8_11++; break;
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case 12 ... 15 : flush_tlb_range_12_15++; break;
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default : flush_tlb_range_16_up++; break;
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}
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}
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#endif
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if (mm->context == NO_CONTEXT)
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if (cpu_context(cpu, mm) == NO_CONTEXT)
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return;
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local_irq_save(flags);
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@ -478,7 +402,7 @@ void flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
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start &= PAGE_MASK;
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end &= PAGE_MASK;
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match = ((mm->context & MMU_CONTEXT_ASID_MASK) << PTEH_ASID_SHIFT) | PTEH_VALID;
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match = (cpu_asid(cpu, mm) << PTEH_ASID_SHIFT) | PTEH_VALID;
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/* Flush ITLB */
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for_each_itlb_entry(tlb) {
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@ -509,94 +433,43 @@ void flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
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local_irq_restore(flags);
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}
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void flush_tlb_mm(struct mm_struct *mm)
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void local_flush_tlb_mm(struct mm_struct *mm)
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{
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unsigned long flags;
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unsigned int cpu = smp_processor_id();
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#if defined(CONFIG_SH64_PROC_TLB)
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++calls_to_flush_tlb_mm;
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#endif
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if (mm->context == NO_CONTEXT)
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if (cpu_context(cpu, mm) == NO_CONTEXT)
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return;
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local_irq_save(flags);
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mm->context=NO_CONTEXT;
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if(mm==current->mm)
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activate_context(mm);
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cpu_context(cpu, mm) = NO_CONTEXT;
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if (mm == current->mm)
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activate_context(mm, cpu);
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local_irq_restore(flags);
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}
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void flush_tlb_all(void)
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void local_flush_tlb_all(void)
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{
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/* Invalidate all, including shared pages, excluding fixed TLBs */
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unsigned long flags, tlb;
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#if defined(CONFIG_SH64_PROC_TLB)
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++calls_to_flush_tlb_all;
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#endif
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local_irq_save(flags);
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/* Flush each ITLB entry */
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for_each_itlb_entry(tlb) {
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for_each_itlb_entry(tlb)
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__flush_tlb_slot(tlb);
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}
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/* Flush each DTLB entry */
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for_each_dtlb_entry(tlb) {
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for_each_dtlb_entry(tlb)
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__flush_tlb_slot(tlb);
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}
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local_irq_restore(flags);
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}
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void flush_tlb_kernel_range(unsigned long start, unsigned long end)
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void local_flush_tlb_kernel_range(unsigned long start, unsigned long end)
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{
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/* FIXME: Optimize this later.. */
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flush_tlb_all();
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}
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#if defined(CONFIG_SH64_PROC_TLB)
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/* Procfs interface to read the performance information */
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static int
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tlb_proc_info(char *buf, char **start, off_t fpos, int length, int *eof, void *data)
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{
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int len=0;
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len += sprintf(buf+len, "do_fast_page_fault called %12lld times\n", calls_to_do_fast_page_fault);
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len += sprintf(buf+len, "do_slow_page_fault called %12lld times\n", calls_to_do_slow_page_fault);
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len += sprintf(buf+len, "update_mmu_cache called %12lld times\n", calls_to_update_mmu_cache);
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len += sprintf(buf+len, "flush_tlb_page called %12lld times\n", calls_to_flush_tlb_page);
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len += sprintf(buf+len, "flush_tlb_range called %12lld times\n", calls_to_flush_tlb_range);
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len += sprintf(buf+len, "flush_tlb_mm called %12lld times\n", calls_to_flush_tlb_mm);
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len += sprintf(buf+len, "flush_tlb_all called %12lld times\n", calls_to_flush_tlb_all);
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len += sprintf(buf+len, "flush_tlb_range_sizes\n"
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" 1 : %12lld\n"
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" 2 : %12lld\n"
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" 3 - 4 : %12lld\n"
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" 5 - 7 : %12lld\n"
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" 8 - 11 : %12lld\n"
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"12 - 15 : %12lld\n"
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"16+ : %12lld\n",
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flush_tlb_range_1, flush_tlb_range_2, flush_tlb_range_3_4,
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flush_tlb_range_5_7, flush_tlb_range_8_11, flush_tlb_range_12_15,
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flush_tlb_range_16_up);
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len += sprintf(buf+len, "page not present %12lld times\n", page_not_present);
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*eof = 1;
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return len;
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}
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static int __init register_proc_tlb(void)
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{
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create_proc_read_entry("tlb", 0, NULL, tlb_proc_info, NULL);
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return 0;
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}
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__initcall(register_proc_tlb);
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#endif
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