amd64_edac: Correct erratum 505 range
Basically we want to cover all 0x0-0xf models, i.e. Orochi and later. Cc: Aravind Gopalakrishnan <Aravind.Gopalakrishnan@amd.com> Link: http://lkml.kernel.org/r/20130819192321.GF4165@pd.tnic Signed-off-by: Borislav Petkov <bp@suse.de>
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@ -206,8 +206,8 @@ static int amd64_set_scrub_rate(struct mem_ctl_info *mci, u32 bw)
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if (pvt->fam == 0xf)
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min_scrubrate = 0x0;
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/* Erratum #505 for F15h Model 0x00 - Model 0x01, Stepping 0 */
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if (pvt->fam == 0x15 && pvt->model <= 0x01 && pvt->stepping < 0x1)
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/* Erratum #505 */
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if (pvt->fam == 0x15 && pvt->model < 0x10)
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f15h_select_dct(pvt, 0);
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return __amd64_set_scrub_rate(pvt->F3, bw, min_scrubrate);
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@ -219,8 +219,8 @@ static int amd64_get_scrub_rate(struct mem_ctl_info *mci)
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u32 scrubval = 0;
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int i, retval = -EINVAL;
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/* Erratum #505 for F15h Model 0x00 - Model 0x01, Stepping 0 */
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if (pvt->fam == 0x15 && pvt->model <= 0x01 && pvt->stepping < 0x1)
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/* Erratum #505 */
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if (pvt->fam == 0x15 && pvt->model < 0x10)
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f15h_select_dct(pvt, 0);
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amd64_read_pci_cfg(pvt->F3, SCRCTRL, &scrubval);
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