[MIPS] PB1100: Fix pile of warnings
CC arch/mips/au1000/pb1100/board_setup.o arch/mips/au1000/pb1100/board_setup.c: In function ‘board_setup’: arch/mips/au1000/pb1100/board_setup.c:104: warning: passing argument 1 of ‘readb’ makes pointer from integer without a cast arch/mips/au1000/pb1100/board_setup.c:105: warning: passing argument 1 of ‘readb’ makes pointer from integer without a cast arch/mips/au1000/pb1100/board_setup.c:105: warning: passing argument 2 of ‘writeb’ makes pointer from integer without a cast arch/mips/au1000/pb1100/board_setup.c:109: warning: passing argument 1 of ‘readb’ makes pointer from integer without a cast arch/mips/au1000/pb1100/board_setup.c:110: warning: passing argument 1 of ‘readb’ makes pointer from integer without a cast arch/mips/au1000/pb1100/board_setup.c:110: warning: passing argument 2 of ‘writeb’ makes pointer from integer without a cast arch/mips/au1000/pb1100/board_setup.c:51: warning: unused variable ‘sys_clksrc’ arch/mips/au1000/pb1100/board_setup.c:51: warning: unused variable ‘sys_freqctrl’ arch/mips/au1000/pb1100/board_setup.c:50: warning: unused variable ‘pin_func’ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -47,8 +47,7 @@ void board_reset (void)
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void __init board_setup(void)
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{
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u32 pin_func;
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u32 sys_freqctrl, sys_clksrc;
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volatile void __iomem * base = (volatile void __iomem *) 0xac000000UL;
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// set AUX clock to 12MHz * 8 = 96 MHz
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au_writel(8, SYS_AUXPLL);
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@ -56,58 +55,62 @@ void __init board_setup(void)
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udelay(100);
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#ifdef CONFIG_USB_OHCI
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// configure pins GPIO[14:9] as GPIO
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pin_func = au_readl(SYS_PINFUNC) & (u32)(~0x80);
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{
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u32 pin_func, sys_freqctrl, sys_clksrc;
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/* zero and disable FREQ2 */
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sys_freqctrl = au_readl(SYS_FREQCTRL0);
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sys_freqctrl &= ~0xFFF00000;
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au_writel(sys_freqctrl, SYS_FREQCTRL0);
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// configure pins GPIO[14:9] as GPIO
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pin_func = au_readl(SYS_PINFUNC) & (u32)(~0x80);
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/* zero and disable USBH/USBD/IrDA clock */
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sys_clksrc = au_readl(SYS_CLKSRC);
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sys_clksrc &= ~0x0000001F;
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au_writel(sys_clksrc, SYS_CLKSRC);
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/* zero and disable FREQ2 */
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sys_freqctrl = au_readl(SYS_FREQCTRL0);
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sys_freqctrl &= ~0xFFF00000;
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au_writel(sys_freqctrl, SYS_FREQCTRL0);
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sys_freqctrl = au_readl(SYS_FREQCTRL0);
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sys_freqctrl &= ~0xFFF00000;
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/* zero and disable USBH/USBD/IrDA clock */
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sys_clksrc = au_readl(SYS_CLKSRC);
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sys_clksrc &= ~0x0000001F;
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au_writel(sys_clksrc, SYS_CLKSRC);
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sys_clksrc = au_readl(SYS_CLKSRC);
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sys_clksrc &= ~0x0000001F;
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sys_freqctrl = au_readl(SYS_FREQCTRL0);
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sys_freqctrl &= ~0xFFF00000;
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// FREQ2 = aux/2 = 48 MHz
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sys_freqctrl |= ((0<<22) | (1<<21) | (1<<20));
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au_writel(sys_freqctrl, SYS_FREQCTRL0);
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sys_clksrc = au_readl(SYS_CLKSRC);
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sys_clksrc &= ~0x0000001F;
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/*
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* Route 48MHz FREQ2 into USBH/USBD/IrDA
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*/
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sys_clksrc |= ((4<<2) | (0<<1) | 0 );
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au_writel(sys_clksrc, SYS_CLKSRC);
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// FREQ2 = aux/2 = 48 MHz
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sys_freqctrl |= ((0<<22) | (1<<21) | (1<<20));
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au_writel(sys_freqctrl, SYS_FREQCTRL0);
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/* setup the static bus controller */
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au_writel(0x00000002, MEM_STCFG3); /* type = PCMCIA */
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au_writel(0x280E3D07, MEM_STTIME3); /* 250ns cycle time */
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au_writel(0x10000000, MEM_STADDR3); /* any PCMCIA select */
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/*
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* Route 48MHz FREQ2 into USBH/USBD/IrDA
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*/
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sys_clksrc |= ((4<<2) | (0<<1) | 0 );
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au_writel(sys_clksrc, SYS_CLKSRC);
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// get USB Functionality pin state (device vs host drive pins)
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pin_func = au_readl(SYS_PINFUNC) & (u32)(~0x8000);
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// 2nd USB port is USB host
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pin_func |= 0x8000;
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au_writel(pin_func, SYS_PINFUNC);
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/* setup the static bus controller */
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au_writel(0x00000002, MEM_STCFG3); /* type = PCMCIA */
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au_writel(0x280E3D07, MEM_STTIME3); /* 250ns cycle time */
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au_writel(0x10000000, MEM_STADDR3); /* any PCMCIA select */
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// get USB Functionality pin state (device vs host drive pins)
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pin_func = au_readl(SYS_PINFUNC) & (u32)(~0x8000);
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// 2nd USB port is USB host
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pin_func |= 0x8000;
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au_writel(pin_func, SYS_PINFUNC);
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}
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#endif // defined (CONFIG_USB_OHCI)
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/* Enable sys bus clock divider when IDLE state or no bus activity. */
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au_writel(au_readl(SYS_POWERCTRL) | (0x3 << 5), SYS_POWERCTRL);
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// Enable the RTC if not already enabled
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if (!(readb(0xac000028) & 0x20)) {
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writeb(readb(0xac000028) | 0x20, 0xac000028);
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if (!(readb(base + 0x28) & 0x20)) {
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writeb(readb(base + 0x28) | 0x20, base + 0x28);
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au_sync();
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}
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// Put the clock in BCD mode
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if (readb(0xac00002C) & 0x4) { /* reg B */
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writeb(readb(0xac00002c) & ~0x4, 0xac00002c);
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if (readb(base + 0x2C) & 0x4) { /* reg B */
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writeb(readb(base + 0x2c) & ~0x4, base + 0x2c);
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au_sync();
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}
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}
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