PCI/MSI: Decouple MSI[-X] disable from pcim_release()
The MSI core will introduce runtime allocation of MSI related data. This data will be devres managed and has to be set up before enabling PCI/MSI[-X]. This would introduce an ordering issue vs. pcim_release(). The setup order is: pcim_enable_device() devres_alloc(pcim_release...); ... pci_irq_alloc() msi_setup_device_data() devres_alloc(msi_device_data_release, ...) and once the device is released these release functions are invoked in the opposite order: msi_device_data_release() ... pcim_release() pci_disable_msi[x]() which is obviously wrong, because pci_disable_msi[x]() requires the MSI data to be available to tear down the MSI[-X] interrupts. Remove the MSI[-X] teardown from pcim_release() and add an explicit action to be installed on the attempt of enabling PCI/MSI[-X]. This allows the MSI core data allocation to be ordered correctly in a subsequent step. Reported-by: Nishanth Menon <nm@ti.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Tested-by: Michael Kelley <mikelley@microsoft.com> Tested-by: Nishanth Menon <nm@ti.com> Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Link: https://lore.kernel.org/r/87tuf9rdoj.ffs@tglx
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@ -341,6 +341,31 @@ void pci_restore_msi_state(struct pci_dev *dev)
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}
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EXPORT_SYMBOL_GPL(pci_restore_msi_state);
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static void pcim_msi_release(void *pcidev)
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{
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struct pci_dev *dev = pcidev;
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dev->is_msi_managed = false;
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pci_free_irq_vectors(dev);
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}
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/*
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* Needs to be separate from pcim_release to prevent an ordering problem
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* vs. msi_device_data_release() in the MSI core code.
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*/
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static int pcim_setup_msi_release(struct pci_dev *dev)
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{
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int ret;
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if (!pci_is_managed(dev) || dev->is_msi_managed)
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return 0;
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ret = devm_add_action(&dev->dev, pcim_msi_release, dev);
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if (!ret)
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dev->is_msi_managed = true;
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return ret;
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}
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static struct msi_desc *
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msi_setup_entry(struct pci_dev *dev, int nvec, struct irq_affinity *affd)
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{
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@ -884,6 +909,10 @@ static int __pci_enable_msi_range(struct pci_dev *dev, int minvec, int maxvec,
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if (nvec > maxvec)
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nvec = maxvec;
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rc = pcim_setup_msi_release(dev);
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if (rc)
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return rc;
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for (;;) {
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if (affd) {
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nvec = irq_calc_affinity_vectors(minvec, nvec, affd);
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@ -927,6 +956,10 @@ static int __pci_enable_msix_range(struct pci_dev *dev,
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if (WARN_ON_ONCE(dev->msix_enabled))
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return -EINVAL;
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rc = pcim_setup_msi_release(dev);
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if (rc)
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return rc;
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for (;;) {
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if (affd) {
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nvec = irq_calc_affinity_vectors(minvec, nvec, affd);
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@ -2024,11 +2024,6 @@ static void pcim_release(struct device *gendev, void *res)
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struct pci_devres *this = res;
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int i;
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if (dev->msi_enabled)
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pci_disable_msi(dev);
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if (dev->msix_enabled)
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pci_disable_msix(dev);
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for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
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if (this->region_mask & (1 << i))
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pci_release_region(dev, i);
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@ -425,7 +425,8 @@ struct pci_dev {
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unsigned int ats_enabled:1; /* Address Translation Svc */
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unsigned int pasid_enabled:1; /* Process Address Space ID */
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unsigned int pri_enabled:1; /* Page Request Interface */
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unsigned int is_managed:1;
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unsigned int is_managed:1; /* Managed via devres */
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unsigned int is_msi_managed:1; /* MSI release via devres installed */
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unsigned int needs_freset:1; /* Requires fundamental reset */
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unsigned int state_saved:1;
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unsigned int is_physfn:1;
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