MIPS: unaligned: Add DSP lwx & lhx missaligned access support
Add handling of missaligned access for DSP load instructions lwx & lhx. Since DSP instructions share SPECIAL3 opcode with other non-DSP instructions, necessary logic was inserted for distinguishing between instructions with SPECIAL3 opcode. For that purpose, the instruction format for DSP instructions is added to arch/mips/include/uapi/asm/inst.h. Signed-off-by: Miodrag Dinic <miodrag.dinic@imgtec.com> Signed-off-by: Aleksandar Markovic <aleksandar.markovic@imgtech.com> Cc: James.Hogan@imgtec.com Cc: Paul.Burton@imgtec.com Cc: Raghu.Gandham@imgtec.com Cc: Leonid.Yegoshin@imgtec.com Cc: Douglas.Leung@imgtec.com Cc: Petar.Jovanovic@imgtec.com Cc: Goran.Ferenc@imgtec.com Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/16511/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -762,6 +762,16 @@ struct msa_mi10_format { /* MSA MI10 */
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;))))))
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};
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struct dsp_format { /* SPEC3 DSP format instructions */
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__BITFIELD_FIELD(unsigned int opcode : 6,
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__BITFIELD_FIELD(unsigned int base : 5,
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__BITFIELD_FIELD(unsigned int index : 5,
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__BITFIELD_FIELD(unsigned int rd : 5,
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__BITFIELD_FIELD(unsigned int op : 5,
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__BITFIELD_FIELD(unsigned int func : 6,
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;))))))
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};
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struct spec3_format { /* SPEC3 */
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__BITFIELD_FIELD(unsigned int opcode:6,
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__BITFIELD_FIELD(unsigned int rs:5,
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@ -1053,6 +1063,7 @@ union mips_instruction {
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struct b_format b_format;
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struct ps_format ps_format;
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struct v_format v_format;
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struct dsp_format dsp_format;
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struct spec3_format spec3_format;
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struct fb_format fb_format;
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struct fp0_format fp0_format;
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@ -939,12 +939,37 @@ static void emulate_load_store_insn(struct pt_regs *regs,
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* The remaining opcodes are the ones that are really of
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* interest.
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*/
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#ifdef CONFIG_EVA
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case spec3_op:
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if (insn.dsp_format.func == lx_op) {
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switch (insn.dsp_format.op) {
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case lwx_op:
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if (!access_ok(VERIFY_READ, addr, 4))
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goto sigbus;
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LoadW(addr, value, res);
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if (res)
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goto fault;
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compute_return_epc(regs);
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regs->regs[insn.dsp_format.rd] = value;
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break;
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case lhx_op:
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if (!access_ok(VERIFY_READ, addr, 2))
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goto sigbus;
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LoadHW(addr, value, res);
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if (res)
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goto fault;
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compute_return_epc(regs);
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regs->regs[insn.dsp_format.rd] = value;
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break;
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default:
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goto sigill;
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}
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}
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#ifdef CONFIG_EVA
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else {
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/*
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* we can land here only from kernel accessing user memory,
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* so we need to "switch" the address limit to user space, so
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* address check can work properly.
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* we can land here only from kernel accessing user
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* memory, so we need to "switch" the address limit to
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* user space, so that address check can work properly.
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*/
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seg = get_fs();
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set_fs(USER_DS);
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@ -1019,8 +1044,9 @@ static void emulate_load_store_insn(struct pt_regs *regs,
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goto sigill;
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}
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set_fs(seg);
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break;
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}
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#endif
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break;
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case lh_op:
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if (!access_ok(VERIFY_READ, addr, 2))
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goto sigbus;
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