[ARM] Orion: add support for QNAP TS-109/TS-209
This patch adds support for the Orion/MV88F5182 based QNAP TS-109/TS-209 NAS device. The driver for the S-35390A RTC chip on this board has been submitted to LKML separately. Signed-off-by: Byron Bradley <byron.bbradley@gmail.com> Tested-by: Oyvind Repvik <repvik@kynisk.com> Tested-by: Tim Ellis <timtimred@foonas.org> Tested-by: Herbert Valerio Riedel <hvr@gnu.org> Acked-by: Tzachi Perelstein <tzachi@marvell.com>
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@ -147,6 +147,7 @@ CONFIG_MACH_DB88F5281=y
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CONFIG_MACH_RD88F5182=y
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CONFIG_MACH_KUROBOX_PRO=y
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CONFIG_MACH_DNS323=y
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CONFIG_MACH_TS209=y
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#
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# Boot options
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@ -30,6 +30,12 @@ config MACH_DNS323
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Say 'Y' here if you want your kernel to support the
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D-Link DNS-323 platform.
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config MACH_TS209
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bool "QNAP TS-109/TS-209"
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help
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Say 'Y' here if you want your kernel to support the
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QNAP TS-109/TS-209 platform.
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endmenu
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endif
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@ -3,3 +3,4 @@ obj-$(CONFIG_MACH_DB88F5281) += db88f5281-setup.o
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obj-$(CONFIG_MACH_RD88F5182) += rd88f5182-setup.o
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obj-$(CONFIG_MACH_KUROBOX_PRO) += kurobox_pro-setup.o
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obj-$(CONFIG_MACH_DNS323) += dns323-setup.o
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obj-$(CONFIG_MACH_TS209) += ts209-setup.o
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@ -0,0 +1,305 @@
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/*
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* QNAP TS-109/TS-209 Board Setup
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*
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* Maintainer: Byron Bradley <byron.bbradley@gmail.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/pci.h>
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#include <linux/irq.h>
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#include <linux/mtd/physmap.h>
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#include <linux/mtd/nand.h>
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#include <linux/mv643xx_eth.h>
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#include <linux/gpio_keys.h>
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#include <linux/input.h>
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#include <linux/i2c.h>
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#include <asm/mach-types.h>
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#include <asm/gpio.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/pci.h>
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#include <asm/arch/orion.h>
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#include <asm/arch/platform.h>
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#include "common.h"
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#define QNAP_TS209_NOR_BOOT_BASE 0xf4000000
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#define QNAP_TS209_NOR_BOOT_SIZE SZ_8M
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/****************************************************************************
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* 8MiB NOR flash. The struct mtd_partition is not in the same order as the
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* partitions on the device because we want to keep compatability with
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* existing QNAP firmware.
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*
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* Layout as used by QNAP:
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* [2] 0x00000000-0x00200000 : "Kernel"
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* [3] 0x00200000-0x00600000 : "RootFS1"
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* [4] 0x00600000-0x00700000 : "RootFS2"
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* [6] 0x00700000-0x00760000 : "NAS Config" (read-only)
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* [5] 0x00760000-0x00780000 : "U-Boot Config"
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* [1] 0x00780000-0x00800000 : "U-Boot" (read-only)
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***************************************************************************/
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static struct mtd_partition qnap_ts209_partitions[] = {
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{
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.name = "U-Boot",
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.size = 0x00080000,
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.offset = 0x00780000,
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.mask_flags = MTD_WRITEABLE,
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}, {
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.name = "Kernel",
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.size = 0x00200000,
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.offset = 0,
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}, {
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.name = "RootFS1",
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.size = 0x00400000,
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.offset = 0x00200000,
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}, {
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.name = "RootFS2",
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.size = 0x00100000,
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.offset = 0x00600000,
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}, {
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.name = "U-Boot Config",
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.size = 0x00020000,
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.offset = 0x00760000,
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}, {
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.name = "NAS Config",
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.size = 0x00060000,
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.offset = 0x00700000,
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.mask_flags = MTD_WRITEABLE,
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}
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};
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static struct physmap_flash_data qnap_ts209_nor_flash_data = {
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.width = 1,
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.parts = qnap_ts209_partitions,
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.nr_parts = ARRAY_SIZE(qnap_ts209_partitions)
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};
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static struct resource qnap_ts209_nor_flash_resource = {
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.flags = IORESOURCE_MEM,
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.start = QNAP_TS209_NOR_BOOT_BASE,
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.end = QNAP_TS209_NOR_BOOT_BASE + QNAP_TS209_NOR_BOOT_SIZE - 1,
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};
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static struct platform_device qnap_ts209_nor_flash = {
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.name = "physmap-flash",
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.id = 0,
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.dev = { .platform_data = &qnap_ts209_nor_flash_data, },
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.resource = &qnap_ts209_nor_flash_resource,
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.num_resources = 1,
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};
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/*****************************************************************************
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* PCI
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****************************************************************************/
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#define QNAP_TS209_PCI_SLOT0_OFFS 7
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#define QNAP_TS209_PCI_SLOT0_IRQ_PIN 6
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#define QNAP_TS209_PCI_SLOT1_IRQ_PIN 7
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void __init qnap_ts209_pci_preinit(void)
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{
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int pin;
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/*
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* Configure PCI GPIO IRQ pins
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*/
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pin = QNAP_TS209_PCI_SLOT0_IRQ_PIN;
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if (gpio_request(pin, "PCI Int1") == 0) {
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if (gpio_direction_input(pin) == 0) {
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set_irq_type(gpio_to_irq(pin), IRQT_LOW);
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} else {
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printk(KERN_ERR "qnap_ts209_pci_preinit failed to "
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"set_irq_type pin %d\n", pin);
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gpio_free(pin);
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}
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} else {
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printk(KERN_ERR "qnap_ts209_pci_preinit failed to gpio_request "
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"%d\n", pin);
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}
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pin = QNAP_TS209_PCI_SLOT1_IRQ_PIN;
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if (gpio_request(pin, "PCI Int2") == 0) {
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if (gpio_direction_input(pin) == 0) {
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set_irq_type(gpio_to_irq(pin), IRQT_LOW);
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} else {
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printk(KERN_ERR "qnap_ts209_pci_preinit failed "
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"to set_irq_type pin %d\n", pin);
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gpio_free(pin);
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}
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} else {
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printk(KERN_ERR "qnap_ts209_pci_preinit failed to gpio_request "
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"%d\n", pin);
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}
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}
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static int __init qnap_ts209_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
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{
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/*
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* PCIE IRQ is connected internally (not GPIO)
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*/
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if (dev->bus->number == orion_pcie_local_bus_nr())
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return IRQ_ORION_PCIE0_INT;
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/*
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* PCI IRQs are connected via GPIOs
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*/
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switch (slot - QNAP_TS209_PCI_SLOT0_OFFS) {
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case 0:
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return gpio_to_irq(QNAP_TS209_PCI_SLOT0_IRQ_PIN);
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case 1:
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return gpio_to_irq(QNAP_TS209_PCI_SLOT1_IRQ_PIN);
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default:
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return -1;
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}
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}
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static struct hw_pci qnap_ts209_pci __initdata = {
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.nr_controllers = 2,
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.preinit = qnap_ts209_pci_preinit,
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.swizzle = pci_std_swizzle,
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.setup = orion_pci_sys_setup,
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.scan = orion_pci_sys_scan_bus,
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.map_irq = qnap_ts209_pci_map_irq,
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};
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static int __init qnap_ts209_pci_init(void)
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{
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if (machine_is_ts_x09())
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pci_common_init(&qnap_ts209_pci);
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return 0;
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}
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subsys_initcall(qnap_ts209_pci_init);
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/*****************************************************************************
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* Ethernet
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****************************************************************************/
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static struct mv643xx_eth_platform_data qnap_ts209_eth_data = {
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.phy_addr = 8,
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.force_phy_addr = 1,
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};
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/*****************************************************************************
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* RTC S35390A on I2C bus
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****************************************************************************/
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static struct i2c_board_info __initdata qnap_ts209_i2c_rtc = {
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.driver_name = "rtc-s35390a",
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.addr = 0x30,
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};
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/****************************************************************************
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* GPIO Attached Keys
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* Power button is attached to the PIC microcontroller
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****************************************************************************/
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#define QNAP_TS209_GPIO_KEY_MEDIA 1
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#define QNAP_TS209_GPIO_KEY_RESET 2
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static struct gpio_keys_button qnap_ts209_buttons[] = {
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{
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.code = KEY_RESTART,
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.gpio = QNAP_TS209_GPIO_KEY_MEDIA,
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.desc = "USB Copy Button",
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.active_low = 1,
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},
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{
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.code = KEY_POWER,
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.gpio = QNAP_TS209_GPIO_KEY_RESET,
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.desc = "Reset Button",
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.active_low = 1,
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}
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};
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static struct gpio_keys_platform_data qnap_ts209_button_data = {
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.buttons = qnap_ts209_buttons,
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.nbuttons = ARRAY_SIZE(qnap_ts209_buttons),
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};
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static struct platform_device qnap_ts209_button_device = {
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.name = "gpio-keys",
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.id = -1,
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.num_resources = 0,
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.dev = { .platform_data = &qnap_ts209_button_data, },
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};
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/*****************************************************************************
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* General Setup
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****************************************************************************/
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static struct platform_device *qnap_ts209_devices[] __initdata = {
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&qnap_ts209_nor_flash,
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&qnap_ts209_button_device,
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};
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static void __init qnap_ts209_init(void)
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{
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/*
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* Setup basic Orion functions. Need to be called early.
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*/
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orion_init();
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/*
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* Setup flash mapping
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*/
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orion_setup_cpu_win(ORION_DEV_BOOT, QNAP_TS209_NOR_BOOT_BASE,
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QNAP_TS209_NOR_BOOT_SIZE, -1);
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/*
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* Open a special address decode windows for the PCIE WA.
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*/
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orion_write(ORION_REGS_BASE | 0x20074, ORION_PCIE_WA_BASE);
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orion_write(ORION_REGS_BASE | 0x20070, (0x7941 |
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(((ORION_PCIE_WA_SIZE >> 16) - 1)) << 16));
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/*
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* Setup Multiplexing Pins --
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* MPP[0] Reserved
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* MPP[1] USB copy button (0 active)
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* MPP[2] Load defaults button (0 active)
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* MPP[3] GPIO RTC
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* MPP[4-5] Reserved
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* MPP[6] PCI Int A
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* MPP[7] PCI Int B
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* MPP[8-11] Reserved
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* MPP[12] SATA 0 presence
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* MPP[13] SATA 1 presence
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* MPP[14] SATA 0 active
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* MPP[15] SATA 1 active
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* MPP[16] UART1 RXD
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* MPP[17] UART1 TXD
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* MPP[18] SW_RST (0 active)
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* MPP[19] Reserved
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* MPP[20] PCI clock 0
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* MPP[21] PCI clock 1
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* MPP[22] USB 0 over current
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* MPP[23-25] Reserved
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*/
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orion_write(MPP_0_7_CTRL, 0x3);
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orion_write(MPP_8_15_CTRL, 0x55550000);
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orion_write(MPP_16_19_CTRL, 0x5500);
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orion_gpio_set_valid_pins(0x3cc0fff);
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platform_add_devices(qnap_ts209_devices,
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ARRAY_SIZE(qnap_ts209_devices));
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i2c_register_board_info(0, &qnap_ts209_i2c_rtc, 1);
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orion_eth_init(&qnap_ts209_eth_data);
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}
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MACHINE_START(TS209, "QNAP TS-109/TS-209")
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/* Maintainer: Byron Bradley <byron.bbradley@gmail.com> */
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.phys_io = ORION_REGS_BASE,
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.io_pg_offst = ((ORION_REGS_BASE) >> 18) & 0xFFFC,
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.boot_params = 0x00000100,
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.init_machine = qnap_ts209_init,
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.map_io = orion_map_io,
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.init_irq = orion_init_irq,
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.timer = &orion_timer,
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MACHINE_END
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