ARM: use arch_extension directive instead of arch argument
The LLVM Target parser currently does not allow to specify the security extension as part of -march (see also LLVM Bug 40186 [0]). When trying to use Clang with LLVM's integrated assembler, this leads to build errors such as this: clang-8: error: the clang compiler does not support '-Wa,-march=armv7-a+sec' Use ".arch_extension sec" to enable the security extension in a more portable fasion. Also make sure to use ".arch armv7-a" in case a v6/v7 multi-platform kernel is being built. Note that this is technically not exactly the same as the old code checked for availabilty of the security extension by calling as-instr. However, there are already other sites which use ".arch_extension sec" unconditionally, hence de-facto we need an assembler capable of ".arch_extension sec" already today (arch/arm/mm/proc-v7.S). The arch extension "sec" is available since binutils 2.21 according to its documentation [1]. [0] https://bugs.llvm.org/show_bug.cgi?id=40186 [1] https://sourceware.org/binutils/docs-2.21/as/ARM-Options.html Signed-off-by: Stefan Agner <stefan@agner.ch> Acked-by: Mans Rullgard <mans@mansr.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Stefan Agner
Olof Johansson
Родитель
24cb4bc8f0
Коммит
3fe1ee40b2
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@ -40,9 +40,6 @@ obj-$(CONFIG_ARCH_BCM_MOBILE_L2_CACHE) += kona_l2_cache.o
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# Support for secure monitor traps
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obj-$(CONFIG_ARCH_BCM_MOBILE_SMC) += bcm_kona_smc.o
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ifeq ($(call as-instr,.arch_extension sec,as_has_sec),as_has_sec)
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CFLAGS_bcm_kona_smc.o += -Wa,-march=armv7-a+sec -DREQUIRES_SEC
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endif
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# BCM2835
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obj-$(CONFIG_ARCH_BCM2835) += board_bcm2835.o
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@ -125,9 +125,7 @@ static int bcm_kona_do_smc(u32 service_id, u32 buffer_phys)
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__asmeq("%2", "r4")
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__asmeq("%3", "r5")
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__asmeq("%4", "r6")
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#ifdef REQUIRES_SEC
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".arch_extension sec\n"
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#endif
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" smc #0\n"
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: "=r" (ip), "=r" (r0)
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: "r" (r4), "r" (r5), "r" (r6)
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@ -14,9 +14,5 @@ obj-$(CONFIG_PM_SLEEP) += suspend.o
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obj-$(CONFIG_SMP) += platsmp.o headsmp.o
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plus_sec := $(call as-instr,.arch_extension sec,+sec)
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AFLAGS_exynos-smc.o :=-Wa,-march=armv7-a$(plus_sec)
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AFLAGS_sleep.o :=-Wa,-march=armv7-a$(plus_sec)
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obj-$(CONFIG_MCPM) += mcpm-exynos.o
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CFLAGS_mcpm-exynos.o += -march=armv7-a
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@ -10,7 +10,8 @@
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/*
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* Function signature: void exynos_smc(u32 cmd, u32 arg1, u32 arg2, u32 arg3)
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*/
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.arch armv7-a
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.arch_extension sec
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ENTRY(exynos_smc)
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stmfd sp!, {r4-r11, lr}
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dsb
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@ -44,7 +44,8 @@ ENTRY(exynos_cpu_resume)
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ENDPROC(exynos_cpu_resume)
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.align
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.arch armv7-a
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.arch_extension sec
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ENTRY(exynos_cpu_resume_ns)
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mrc p15, 0, r0, c0, c0, 0
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ldr r1, =CPU_MASK
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@ -1,7 +1,4 @@
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# SPDX-License-Identifier: GPL-2.0-only
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obj-y := highbank.o system.o smc.o
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plus_sec := $(call as-instr,.arch_extension sec,+sec)
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AFLAGS_smc.o :=-Wa,-march=armv7-a$(plus_sec)
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obj-$(CONFIG_PM_SLEEP) += pm.o
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@ -16,7 +16,8 @@
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* the monitor API number.
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* Function signature : void highbank_smc1(u32 fn, u32 arg)
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*/
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.arch armv7-a
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.arch_extension sec
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ENTRY(highbank_smc1)
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stmfd sp!, {r4-r11, lr}
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mov r12, r0
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@ -1,9 +1,6 @@
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# SPDX-License-Identifier: GPL-2.0
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obj-y := keystone.o smc.o
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plus_sec := $(call as-instr,.arch_extension sec,+sec)
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AFLAGS_smc.o :=-Wa,-march=armv7-a$(plus_sec)
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obj-$(CONFIG_SMP) += platsmp.o
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# PM domain driver for Keystone SOCs
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@ -21,6 +21,7 @@
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*
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* Return: Non zero value on failure
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*/
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.arch_extension sec
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ENTRY(keystone_cpu_smc)
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stmfd sp!, {r4-r11, lr}
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smc #0
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@ -41,11 +41,6 @@ obj-$(CONFIG_SOC_OMAP5) += $(omap-4-5-common) $(smp-y) sleep44xx.o
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obj-$(CONFIG_SOC_AM43XX) += $(omap-4-5-common)
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obj-$(CONFIG_SOC_DRA7XX) += $(omap-4-5-common) $(smp-y) sleep44xx.o
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plus_sec := $(call as-instr,.arch_extension sec,+sec)
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AFLAGS_omap-headsmp.o :=-Wa,-march=armv7-a$(plus_sec)
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AFLAGS_omap-smc.o :=-Wa,-march=armv7-a$(plus_sec)
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AFLAGS_sleep44xx.o :=-Wa,-march=armv7-a$(plus_sec)
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# Functions loaded to SRAM
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obj-$(CONFIG_SOC_OMAP2420) += sram242x.o
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obj-$(CONFIG_SOC_OMAP2430) += sram243x.o
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@ -95,9 +90,6 @@ obj-$(CONFIG_POWER_AVS_OMAP) += sr_device.o
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obj-$(CONFIG_POWER_AVS_OMAP_CLASS3) += smartreflex-class3.o
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AFLAGS_sleep24xx.o :=-Wa,-march=armv6
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AFLAGS_sleep34xx.o :=-Wa,-march=armv7-a$(plus_sec)
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AFLAGS_sleep33xx.o :=-Wa,-march=armv7-a$(plus_sec)
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AFLAGS_sleep43xx.o :=-Wa,-march=armv7-a$(plus_sec)
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endif
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@ -58,6 +58,8 @@ ENDPROC(omap5_secondary_startup)
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* omap5_secondary_startup if the primary CPU was put into HYP mode by
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* the boot loader.
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*/
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.arch armv7-a
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.arch_extension sec
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ENTRY(omap5_secondary_hyp_startup)
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wait_2: ldr r2, =AUX_CORE_BOOT0_PA @ read from AuxCoreBoot0
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ldr r0, [r2]
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@ -23,7 +23,8 @@
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* link register "lr".
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* Function signature : void omap_smc1(u32 fn, u32 arg)
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*/
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.arch armv7-a
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.arch_extension sec
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ENTRY(omap_smc1)
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stmfd sp!, {r2-r12, lr}
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mov r12, r0
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@ -24,6 +24,7 @@
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#define BIT(nr) (1 << (nr))
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.arm
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.arch armv7-a
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.align 3
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ENTRY(am33xx_do_wfi)
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@ -83,6 +83,8 @@ ENDPROC(enable_omap3630_toggle_l2_on_restore)
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*
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* r0 = physical address of the parameters
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*/
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.arch armv7-a
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.arch_extension sec
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ENTRY(save_secure_ram_context)
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stmfd sp!, {r4 - r11, lr} @ save registers on stack
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mov r3, r0 @ physical address of parameters
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@ -56,6 +56,8 @@
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#define RTC_PMIC_EXT_WAKEUP_EN BIT(0)
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.arm
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.arch armv7-a
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.arch_extension sec
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.align 3
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ENTRY(am43xx_do_wfi)
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@ -21,8 +21,11 @@
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#include "omap44xx.h"
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#include "omap4-sar-layout.h"
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.arch armv7-a
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#if defined(CONFIG_SMP) && defined(CONFIG_PM)
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.arch_extension sec
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.macro DO_SMC
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dsb
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smc #0
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@ -1,7 +1,4 @@
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# SPDX-License-Identifier: GPL-2.0
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plus_sec := $(call as-instr,.arch_extension sec,+sec)
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AFLAGS_smc.o := -Wa,-march=armv7-a$(plus_sec)
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obj-y += setup.o smc.o
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obj-$(CONFIG_SMP) += platsmp.o
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obj-$(CONFIG_SUSPEND) += pm.o
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@ -1,6 +1,8 @@
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/* SPDX-License-Identifier: GPL-2.0 */
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#include <linux/linkage.h>
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.arch armv7-a
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.arch_extension sec
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ENTRY(tango_smc)
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push {lr}
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mov ip, r1
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