fbdev changes for 4.7
* imxfb: fix lcd power up * small fixes and cleanups -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJXPshLAAoJEPo9qoy8lh71QNIQAKlSAb0C4PUK67NaymL3w1FO RhCAsmAeJdODV2iK7RhsKMUSnlFPkCZ3urFJz7tHv7B3k09QkzBBSHQdQpF6mWyu +Rna7NehCO44k+NM7zTnd3dbL5dq8H7wWCLKambHHWC8/tcsD+DLcoKHsFwdcZwe WeWA38R09uH0z6idPYv2vyjMH+cHcAE86SOaeQ/8jgqDmlX8kkXRVPlHaowhUYio dap9gtiy/+OWOIVDRTV7uWKtKZwt3KTIafCpZxRuynqZWET0jurDAyGiUqvXTGvC 0RCuDsKMAhiysLkXRFRRBAeo6Yj6TGsGCNyLec/SE8VZbOxpfUJx+INQg/oqOdSq xg3PvMtAJH7JiGxSHZZGAR7mxYuzmWW8dXMk/Fu7UZgkCCiLbjdDmytAY5T6qTHz 4Nq5omczxpj38d3UbcljXmNwudmIEes82sIYOalN2nxCEXuycCWyQO0U0swmkaqH 4ISSJY8Gej10QXO8mivv1q9y9BaOJfUeoqtyNR4zQAiulfjZIbtyLeX3FRKLTjI/ 50K2YCGm06GP9CHGefzVl3PBgeZ49NGegu+Z8sRfYxAac3R0V4QaE+40ygFaOHCY Gq5dvEKXgJeq2i3nanlKwZkr7kB0FF/XqaH9RSYO7TaoyOg8GgeZYcj1sGzJwplu c4lRcKRlzRShV2HymHFv =iHUZ -----END PGP SIGNATURE----- Merge tag 'fbdev-4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/tomba/linux Pull fbdev updates from Tomi Valkeinen: - imxfb: fix lcd power up - small fixes and cleanups * tag 'fbdev-4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/tomba/linux: fbdev: Use IS_ENABLED() instead of checking for built-in or module efifb: Don't show the mapping VA video: AMBA CLCD: Remove unncessary include in amba-clcd.c fbdev: ssd1307fb: Fix charge pump setting Documentation: fb: fix spelling mistakes fbdev: fbmem: implement error handling in fbmem_init() fbdev: sh_mipi_dsi: remove driver video: fbdev: imxfb: add some error handling video: fbdev: imxfb: fix semantic of .get_power and .set_power video: fbdev: omap2: Remove deprecated regulator_can_change_voltage() usage
This commit is contained in:
Linus Torvalds
Коммит
410b42978a
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@ -9,7 +9,7 @@ pairing that with a hardware framebuffer (16MB) on the other end of the
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USB wire. That hardware framebuffer is able to drive the VGA, DVI, or HDMI
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monitor with no CPU involvement until a pixel has to change.
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The CPU or other local resource does all the rendering; optinally compares the
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The CPU or other local resource does all the rendering; optionally compares the
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result with a local shadow of the remote hardware framebuffer to identify
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the minimal set of pixels that have changed; and compresses and sends those
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pixels line-by-line via USB bulk transfers.
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@ -66,10 +66,10 @@ means that from a hardware and fbdev software perspective, everything is good.
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At that point, a /dev/fb? interface will be present for user-mode applications
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to open and begin writing to the framebuffer of the DisplayLink device using
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standard fbdev calls. Note that if mmap() is used, by default the user mode
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application must send down damage notifcations to trigger repaints of the
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application must send down damage notifications to trigger repaints of the
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changed regions. Alternatively, udlfb can be recompiled with experimental
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defio support enabled, to support a page-fault based detection mechanism
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that can work without explicit notifcation.
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that can work without explicit notification.
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The most common client of udlfb is xf86-video-displaylink or a modified
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xf86-video-fbdev X server. These servers have no real DisplayLink specific
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@ -8,10 +8,6 @@ menu "Graphics support"
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config HAVE_FB_ATMEL
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bool
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config SH_MIPI_DSI
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tristate
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depends on (SUPERH || ARCH_SHMOBILE) && HAVE_CLK
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config SH_LCD_MIPI_DSI
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bool
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@ -1993,7 +1993,6 @@ config FB_SH_MOBILE_LCDC
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select FB_SYS_FOPS
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select FB_DEFERRED_IO
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select FB_BACKLIGHT
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select SH_MIPI_DSI if SH_LCD_MIPI_DSI
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---help---
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Frame buffer driver for the on-chip SH-Mobile LCD controller.
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@ -117,7 +117,6 @@ obj-$(CONFIG_FB_SM501) += sm501fb.o
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obj-$(CONFIG_FB_UDL) += udlfb.o
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obj-$(CONFIG_FB_SMSCUFX) += smscufx.o
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obj-$(CONFIG_FB_XILINX) += xilinxfb.o
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obj-$(CONFIG_SH_MIPI_DSI) += sh_mipi_dsi.o
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obj-$(CONFIG_FB_SH_MOBILE_MERAM) += sh_mobile_meram.o
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obj-$(CONFIG_FB_SH_MOBILE_LCDC) += sh_mobile_lcdcfb.o
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obj-$(CONFIG_FB_OMAP) += omap/
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@ -34,8 +34,6 @@
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#include <video/of_display_timing.h>
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#include <video/videomode.h>
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#include <asm/sizes.h>
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#define to_clcd(info) container_of(info, struct clcd_fb, fb)
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/* This is limited to 16 characters when displayed by X startup */
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@ -1854,17 +1854,31 @@ EXPORT_SYMBOL(fb_set_suspend);
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static int __init
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fbmem_init(void)
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{
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proc_create("fb", 0, NULL, &fb_proc_fops);
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int ret;
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if (register_chrdev(FB_MAJOR,"fb",&fb_fops))
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if (!proc_create("fb", 0, NULL, &fb_proc_fops))
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return -ENOMEM;
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ret = register_chrdev(FB_MAJOR, "fb", &fb_fops);
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if (ret) {
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printk("unable to get major %d for fb devs\n", FB_MAJOR);
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goto err_chrdev;
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}
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fb_class = class_create(THIS_MODULE, "graphics");
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if (IS_ERR(fb_class)) {
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printk(KERN_WARNING "Unable to create fb class; errno = %ld\n", PTR_ERR(fb_class));
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ret = PTR_ERR(fb_class);
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pr_warn("Unable to create fb class; errno = %d\n", ret);
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fb_class = NULL;
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goto err_class;
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}
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return 0;
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err_class:
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unregister_chrdev(FB_MAJOR, "fb");
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err_chrdev:
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remove_proc_entry("fb", NULL);
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return ret;
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}
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#ifdef MODULE
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@ -237,10 +237,8 @@ static int efifb_probe(struct platform_device *dev)
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goto err_release_fb;
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}
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printk(KERN_INFO "efifb: framebuffer at 0x%lx, mapped to 0x%p, "
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"using %dk, total %dk\n",
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efifb_fix.smem_start, info->screen_base,
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size_remap/1024, size_total/1024);
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printk(KERN_INFO "efifb: framebuffer at 0x%lx, using %dk, total %dk\n",
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efifb_fix.smem_start, size_remap/1024, size_total/1024);
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printk(KERN_INFO "efifb: mode is %dx%dx%d, linelength=%d, pages=%d\n",
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efifb_defined.xres, efifb_defined.yres,
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efifb_defined.bits_per_pixel, efifb_fix.line_length,
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@ -473,11 +473,12 @@ static int imxfb_set_par(struct fb_info *info)
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return 0;
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}
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static void imxfb_enable_controller(struct imxfb_info *fbi)
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static int imxfb_enable_controller(struct imxfb_info *fbi)
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{
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int ret;
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if (fbi->enabled)
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return;
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return 0;
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pr_debug("Enabling LCD controller\n");
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@ -496,10 +497,29 @@ static void imxfb_enable_controller(struct imxfb_info *fbi)
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*/
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writel(RMCR_LCDC_EN_MX1, fbi->regs + LCDC_RMCR);
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clk_prepare_enable(fbi->clk_ipg);
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clk_prepare_enable(fbi->clk_ahb);
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clk_prepare_enable(fbi->clk_per);
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ret = clk_prepare_enable(fbi->clk_ipg);
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if (ret)
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goto err_enable_ipg;
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ret = clk_prepare_enable(fbi->clk_ahb);
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if (ret)
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goto err_enable_ahb;
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ret = clk_prepare_enable(fbi->clk_per);
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if (ret)
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goto err_enable_per;
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fbi->enabled = true;
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return 0;
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err_enable_per:
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clk_disable_unprepare(fbi->clk_ahb);
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err_enable_ahb:
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clk_disable_unprepare(fbi->clk_ipg);
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err_enable_ipg:
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writel(0, fbi->regs + LCDC_RMCR);
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return ret;
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}
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static void imxfb_disable_controller(struct imxfb_info *fbi)
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@ -510,8 +530,8 @@ static void imxfb_disable_controller(struct imxfb_info *fbi)
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pr_debug("Disabling LCD controller\n");
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clk_disable_unprepare(fbi->clk_per);
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clk_disable_unprepare(fbi->clk_ipg);
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clk_disable_unprepare(fbi->clk_ahb);
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clk_disable_unprepare(fbi->clk_ipg);
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fbi->enabled = false;
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writel(0, fbi->regs + LCDC_RMCR);
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@ -532,8 +552,7 @@ static int imxfb_blank(int blank, struct fb_info *info)
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break;
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case FB_BLANK_UNBLANK:
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imxfb_enable_controller(fbi);
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break;
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return imxfb_enable_controller(fbi);
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}
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return 0;
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}
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@ -758,10 +777,11 @@ static int imxfb_lcd_get_power(struct lcd_device *lcddev)
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{
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struct imxfb_info *fbi = dev_get_drvdata(&lcddev->dev);
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if (!IS_ERR(fbi->lcd_pwr))
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return regulator_is_enabled(fbi->lcd_pwr);
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if (!IS_ERR(fbi->lcd_pwr) &&
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!regulator_is_enabled(fbi->lcd_pwr))
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return FB_BLANK_POWERDOWN;
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return 1;
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return FB_BLANK_UNBLANK;
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}
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static int imxfb_lcd_set_power(struct lcd_device *lcddev, int power)
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@ -769,7 +789,7 @@ static int imxfb_lcd_set_power(struct lcd_device *lcddev, int power)
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struct imxfb_info *fbi = dev_get_drvdata(&lcddev->dev);
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if (!IS_ERR(fbi->lcd_pwr)) {
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if (power)
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if (power == FB_BLANK_UNBLANK)
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return regulator_enable(fbi->lcd_pwr);
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else
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return regulator_disable(fbi->lcd_pwr);
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@ -1180,13 +1180,11 @@ static int dsi_regulator_init(struct platform_device *dsidev)
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return PTR_ERR(vdds_dsi);
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}
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if (regulator_can_change_voltage(vdds_dsi)) {
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r = regulator_set_voltage(vdds_dsi, 1800000, 1800000);
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if (r) {
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devm_regulator_put(vdds_dsi);
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DSSERR("can't set the DSI regulator voltage\n");
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return r;
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}
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r = regulator_set_voltage(vdds_dsi, 1800000, 1800000);
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if (r) {
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devm_regulator_put(vdds_dsi);
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DSSERR("can't set the DSI regulator voltage\n");
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return r;
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}
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dsi->vdds_dsi_reg = vdds_dsi;
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@ -114,13 +114,11 @@ static int hdmi_init_regulator(void)
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return PTR_ERR(reg);
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}
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if (regulator_can_change_voltage(reg)) {
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r = regulator_set_voltage(reg, 1800000, 1800000);
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if (r) {
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devm_regulator_put(reg);
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DSSWARN("can't set the regulator voltage\n");
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return r;
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}
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r = regulator_set_voltage(reg, 1800000, 1800000);
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if (r) {
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devm_regulator_put(reg);
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DSSWARN("can't set the regulator voltage\n");
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return r;
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}
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hdmi.vdda_reg = reg;
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@ -131,13 +131,11 @@ static int hdmi_init_regulator(void)
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return PTR_ERR(reg);
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}
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if (regulator_can_change_voltage(reg)) {
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r = regulator_set_voltage(reg, 1800000, 1800000);
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if (r) {
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devm_regulator_put(reg);
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DSSWARN("can't set the regulator voltage\n");
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return r;
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}
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r = regulator_set_voltage(reg, 1800000, 1800000);
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if (r) {
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devm_regulator_put(reg);
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DSSWARN("can't set the regulator voltage\n");
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return r;
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}
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hdmi.vdda_reg = reg;
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@ -1,587 +0,0 @@
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/*
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* Renesas SH-mobile MIPI DSI support
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*
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* Copyright (C) 2010 Guennadi Liakhovetski <g.liakhovetski@gmx.de>
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*
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* This is free software; you can redistribute it and/or modify
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* it under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*/
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#include <linux/bitmap.h>
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#include <linux/clk.h>
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#include <linux/delay.h>
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/platform_device.h>
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#include <linux/pm_runtime.h>
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#include <linux/slab.h>
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#include <linux/string.h>
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#include <linux/types.h>
|
||||
#include <linux/module.h>
|
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|
||||
#include <video/mipi_display.h>
|
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#include <video/sh_mipi_dsi.h>
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#include <video/sh_mobile_lcdc.h>
|
||||
|
||||
#include "sh_mobile_lcdcfb.h"
|
||||
|
||||
#define SYSCTRL 0x0000
|
||||
#define SYSCONF 0x0004
|
||||
#define TIMSET 0x0008
|
||||
#define RESREQSET0 0x0018
|
||||
#define RESREQSET1 0x001c
|
||||
#define HSTTOVSET 0x0020
|
||||
#define LPRTOVSET 0x0024
|
||||
#define TATOVSET 0x0028
|
||||
#define PRTOVSET 0x002c
|
||||
#define DSICTRL 0x0030
|
||||
#define DSIINTE 0x0060
|
||||
#define PHYCTRL 0x0070
|
||||
|
||||
/* relative to linkbase */
|
||||
#define DTCTR 0x0000
|
||||
#define VMCTR1 0x0020
|
||||
#define VMCTR2 0x0024
|
||||
#define VMLEN1 0x0028
|
||||
#define VMLEN2 0x002c
|
||||
#define CMTSRTREQ 0x0070
|
||||
#define CMTSRTCTR 0x00d0
|
||||
|
||||
/* E.g., sh7372 has 2 MIPI-DSIs - one for each LCDC */
|
||||
#define MAX_SH_MIPI_DSI 2
|
||||
|
||||
struct sh_mipi {
|
||||
struct sh_mobile_lcdc_entity entity;
|
||||
|
||||
void __iomem *base;
|
||||
void __iomem *linkbase;
|
||||
struct clk *dsit_clk;
|
||||
struct platform_device *pdev;
|
||||
};
|
||||
|
||||
#define to_sh_mipi(e) container_of(e, struct sh_mipi, entity)
|
||||
|
||||
static struct sh_mipi *mipi_dsi[MAX_SH_MIPI_DSI];
|
||||
|
||||
/* Protect the above array */
|
||||
static DEFINE_MUTEX(array_lock);
|
||||
|
||||
static struct sh_mipi *sh_mipi_by_handle(int handle)
|
||||
{
|
||||
if (handle >= ARRAY_SIZE(mipi_dsi) || handle < 0)
|
||||
return NULL;
|
||||
|
||||
return mipi_dsi[handle];
|
||||
}
|
||||
|
||||
static int sh_mipi_send_short(struct sh_mipi *mipi, u8 dsi_cmd,
|
||||
u8 cmd, u8 param)
|
||||
{
|
||||
u32 data = (dsi_cmd << 24) | (cmd << 16) | (param << 8);
|
||||
int cnt = 100;
|
||||
|
||||
/* transmit a short packet to LCD panel */
|
||||
iowrite32(1 | data, mipi->linkbase + CMTSRTCTR);
|
||||
iowrite32(1, mipi->linkbase + CMTSRTREQ);
|
||||
|
||||
while ((ioread32(mipi->linkbase + CMTSRTREQ) & 1) && --cnt)
|
||||
udelay(1);
|
||||
|
||||
return cnt ? 0 : -ETIMEDOUT;
|
||||
}
|
||||
|
||||
#define LCD_CHAN2MIPI(c) ((c) < LCDC_CHAN_MAINLCD || (c) > LCDC_CHAN_SUBLCD ? \
|
||||
-EINVAL : (c) - 1)
|
||||
|
||||
static int sh_mipi_dcs(int handle, u8 cmd)
|
||||
{
|
||||
struct sh_mipi *mipi = sh_mipi_by_handle(LCD_CHAN2MIPI(handle));
|
||||
if (!mipi)
|
||||
return -ENODEV;
|
||||
return sh_mipi_send_short(mipi, MIPI_DSI_DCS_SHORT_WRITE, cmd, 0);
|
||||
}
|
||||
|
||||
static int sh_mipi_dcs_param(int handle, u8 cmd, u8 param)
|
||||
{
|
||||
struct sh_mipi *mipi = sh_mipi_by_handle(LCD_CHAN2MIPI(handle));
|
||||
if (!mipi)
|
||||
return -ENODEV;
|
||||
return sh_mipi_send_short(mipi, MIPI_DSI_DCS_SHORT_WRITE_PARAM, cmd,
|
||||
param);
|
||||
}
|
||||
|
||||
static void sh_mipi_dsi_enable(struct sh_mipi *mipi, bool enable)
|
||||
{
|
||||
/*
|
||||
* enable LCDC data tx, transition to LPS after completion of each HS
|
||||
* packet
|
||||
*/
|
||||
iowrite32(0x00000002 | enable, mipi->linkbase + DTCTR);
|
||||
}
|
||||
|
||||
static void sh_mipi_shutdown(struct platform_device *pdev)
|
||||
{
|
||||
struct sh_mipi *mipi = to_sh_mipi(platform_get_drvdata(pdev));
|
||||
|
||||
sh_mipi_dsi_enable(mipi, false);
|
||||
}
|
||||
|
||||
static int sh_mipi_setup(struct sh_mipi *mipi, const struct fb_videomode *mode)
|
||||
{
|
||||
void __iomem *base = mipi->base;
|
||||
struct sh_mipi_dsi_info *pdata = mipi->pdev->dev.platform_data;
|
||||
u32 pctype, datatype, pixfmt, linelength, vmctr2;
|
||||
u32 tmp, top, bottom, delay, div;
|
||||
int bpp;
|
||||
|
||||
/*
|
||||
* Select data format. MIPI DSI is not hot-pluggable, so, we just use
|
||||
* the default videomode. If this ever becomes a problem, We'll have to
|
||||
* move this to mipi_display_on() above and use info->var.xres
|
||||
*/
|
||||
switch (pdata->data_format) {
|
||||
case MIPI_RGB888:
|
||||
pctype = 0;
|
||||
datatype = MIPI_DSI_PACKED_PIXEL_STREAM_24;
|
||||
pixfmt = MIPI_DCS_PIXEL_FMT_24BIT;
|
||||
linelength = mode->xres * 3;
|
||||
break;
|
||||
case MIPI_RGB565:
|
||||
pctype = 1;
|
||||
datatype = MIPI_DSI_PACKED_PIXEL_STREAM_16;
|
||||
pixfmt = MIPI_DCS_PIXEL_FMT_16BIT;
|
||||
linelength = mode->xres * 2;
|
||||
break;
|
||||
case MIPI_RGB666_LP:
|
||||
pctype = 2;
|
||||
datatype = MIPI_DSI_PIXEL_STREAM_3BYTE_18;
|
||||
pixfmt = MIPI_DCS_PIXEL_FMT_24BIT;
|
||||
linelength = mode->xres * 3;
|
||||
break;
|
||||
case MIPI_RGB666:
|
||||
pctype = 3;
|
||||
datatype = MIPI_DSI_PACKED_PIXEL_STREAM_18;
|
||||
pixfmt = MIPI_DCS_PIXEL_FMT_18BIT;
|
||||
linelength = (mode->xres * 18 + 7) / 8;
|
||||
break;
|
||||
case MIPI_BGR888:
|
||||
pctype = 8;
|
||||
datatype = MIPI_DSI_PACKED_PIXEL_STREAM_24;
|
||||
pixfmt = MIPI_DCS_PIXEL_FMT_24BIT;
|
||||
linelength = mode->xres * 3;
|
||||
break;
|
||||
case MIPI_BGR565:
|
||||
pctype = 9;
|
||||
datatype = MIPI_DSI_PACKED_PIXEL_STREAM_16;
|
||||
pixfmt = MIPI_DCS_PIXEL_FMT_16BIT;
|
||||
linelength = mode->xres * 2;
|
||||
break;
|
||||
case MIPI_BGR666_LP:
|
||||
pctype = 0xa;
|
||||
datatype = MIPI_DSI_PIXEL_STREAM_3BYTE_18;
|
||||
pixfmt = MIPI_DCS_PIXEL_FMT_24BIT;
|
||||
linelength = mode->xres * 3;
|
||||
break;
|
||||
case MIPI_BGR666:
|
||||
pctype = 0xb;
|
||||
datatype = MIPI_DSI_PACKED_PIXEL_STREAM_18;
|
||||
pixfmt = MIPI_DCS_PIXEL_FMT_18BIT;
|
||||
linelength = (mode->xres * 18 + 7) / 8;
|
||||
break;
|
||||
case MIPI_YUYV:
|
||||
pctype = 4;
|
||||
datatype = MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR16;
|
||||
pixfmt = MIPI_DCS_PIXEL_FMT_16BIT;
|
||||
linelength = mode->xres * 2;
|
||||
break;
|
||||
case MIPI_UYVY:
|
||||
pctype = 5;
|
||||
datatype = MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR16;
|
||||
pixfmt = MIPI_DCS_PIXEL_FMT_16BIT;
|
||||
linelength = mode->xres * 2;
|
||||
break;
|
||||
case MIPI_YUV420_L:
|
||||
pctype = 6;
|
||||
datatype = MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR12;
|
||||
pixfmt = MIPI_DCS_PIXEL_FMT_12BIT;
|
||||
linelength = (mode->xres * 12 + 7) / 8;
|
||||
break;
|
||||
case MIPI_YUV420:
|
||||
pctype = 7;
|
||||
datatype = MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR12;
|
||||
pixfmt = MIPI_DCS_PIXEL_FMT_12BIT;
|
||||
/* Length of U/V line */
|
||||
linelength = (mode->xres + 1) / 2;
|
||||
break;
|
||||
default:
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
if (!pdata->lane)
|
||||
return -EINVAL;
|
||||
|
||||
/* reset DSI link */
|
||||
iowrite32(0x00000001, base + SYSCTRL);
|
||||
/* Hold reset for 100 cycles of the slowest of bus, HS byte and LP clock */
|
||||
udelay(50);
|
||||
iowrite32(0x00000000, base + SYSCTRL);
|
||||
|
||||
/* setup DSI link */
|
||||
|
||||
/*
|
||||
* T_wakeup = 0x7000
|
||||
* T_hs-trail = 3
|
||||
* T_hs-prepare = 3
|
||||
* T_clk-trail = 3
|
||||
* T_clk-prepare = 2
|
||||
*/
|
||||
iowrite32(0x70003332, base + TIMSET);
|
||||
/* no responses requested */
|
||||
iowrite32(0x00000000, base + RESREQSET0);
|
||||
/* request response to packets of type 0x28 */
|
||||
iowrite32(0x00000100, base + RESREQSET1);
|
||||
/* High-speed transmission timeout, default 0xffffffff */
|
||||
iowrite32(0x0fffffff, base + HSTTOVSET);
|
||||
/* LP reception timeout, default 0xffffffff */
|
||||
iowrite32(0x0fffffff, base + LPRTOVSET);
|
||||
/* Turn-around timeout, default 0xffffffff */
|
||||
iowrite32(0x0fffffff, base + TATOVSET);
|
||||
/* Peripheral reset timeout, default 0xffffffff */
|
||||
iowrite32(0x0fffffff, base + PRTOVSET);
|
||||
/* Interrupts not used, disable all */
|
||||
iowrite32(0, base + DSIINTE);
|
||||
/* DSI-Tx bias on */
|
||||
iowrite32(0x00000001, base + PHYCTRL);
|
||||
udelay(200);
|
||||
/* Deassert resets, power on */
|
||||
iowrite32(0x03070001 | pdata->phyctrl, base + PHYCTRL);
|
||||
|
||||
/*
|
||||
* Default = ULPS enable |
|
||||
* Contention detection enabled |
|
||||
* EoT packet transmission enable |
|
||||
* CRC check enable |
|
||||
* ECC check enable
|
||||
*/
|
||||
bitmap_fill((unsigned long *)&tmp, pdata->lane);
|
||||
tmp |= 0x00003700;
|
||||
iowrite32(tmp, base + SYSCONF);
|
||||
|
||||
/* setup l-bridge */
|
||||
|
||||
/*
|
||||
* Enable transmission of all packets,
|
||||
* transmit LPS after each HS packet completion
|
||||
*/
|
||||
iowrite32(0x00000006, mipi->linkbase + DTCTR);
|
||||
/* VSYNC width = 2 (<< 17) */
|
||||
iowrite32((mode->vsync_len << pdata->vsynw_offset) |
|
||||
(pdata->clksrc << 16) | (pctype << 12) | datatype,
|
||||
mipi->linkbase + VMCTR1);
|
||||
|
||||
/*
|
||||
* Non-burst mode with sync pulses: VSE and HSE are output,
|
||||
* HSA period allowed, no commands in LP
|
||||
*/
|
||||
vmctr2 = 0;
|
||||
if (pdata->flags & SH_MIPI_DSI_VSEE)
|
||||
vmctr2 |= 1 << 23;
|
||||
if (pdata->flags & SH_MIPI_DSI_HSEE)
|
||||
vmctr2 |= 1 << 22;
|
||||
if (pdata->flags & SH_MIPI_DSI_HSAE)
|
||||
vmctr2 |= 1 << 21;
|
||||
if (pdata->flags & SH_MIPI_DSI_BL2E)
|
||||
vmctr2 |= 1 << 17;
|
||||
if (pdata->flags & SH_MIPI_DSI_HSABM)
|
||||
vmctr2 |= 1 << 5;
|
||||
if (pdata->flags & SH_MIPI_DSI_HBPBM)
|
||||
vmctr2 |= 1 << 4;
|
||||
if (pdata->flags & SH_MIPI_DSI_HFPBM)
|
||||
vmctr2 |= 1 << 3;
|
||||
iowrite32(vmctr2, mipi->linkbase + VMCTR2);
|
||||
|
||||
/*
|
||||
* VMLEN1 = RGBLEN | HSALEN
|
||||
*
|
||||
* see
|
||||
* Video mode - Blanking Packet setting
|
||||
*/
|
||||
top = linelength << 16; /* RGBLEN */
|
||||
bottom = 0x00000001;
|
||||
if (pdata->flags & SH_MIPI_DSI_HSABM) /* HSALEN */
|
||||
bottom = (pdata->lane * mode->hsync_len) - 10;
|
||||
iowrite32(top | bottom , mipi->linkbase + VMLEN1);
|
||||
|
||||
/*
|
||||
* VMLEN2 = HBPLEN | HFPLEN
|
||||
*
|
||||
* see
|
||||
* Video mode - Blanking Packet setting
|
||||
*/
|
||||
top = 0x00010000;
|
||||
bottom = 0x00000001;
|
||||
delay = 0;
|
||||
|
||||
div = 1; /* HSbyteCLK is calculation base
|
||||
* HS4divCLK = HSbyteCLK/2
|
||||
* HS6divCLK is not supported for now */
|
||||
if (pdata->flags & SH_MIPI_DSI_HS4divCLK)
|
||||
div = 2;
|
||||
|
||||
if (pdata->flags & SH_MIPI_DSI_HFPBM) { /* HBPLEN */
|
||||
top = mode->hsync_len + mode->left_margin;
|
||||
top = ((pdata->lane * top / div) - 10) << 16;
|
||||
}
|
||||
if (pdata->flags & SH_MIPI_DSI_HBPBM) { /* HFPLEN */
|
||||
bottom = mode->right_margin;
|
||||
bottom = (pdata->lane * bottom / div) - 12;
|
||||
}
|
||||
|
||||
bpp = linelength / mode->xres; /* byte / pixel */
|
||||
if ((pdata->lane / div) > bpp) {
|
||||
tmp = mode->xres / bpp; /* output cycle */
|
||||
tmp = mode->xres - tmp; /* (input - output) cycle */
|
||||
delay = (pdata->lane * tmp);
|
||||
}
|
||||
|
||||
iowrite32(top | (bottom + delay) , mipi->linkbase + VMLEN2);
|
||||
|
||||
msleep(5);
|
||||
|
||||
/* setup LCD panel */
|
||||
|
||||
/* cf. drivers/video/omap/lcd_mipid.c */
|
||||
sh_mipi_dcs(pdata->channel, MIPI_DCS_EXIT_SLEEP_MODE);
|
||||
msleep(120);
|
||||
/*
|
||||
* [7] - Page Address Mode
|
||||
* [6] - Column Address Mode
|
||||
* [5] - Page / Column Address Mode
|
||||
* [4] - Display Device Line Refresh Order
|
||||
* [3] - RGB/BGR Order
|
||||
* [2] - Display Data Latch Data Order
|
||||
* [1] - Flip Horizontal
|
||||
* [0] - Flip Vertical
|
||||
*/
|
||||
sh_mipi_dcs_param(pdata->channel, MIPI_DCS_SET_ADDRESS_MODE, 0x00);
|
||||
/* cf. set_data_lines() */
|
||||
sh_mipi_dcs_param(pdata->channel, MIPI_DCS_SET_PIXEL_FORMAT,
|
||||
pixfmt << 4);
|
||||
sh_mipi_dcs(pdata->channel, MIPI_DCS_SET_DISPLAY_ON);
|
||||
|
||||
/* Enable timeout counters */
|
||||
iowrite32(0x00000f00, base + DSICTRL);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int mipi_display_on(struct sh_mobile_lcdc_entity *entity)
|
||||
{
|
||||
struct sh_mipi *mipi = to_sh_mipi(entity);
|
||||
struct sh_mipi_dsi_info *pdata = mipi->pdev->dev.platform_data;
|
||||
int ret;
|
||||
|
||||
pm_runtime_get_sync(&mipi->pdev->dev);
|
||||
|
||||
ret = pdata->set_dot_clock(mipi->pdev, mipi->base, 1);
|
||||
if (ret < 0)
|
||||
goto mipi_display_on_fail1;
|
||||
|
||||
ret = sh_mipi_setup(mipi, &entity->def_mode);
|
||||
if (ret < 0)
|
||||
goto mipi_display_on_fail2;
|
||||
|
||||
sh_mipi_dsi_enable(mipi, true);
|
||||
|
||||
return SH_MOBILE_LCDC_DISPLAY_CONNECTED;
|
||||
|
||||
mipi_display_on_fail1:
|
||||
pm_runtime_put_sync(&mipi->pdev->dev);
|
||||
mipi_display_on_fail2:
|
||||
pdata->set_dot_clock(mipi->pdev, mipi->base, 0);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void mipi_display_off(struct sh_mobile_lcdc_entity *entity)
|
||||
{
|
||||
struct sh_mipi *mipi = to_sh_mipi(entity);
|
||||
struct sh_mipi_dsi_info *pdata = mipi->pdev->dev.platform_data;
|
||||
|
||||
sh_mipi_dsi_enable(mipi, false);
|
||||
|
||||
pdata->set_dot_clock(mipi->pdev, mipi->base, 0);
|
||||
|
||||
pm_runtime_put_sync(&mipi->pdev->dev);
|
||||
}
|
||||
|
||||
static const struct sh_mobile_lcdc_entity_ops mipi_ops = {
|
||||
.display_on = mipi_display_on,
|
||||
.display_off = mipi_display_off,
|
||||
};
|
||||
|
||||
static int __init sh_mipi_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct sh_mipi *mipi;
|
||||
struct sh_mipi_dsi_info *pdata = pdev->dev.platform_data;
|
||||
struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
struct resource *res2 = platform_get_resource(pdev, IORESOURCE_MEM, 1);
|
||||
unsigned long rate, f_current;
|
||||
int idx = pdev->id, ret;
|
||||
|
||||
if (!res || !res2 || idx >= ARRAY_SIZE(mipi_dsi) || !pdata)
|
||||
return -ENODEV;
|
||||
|
||||
if (!pdata->set_dot_clock)
|
||||
return -EINVAL;
|
||||
|
||||
mutex_lock(&array_lock);
|
||||
if (idx < 0)
|
||||
for (idx = 0; idx < ARRAY_SIZE(mipi_dsi) && mipi_dsi[idx]; idx++)
|
||||
;
|
||||
|
||||
if (idx == ARRAY_SIZE(mipi_dsi)) {
|
||||
ret = -EBUSY;
|
||||
goto efindslot;
|
||||
}
|
||||
|
||||
mipi = kzalloc(sizeof(*mipi), GFP_KERNEL);
|
||||
if (!mipi) {
|
||||
ret = -ENOMEM;
|
||||
goto ealloc;
|
||||
}
|
||||
|
||||
mipi->entity.owner = THIS_MODULE;
|
||||
mipi->entity.ops = &mipi_ops;
|
||||
|
||||
if (!request_mem_region(res->start, resource_size(res), pdev->name)) {
|
||||
dev_err(&pdev->dev, "MIPI register region already claimed\n");
|
||||
ret = -EBUSY;
|
||||
goto ereqreg;
|
||||
}
|
||||
|
||||
mipi->base = ioremap(res->start, resource_size(res));
|
||||
if (!mipi->base) {
|
||||
ret = -ENOMEM;
|
||||
goto emap;
|
||||
}
|
||||
|
||||
if (!request_mem_region(res2->start, resource_size(res2), pdev->name)) {
|
||||
dev_err(&pdev->dev, "MIPI register region 2 already claimed\n");
|
||||
ret = -EBUSY;
|
||||
goto ereqreg2;
|
||||
}
|
||||
|
||||
mipi->linkbase = ioremap(res2->start, resource_size(res2));
|
||||
if (!mipi->linkbase) {
|
||||
ret = -ENOMEM;
|
||||
goto emap2;
|
||||
}
|
||||
|
||||
mipi->pdev = pdev;
|
||||
|
||||
mipi->dsit_clk = clk_get(&pdev->dev, "dsit_clk");
|
||||
if (IS_ERR(mipi->dsit_clk)) {
|
||||
ret = PTR_ERR(mipi->dsit_clk);
|
||||
goto eclktget;
|
||||
}
|
||||
|
||||
f_current = clk_get_rate(mipi->dsit_clk);
|
||||
/* 80MHz required by the datasheet */
|
||||
rate = clk_round_rate(mipi->dsit_clk, 80000000);
|
||||
if (rate > 0 && rate != f_current)
|
||||
ret = clk_set_rate(mipi->dsit_clk, rate);
|
||||
else
|
||||
ret = rate;
|
||||
if (ret < 0)
|
||||
goto esettrate;
|
||||
|
||||
dev_dbg(&pdev->dev, "DSI-T clk %lu -> %lu\n", f_current, rate);
|
||||
|
||||
ret = clk_enable(mipi->dsit_clk);
|
||||
if (ret < 0)
|
||||
goto eclkton;
|
||||
|
||||
mipi_dsi[idx] = mipi;
|
||||
|
||||
pm_runtime_enable(&pdev->dev);
|
||||
pm_runtime_resume(&pdev->dev);
|
||||
|
||||
mutex_unlock(&array_lock);
|
||||
platform_set_drvdata(pdev, &mipi->entity);
|
||||
|
||||
return 0;
|
||||
|
||||
eclkton:
|
||||
esettrate:
|
||||
clk_put(mipi->dsit_clk);
|
||||
eclktget:
|
||||
iounmap(mipi->linkbase);
|
||||
emap2:
|
||||
release_mem_region(res2->start, resource_size(res2));
|
||||
ereqreg2:
|
||||
iounmap(mipi->base);
|
||||
emap:
|
||||
release_mem_region(res->start, resource_size(res));
|
||||
ereqreg:
|
||||
kfree(mipi);
|
||||
ealloc:
|
||||
efindslot:
|
||||
mutex_unlock(&array_lock);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int sh_mipi_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
struct resource *res2 = platform_get_resource(pdev, IORESOURCE_MEM, 1);
|
||||
struct sh_mipi *mipi = to_sh_mipi(platform_get_drvdata(pdev));
|
||||
int i, ret;
|
||||
|
||||
mutex_lock(&array_lock);
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(mipi_dsi) && mipi_dsi[i] != mipi; i++)
|
||||
;
|
||||
|
||||
if (i == ARRAY_SIZE(mipi_dsi)) {
|
||||
ret = -EINVAL;
|
||||
} else {
|
||||
ret = 0;
|
||||
mipi_dsi[i] = NULL;
|
||||
}
|
||||
|
||||
mutex_unlock(&array_lock);
|
||||
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
pm_runtime_disable(&pdev->dev);
|
||||
clk_disable(mipi->dsit_clk);
|
||||
clk_put(mipi->dsit_clk);
|
||||
|
||||
iounmap(mipi->linkbase);
|
||||
if (res2)
|
||||
release_mem_region(res2->start, resource_size(res2));
|
||||
iounmap(mipi->base);
|
||||
if (res)
|
||||
release_mem_region(res->start, resource_size(res));
|
||||
kfree(mipi);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct platform_driver sh_mipi_driver = {
|
||||
.remove = sh_mipi_remove,
|
||||
.shutdown = sh_mipi_shutdown,
|
||||
.driver = {
|
||||
.name = "sh-mipi-dsi",
|
||||
},
|
||||
};
|
||||
|
||||
module_platform_driver_probe(sh_mipi_driver, sh_mipi_probe);
|
||||
|
||||
MODULE_AUTHOR("Guennadi Liakhovetski <g.liakhovetski@gmx.de>");
|
||||
MODULE_DESCRIPTION("SuperH / ARM-shmobile MIPI DSI driver");
|
||||
MODULE_LICENSE("GPL v2");
|
||||
|
|
@ -389,7 +389,7 @@ static int ssd1307fb_init(struct ssd1307fb_par *par)
|
|||
return ret;
|
||||
|
||||
ret = ssd1307fb_write_cmd(par->client,
|
||||
(par->device_info->need_chargepump & 0x1 << 2) & 0x14);
|
||||
BIT(4) | (par->device_info->need_chargepump ? BIT(2) : 0));
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
|
|
|
|||
|
|
@ -358,7 +358,7 @@ int viafb_setup_engine(struct fb_info *info)
|
|||
viapar->shared->vq_vram_addr = viapar->fbmem_free;
|
||||
viapar->fbmem_used += VQ_SIZE;
|
||||
|
||||
#if defined(CONFIG_VIDEO_VIA_CAMERA) || defined(CONFIG_VIDEO_VIA_CAMERA_MODULE)
|
||||
#if IS_ENABLED(CONFIG_VIDEO_VIA_CAMERA)
|
||||
/*
|
||||
* Set aside a chunk of framebuffer memory for the camera
|
||||
* driver. Someday this driver probably needs a proper allocator
|
||||
|
|
|
|||
|
|
@ -116,7 +116,7 @@ EXPORT_SYMBOL_GPL(viafb_irq_disable);
|
|||
* most viafb systems will not need to have this extra code for a while.
|
||||
* As soon as another user comes long, the ifdef can be removed.
|
||||
*/
|
||||
#if defined(CONFIG_VIDEO_VIA_CAMERA) || defined(CONFIG_VIDEO_VIA_CAMERA_MODULE)
|
||||
#if IS_ENABLED(CONFIG_VIDEO_VIA_CAMERA)
|
||||
/*
|
||||
* Access to the DMA engine. This currently provides what the camera
|
||||
* driver needs (i.e. outgoing only) but is easily expandable if need
|
||||
|
|
@ -542,7 +542,7 @@ static struct viafb_subdev_info {
|
|||
{
|
||||
.name = "viafb-i2c",
|
||||
},
|
||||
#if defined(CONFIG_VIDEO_VIA_CAMERA) || defined(CONFIG_VIDEO_VIA_CAMERA_MODULE)
|
||||
#if IS_ENABLED(CONFIG_VIDEO_VIA_CAMERA)
|
||||
{
|
||||
.name = "viafb-camera",
|
||||
},
|
||||
|
|
|
|||
|
|
@ -1,59 +0,0 @@
|
|||
/*
|
||||
* Public SH-mobile MIPI DSI header
|
||||
*
|
||||
* Copyright (C) 2010 Guennadi Liakhovetski <g.liakhovetski@gmx.de>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
#ifndef VIDEO_SH_MIPI_DSI_H
|
||||
#define VIDEO_SH_MIPI_DSI_H
|
||||
|
||||
enum sh_mipi_dsi_data_fmt {
|
||||
MIPI_RGB888,
|
||||
MIPI_RGB565,
|
||||
MIPI_RGB666_LP,
|
||||
MIPI_RGB666,
|
||||
MIPI_BGR888,
|
||||
MIPI_BGR565,
|
||||
MIPI_BGR666_LP,
|
||||
MIPI_BGR666,
|
||||
MIPI_YUYV,
|
||||
MIPI_UYVY,
|
||||
MIPI_YUV420_L,
|
||||
MIPI_YUV420,
|
||||
};
|
||||
|
||||
#define SH_MIPI_DSI_HSABM (1 << 0)
|
||||
#define SH_MIPI_DSI_HBPBM (1 << 1)
|
||||
#define SH_MIPI_DSI_HFPBM (1 << 2)
|
||||
#define SH_MIPI_DSI_BL2E (1 << 3)
|
||||
#define SH_MIPI_DSI_VSEE (1 << 4)
|
||||
#define SH_MIPI_DSI_HSEE (1 << 5)
|
||||
#define SH_MIPI_DSI_HSAE (1 << 6)
|
||||
|
||||
#define SH_MIPI_DSI_HSbyteCLK (1 << 24)
|
||||
#define SH_MIPI_DSI_HS6divCLK (1 << 25)
|
||||
#define SH_MIPI_DSI_HS4divCLK (1 << 26)
|
||||
|
||||
#define SH_MIPI_DSI_SYNC_PULSES_MODE (SH_MIPI_DSI_VSEE | \
|
||||
SH_MIPI_DSI_HSEE | \
|
||||
SH_MIPI_DSI_HSAE)
|
||||
#define SH_MIPI_DSI_SYNC_EVENTS_MODE (0)
|
||||
#define SH_MIPI_DSI_SYNC_BURST_MODE (SH_MIPI_DSI_BL2E)
|
||||
|
||||
struct sh_mipi_dsi_info {
|
||||
enum sh_mipi_dsi_data_fmt data_format;
|
||||
int channel;
|
||||
int lane;
|
||||
unsigned long flags;
|
||||
u32 clksrc;
|
||||
u32 phyctrl; /* for extra setting */
|
||||
unsigned int vsynw_offset;
|
||||
int (*set_dot_clock)(struct platform_device *pdev,
|
||||
void __iomem *base,
|
||||
int enable);
|
||||
};
|
||||
|
||||
#endif
|
||||
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