crypto: stm32/cryp - fix CTR counter carry
STM32 CRYP hardware doesn't manage CTR counter bigger than max U32, as
a workaround, at each block the current IV is saved, if the saved IV
lower u32 is 0xFFFFFFFF, the full IV is manually incremented, and set
in hardware.
Fixes: bbb2832620
("crypto: stm32 - Fix sparse warnings")
Signed-off-by: Nicolas Toromanoff <nicolas.toromanoff@foss.st.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
This commit is contained in:
Родитель
029812aee3
Коммит
41c76690b0
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@ -163,7 +163,7 @@ struct stm32_cryp {
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struct scatter_walk in_walk;
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struct scatter_walk out_walk;
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u32 last_ctr[4];
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__be32 last_ctr[4];
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u32 gcm_ctr;
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};
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@ -1217,27 +1217,26 @@ static void stm32_cryp_check_ctr_counter(struct stm32_cryp *cryp)
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{
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u32 cr;
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if (unlikely(cryp->last_ctr[3] == 0xFFFFFFFF)) {
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cryp->last_ctr[3] = 0;
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cryp->last_ctr[2]++;
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if (!cryp->last_ctr[2]) {
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cryp->last_ctr[1]++;
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if (!cryp->last_ctr[1])
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cryp->last_ctr[0]++;
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}
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if (unlikely(cryp->last_ctr[3] == cpu_to_be32(0xFFFFFFFF))) {
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/*
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* In this case, we need to increment manually the ctr counter,
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* as HW doesn't handle the U32 carry.
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*/
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crypto_inc((u8 *)cryp->last_ctr, sizeof(cryp->last_ctr));
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cr = stm32_cryp_read(cryp, CRYP_CR);
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stm32_cryp_write(cryp, CRYP_CR, cr & ~CR_CRYPEN);
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stm32_cryp_hw_write_iv(cryp, (__be32 *)cryp->last_ctr);
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stm32_cryp_hw_write_iv(cryp, cryp->last_ctr);
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stm32_cryp_write(cryp, CRYP_CR, cr);
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}
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cryp->last_ctr[0] = stm32_cryp_read(cryp, CRYP_IV0LR);
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cryp->last_ctr[1] = stm32_cryp_read(cryp, CRYP_IV0RR);
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cryp->last_ctr[2] = stm32_cryp_read(cryp, CRYP_IV1LR);
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cryp->last_ctr[3] = stm32_cryp_read(cryp, CRYP_IV1RR);
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/* The IV registers are BE */
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cryp->last_ctr[0] = cpu_to_be32(stm32_cryp_read(cryp, CRYP_IV0LR));
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cryp->last_ctr[1] = cpu_to_be32(stm32_cryp_read(cryp, CRYP_IV0RR));
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cryp->last_ctr[2] = cpu_to_be32(stm32_cryp_read(cryp, CRYP_IV1LR));
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cryp->last_ctr[3] = cpu_to_be32(stm32_cryp_read(cryp, CRYP_IV1RR));
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}
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static bool stm32_cryp_irq_read_data(struct stm32_cryp *cryp)
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