This pull request contains Broadcom ARM-based SoCs Device Tree changes
for 5.9 please pull the following: - Rafal specifies the switch ports for various Luxul devices (XAP-1410, XAP-1510, XAP-1610, XWC-1000, XWC-2000, XWR-1200, XWR-3100, XWR-3150) - Krzysztof fixes the L2 cache controller node name to conform to dtschema - Maxime introduces two new clock providers for Raspberry Pi 4, one to support firmware based clocks and another one for the DVP block feeding into the two HDMI blocks. -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEm+Rq3+YGJdiR9yuFh9CWnEQHBwQFAl8EAJUACgkQh9CWnEQH BwR13BAAsujw+MtlaXOqwzZpALGcIWdffhNHolTz3Qx0gTz3Q5Jmm8KEz//PIuoO 4NEBDMwbJPpHFewst1sQxINZx3f+FqO7SP3A2eKCYKcDStxasuYJHgXKylDLSGgG GDLDjQBXHzOqawzXejicn3flTwNMdsBg6l6hvFjA6NQbn4RcT+BgONOZaXqIQyof +TKqSZAkB5xu5V0axAq2A8VYtKvZy0sT8+4l/0x4/npgLAPluXJiXP4yPcfaWi5D vle5IUSEP0VbLF2pRTDzZHdbRC9+v2IiM2XSFSm8YlFLFu5LcqmQHexVQl/Ezqai n7apo7zyElk4dUwYYa99mTBrSq8VVN5+/7gsFqKed61zVnrR0aC/7ytOpXbLyeTP 1oG9s6CwUY6S2vUw6wCEEg77q9VtYFBn3uN9UdrVQ5EUeKlIv4vp8rMhMdxhYko9 cgdFy9CcSNAJUI5iWZ1A704hm1OBwXAktFrSIDXXru/9qIoZYlX5zrlYVPPknGiy dt0jTX38cYMPVXFl9EbOJcpjZZi9vN0iDyuX0034hFCDCoJHnaTxEV5cXOwLX4Wu 2PbdCvMNwy/JNtYcaDiWQeNBBwZhM8fQR1V7hkKh9kHM+t9NSUQDwQDXzbgUGXiq dS3h1PeBSgUL7qtaSl27K2VavDabJYavOwspB3Bsb9U3iIyhFMU= =/iqx -----END PGP SIGNATURE----- Merge tag 'arm-soc/for-5.9/devicetree' of https://github.com/Broadcom/stblinux into arm/dt This pull request contains Broadcom ARM-based SoCs Device Tree changes for 5.9 please pull the following: - Rafal specifies the switch ports for various Luxul devices (XAP-1410, XAP-1510, XAP-1610, XWC-1000, XWC-2000, XWR-1200, XWR-3100, XWR-3150) - Krzysztof fixes the L2 cache controller node name to conform to dtschema - Maxime introduces two new clock providers for Raspberry Pi 4, one to support firmware based clocks and another one for the DVP block feeding into the two HDMI blocks. * tag 'arm-soc/for-5.9/devicetree' of https://github.com/Broadcom/stblinux: ARM: dts: bcm: Align L2 cache-controller nodename with dtschema ARM: dts: BCM5301X: Specify switch ports for Luxul devices ARM: dts: bcm2711: Add HDMI DVP ARM: dts: bcm2711: Add firmware clocks node Link: https://lore.kernel.org/r/20200707045759.17562-1-f.fainelli@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Коммит
42027dfe59
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@ -91,7 +91,7 @@
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<0x20100 0x100>;
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};
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L2: l2-cache@22000 {
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L2: cache-controller@22000 {
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compatible = "arm,pl310-cache";
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reg = <0x22000 0x1000>;
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cache-unified;
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@ -104,7 +104,7 @@
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<0x20100 0x100>;
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};
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L2: l2-cache@22000 {
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L2: cache-controller@22000 {
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compatible = "arm,pl310-cache";
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reg = <0x22000 0x1000>;
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cache-unified;
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@ -122,7 +122,7 @@
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<0x20100 0x100>;
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};
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L2: l2-cache@22000 {
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L2: cache-controller@22000 {
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compatible = "arm,pl310-cache";
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reg = <0x22000 0x1000>;
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cache-unified;
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@ -90,7 +90,7 @@
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reg-io-width = <4>;
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};
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L2: l2-cache@3ff20000 {
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L2: cache-controller@3ff20000 {
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compatible = "arm,pl310-cache";
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reg = <0x3ff20000 0x1000>;
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cache-unified;
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@ -69,6 +69,11 @@
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};
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&firmware {
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firmware_clocks: clocks {
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compatible = "raspberrypi,firmware-clocks";
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#clock-cells = <1>;
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};
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expgpio: gpio {
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compatible = "raspberrypi,firmware-gpio";
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gpio-controller;
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@ -12,6 +12,13 @@
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interrupt-parent = <&gicv2>;
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clk_108MHz: clk-108M {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <108000000>;
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clock-output-names = "108MHz-clock";
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};
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soc {
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/*
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* Defined ranges:
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@ -244,6 +251,14 @@
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hvs@7e400000 {
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interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
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};
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dvp: clock@7ef00000 {
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compatible = "brcm,brcm2711-dvp";
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reg = <0x7ef00000 0x10>;
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clocks = <&clk_108MHz>;
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#clock-cells = <1>;
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#reset-cells = <1>;
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};
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};
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/*
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@ -60,3 +60,28 @@
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&usb3_phy {
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status = "okay";
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};
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&srab {
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status = "okay";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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label = "poe";
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};
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port@4 {
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reg = <4>;
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label = "lan";
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};
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port@5 {
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reg = <5>;
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label = "cpu";
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ethernet = <&gmac0>;
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};
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};
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};
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@ -67,3 +67,23 @@
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&usb3_phy {
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status = "okay";
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};
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&srab {
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status = "okay";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@4 {
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reg = <4>;
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label = "lan";
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};
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port@5 {
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reg = <5>;
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label = "cpu";
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ethernet = <&gmac0>;
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};
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};
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};
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@ -60,3 +60,23 @@
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&usb3_phy {
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status = "okay";
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};
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&srab {
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status = "okay";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@4 {
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reg = <4>;
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label = "poe";
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};
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port@5 {
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reg = <5>;
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label = "cpu";
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ethernet = <&gmac0>;
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};
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};
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};
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@ -108,3 +108,43 @@
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&usb3_phy {
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status = "okay";
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};
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&srab {
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status = "okay";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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label = "lan4";
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};
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port@1 {
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reg = <1>;
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label = "lan3";
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};
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port@2 {
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reg = <2>;
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label = "lan2";
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};
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port@3 {
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reg = <3>;
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label = "lan1";
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};
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port@4 {
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reg = <4>;
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label = "wan";
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};
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port@5 {
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reg = <5>;
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label = "cpu";
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ethernet = <&gmac0>;
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};
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};
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};
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@ -54,3 +54,28 @@
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&spi_nor {
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status = "okay";
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};
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&srab {
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status = "okay";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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label = "poe";
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};
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port@1 {
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reg = <1>;
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label = "lan";
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};
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port@5 {
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reg = <5>;
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label = "cpu";
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ethernet = <&gmac0>;
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};
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};
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};
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@ -51,3 +51,23 @@
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&spi_nor {
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status = "okay";
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};
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&srab {
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status = "okay";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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label = "lan";
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};
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port@5 {
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reg = <5>;
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label = "cpu";
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ethernet = <&gmac0>;
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};
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};
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};
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@ -103,3 +103,43 @@
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&usb3_phy {
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status = "okay";
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};
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&srab {
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status = "okay";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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label = "lan4";
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};
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port@1 {
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reg = <1>;
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label = "lan3";
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};
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port@2 {
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reg = <2>;
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label = "lan2";
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};
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port@3 {
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reg = <3>;
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label = "lan1";
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};
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port@4 {
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reg = <4>;
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label = "wan";
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};
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port@5 {
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reg = <5>;
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label = "cpu";
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ethernet = <&gmac0>;
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};
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};
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};
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@ -74,3 +74,43 @@
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&spi_nor {
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status = "okay";
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};
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&srab {
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status = "okay";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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label = "lan4";
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};
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port@1 {
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reg = <1>;
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label = "lan3";
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};
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port@2 {
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reg = <2>;
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label = "lan2";
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};
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port@3 {
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reg = <3>;
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label = "lan1";
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};
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port@4 {
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reg = <4>;
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label = "wan";
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};
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port@5 {
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reg = <5>;
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label = "cpu";
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ethernet = <&gmac0>;
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};
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};
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};
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