ARM: 5916/1: ARM: L2 : Add maintainace by line helper functions
This patch adds the cache maintainance by line helper functions. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Коммит
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@ -42,6 +42,27 @@ static inline void cache_sync(void)
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cache_wait(base + L2X0_CACHE_SYNC, 1);
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}
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static inline void l2x0_clean_line(unsigned long addr)
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{
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void __iomem *base = l2x0_base;
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cache_wait(base + L2X0_CLEAN_LINE_PA, 1);
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writel(addr, base + L2X0_CLEAN_LINE_PA);
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}
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static inline void l2x0_inv_line(unsigned long addr)
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{
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void __iomem *base = l2x0_base;
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cache_wait(base + L2X0_INV_LINE_PA, 1);
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writel(addr, base + L2X0_INV_LINE_PA);
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}
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static inline void l2x0_flush_line(unsigned long addr)
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{
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void __iomem *base = l2x0_base;
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cache_wait(base + L2X0_CLEAN_INV_LINE_PA, 1);
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writel(addr, base + L2X0_CLEAN_INV_LINE_PA);
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}
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static inline void l2x0_inv_all(void)
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{
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unsigned long flags;
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@ -62,23 +83,20 @@ static void l2x0_inv_range(unsigned long start, unsigned long end)
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spin_lock_irqsave(&l2x0_lock, flags);
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if (start & (CACHE_LINE_SIZE - 1)) {
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start &= ~(CACHE_LINE_SIZE - 1);
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cache_wait(base + L2X0_CLEAN_INV_LINE_PA, 1);
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writel(start, base + L2X0_CLEAN_INV_LINE_PA);
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l2x0_flush_line(start);
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start += CACHE_LINE_SIZE;
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}
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if (end & (CACHE_LINE_SIZE - 1)) {
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end &= ~(CACHE_LINE_SIZE - 1);
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cache_wait(base + L2X0_CLEAN_INV_LINE_PA, 1);
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writel(end, base + L2X0_CLEAN_INV_LINE_PA);
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l2x0_flush_line(end);
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}
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while (start < end) {
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unsigned long blk_end = start + min(end - start, 4096UL);
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while (start < blk_end) {
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cache_wait(base + L2X0_INV_LINE_PA, 1);
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writel(start, base + L2X0_INV_LINE_PA);
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l2x0_inv_line(start);
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start += CACHE_LINE_SIZE;
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}
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@ -103,8 +121,7 @@ static void l2x0_clean_range(unsigned long start, unsigned long end)
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unsigned long blk_end = start + min(end - start, 4096UL);
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while (start < blk_end) {
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cache_wait(base + L2X0_CLEAN_LINE_PA, 1);
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writel(start, base + L2X0_CLEAN_LINE_PA);
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l2x0_clean_line(start);
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start += CACHE_LINE_SIZE;
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}
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@ -129,8 +146,7 @@ static void l2x0_flush_range(unsigned long start, unsigned long end)
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unsigned long blk_end = start + min(end - start, 4096UL);
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while (start < blk_end) {
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cache_wait(base + L2X0_CLEAN_INV_LINE_PA, 1);
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writel(start, base + L2X0_CLEAN_INV_LINE_PA);
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l2x0_flush_line(start);
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start += CACHE_LINE_SIZE;
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}
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